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c157d8e2 SR |
1 | /* |
2 | * | |
3 | * See file CREDITS for list of people who contributed to this | |
4 | * project. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License as | |
8 | * published by the Free Software Foundation; either version 2 of | |
9 | * the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
19 | * MA 02111-1307 USA | |
20 | */ | |
21 | ||
25ddd1fb | 22 | #include <asm-offsets.h> |
c157d8e2 | 23 | #include <ppc_asm.tmpl> |
cf6eb6da | 24 | #include <asm/mmu.h> |
c157d8e2 SR |
25 | #include <config.h> |
26 | ||
c157d8e2 SR |
27 | /************************************************************************** |
28 | * TLB TABLE | |
29 | * | |
30 | * This table is used by the cpu boot code to setup the initial tlb | |
31 | * entries. Rather than make broad assumptions in the cpu source tree, | |
32 | * this table lets each board set things up however they like. | |
33 | * | |
34 | * Pointer to the table is returned in r1 | |
35 | * | |
36 | *************************************************************************/ | |
37 | ||
38 | .section .bootpg,"ax" | |
39 | .globl tlbtab | |
40 | ||
41 | tlbtab: | |
42 | tlbtab_start | |
84286386 SR |
43 | |
44 | /* | |
45 | * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the | |
46 | * speed up boot process. It is patched after relocation to enable SA_I | |
47 | */ | |
cf6eb6da | 48 | tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/) |
84286386 SR |
49 | |
50 | /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ | |
cf6eb6da | 51 | tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G ) |
84286386 | 52 | |
cf6eb6da SR |
53 | tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG ) |
54 | tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG ) | |
55 | tlbentry( CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_RWX | SA_W|SA_I ) | |
c157d8e2 SR |
56 | |
57 | /* PCI */ | |
cf6eb6da SR |
58 | tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG ) |
59 | tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG ) | |
60 | tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG ) | |
61 | tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG ) | |
c157d8e2 SR |
62 | |
63 | /* USB 2.0 Device */ | |
cf6eb6da | 64 | tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG ) |
c157d8e2 SR |
65 | |
66 | tlbtab_end |