]>
Commit | Line | Data |
---|---|---|
b1c0c736 TR |
1 | /* |
2 | * (C) Copyright 2010,2011 | |
3 | * NVIDIA Corporation <www.nvidia.com> | |
ed900c55 | 4 | * (C) Copyright 2011-2012 |
b1c0c736 TR |
5 | * Avionic Design GmbH <www.avionic-design.de> |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <common.h> | |
27 | #include <ns16550.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/gpio.h> | |
f46a9456 | 30 | #include <asm/arch/board.h> |
b1c0c736 TR |
31 | #include <asm/arch/tegra2.h> |
32 | #include <asm/arch/sys_proto.h> | |
33 | #include <asm/arch/clk_rst.h> | |
34 | #include <asm/arch/clock.h> | |
f4483021 | 35 | #include <asm/arch/funcmux.h> |
b1c0c736 TR |
36 | #include <asm/arch/pinmux.h> |
37 | #include <asm/arch/uart.h> | |
38 | #include <asm/arch/mmc.h> | |
b1c0c736 TR |
39 | |
40 | #ifdef CONFIG_TEGRA2_MMC | |
41 | #include <mmc.h> | |
42 | #endif | |
43 | ||
b1c0c736 | 44 | /* |
ed900c55 TR |
45 | * Routine: gpio_config_uart |
46 | * Description: Does nothing on Tamonten - no conflict w/SPI. | |
b1c0c736 | 47 | */ |
ed900c55 | 48 | void gpio_config_uart(void) |
b1c0c736 | 49 | { |
b1c0c736 TR |
50 | } |
51 | ||
22d58506 TR |
52 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
53 | void gpio_early_init(void) | |
54 | { | |
55 | gpio_request(GPIO_PI4, NULL); | |
56 | gpio_direction_output(GPIO_PI4, 1); | |
57 | } | |
58 | #endif | |
59 | ||
b1c0c736 TR |
60 | #ifdef CONFIG_TEGRA2_MMC |
61 | /* | |
62 | * Routine: pin_mux_mmc | |
63 | * Description: setup the pin muxes/tristate values for the SDMMC(s) | |
64 | */ | |
65 | static void pin_mux_mmc(void) | |
66 | { | |
f4483021 | 67 | funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); |
ed900c55 TR |
68 | /* for CD GPIO PH2 */ |
69 | pinmux_tristate_disable(PINGRP_ATD); | |
b1c0c736 | 70 | } |
b1c0c736 | 71 | |
b1c0c736 TR |
72 | /* this is a weak define that we are overriding */ |
73 | int board_mmc_init(bd_t *bd) | |
74 | { | |
b1c0c736 TR |
75 | /* Enable muxes, etc. for SDMMC controllers */ |
76 | pin_mux_mmc(); | |
b1c0c736 | 77 | |
ed900c55 | 78 | /* init dev 0, SD slot, with 4-bit bus */ |
b1c0c736 TR |
79 | tegra2_mmc_init(0, 4, -1, GPIO_PH2); |
80 | ||
81 | return 0; | |
82 | } | |
83 | #endif |