[people/ms/u-boot.git] / board / avnet / fx12mm / xparameters.h

/*
 * (C) Copyright 2008
 *
 * Georg Schardt <schardt@team-ctech.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 *
 * CAUTION: This file is based on the xparameters.h automatically
 * generated by libgen. Version: Xilinx EDK 10.1.02 Build EDK_K_SP2.5
 */

#ifndef __XPARAMETER_H__
#define __XPARAMETER_H__

/* RS232 */
#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000
#define XPAR_UARTNS550_0_BASEADDR 0x83E00000


/* INT_C */
#define XPAR_XPS_INTC_0_DEVICE_ID 0
#define XPAR_XPS_INTC_0_BASEADDR 0x81800000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 2

/* CPU core clock */
#define XPAR_CORE_CLOCK_FREQ_HZ 300000000
#define XPAR_PLB_CLOCK_FREQ_HZ  100000000

/* RAM */
#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000

/* FLASH */
#define XPAR_FLASH_MEM0_BASEADDR 0xFFC00000

#endif
Commit	Line	Data
5deb8022 GS	1	/*
	2	* (C) Copyright 2008
	3	*
	4	* Georg Schardt <schardt@team-ctech.de>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
5deb8022 GS	7	*
	8	* CAUTION: This file is based on the xparameters.h automatically
	9	* generated by libgen. Version: Xilinx EDK 10.1.02 Build EDK_K_SP2.5
	10	*/
	11
	12	#ifndef __XPARAMETER_H__
	13	#define __XPARAMETER_H__
	14
	15	/* RS232 */
	16	#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000
	17	#define XPAR_UARTNS550_0_BASEADDR 0x83E00000
	18
	19
	20	/* INT_C */
	21	#define XPAR_XPS_INTC_0_DEVICE_ID 0
	22	#define XPAR_XPS_INTC_0_BASEADDR 0x81800000
	23	#define XPAR_INTC_MAX_NUM_INTR_INPUTS 2
	24
	25	/* CPU core clock */
	26	#define XPAR_CORE_CLOCK_FREQ_HZ 300000000
	27	#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
	28
	29	/* RAM */
	30	#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
	31
	32	/* FLASH */
cc2dc9b0	33	#define XPAR_FLASH_MEM0_BASEADDR 0xFFC00000
5deb8022 GS	34
5deb8022 GS	35	#endif