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1d0f5fa1 DP |
1 | /* |
2 | * Copyright (C) 2012 | |
3 | * David Purdy <david.c.purdy@gmail.com> | |
4 | * | |
5 | * Based on Kirkwood support: | |
6 | * (C) Copyright 2009 | |
7 | * Marvell Semiconductor <www.marvell.com> | |
8 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
1d0f5fa1 DP |
11 | */ |
12 | ||
13 | #ifndef __POGO_E02_H | |
14 | #define __POGO_E02_H | |
15 | ||
16 | /* GPIO configuration */ | |
17 | #define POGO_E02_OE_LOW (~(0)) | |
18 | #define POGO_E02_OE_HIGH (~(0)) | |
19 | #define POGO_E02_OE_VAL_LOW (1 << 29) | |
20 | #define POGO_E02_OE_VAL_HIGH 0 | |
21 | ||
22 | /* PHY related */ | |
23 | #define MV88E1116_LED_FCTRL_REG 10 | |
24 | #define MV88E1116_CPRSP_CR3_REG 21 | |
25 | #define MV88E1116_MAC_CTRL_REG 21 | |
26 | #define MV88E1116_PGADR_REG 22 | |
27 | #define MV88E1116_RGMII_TXTM_CTRL (1 << 4) | |
28 | #define MV88E1116_RGMII_RXTM_CTRL (1 << 5) | |
29 | ||
30 | #endif /* __POGO_E02_H */ |