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[people/ms/u-boot.git] / board / cm41xx / cm41xx.c
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1/*
2 * (C) Copyright 2005
3 * Greg Ungerer, OpenGear Inc, <greg.ungerer@opengear.com>
4 *
5 * (C) Copyright 2002
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
7 *
8 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
1a459660 12 * SPDX-License-Identifier: GPL-2.0+
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13 */
14
15#include <common.h>
16#include <asm/arch/platform.h>
bd6ce9d1 17#include <netdev.h>
16b013e7 18
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19DECLARE_GLOBAL_DATA_PTR;
20
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21/* ------------------------------------------------------------------------- */
22
23#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
24#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b)
25
26/* ------------------------------------------------------------------------- */
27
28
29/*
30 * Miscelaneous platform dependent initialisations
31 */
32int env_flash_cmdline (void)
33{
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34 char *sp = (char *) 0x0201c020;
35 char *ep;
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36 int len;
37
38 /* Check if "erase" push button is depressed */
39 if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) {
40 printf("### Entering network recovery mode...\n");
41 setenv("bootargs", "console=ttyAM0,115200 mem=32M initrd=0x400000,8M root=/dev/ram0");
42 setenv("bootcmd", "bootp 0x400000; gofsk 0x400000");
43 setenv("bootdelay", "2");
44 return 0;
45 }
46
47 /* Check for flash based kernel boot args to use as default */
48 for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++)
49 ;
50
51 if ((len > 0) && (len <1024))
52 setenv("bootargs", sp);
53
54 return 0;
55}
56
57int board_late_init (void)
58{
59 return 0;
60}
61
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62int board_eth_init(bd_t *bis)
63{
64 return ks8695_eth_initialize();
65}
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66
67int board_init (void)
68{
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69 /* arch number of CM41xx */
70 gd->bd->bi_arch_number = 672;
71
72 /* adress of boot parameters */
73 gd->bd->bi_boot_params = 0x00000100;
74
75 /* power down all but port 0 on the switch */
76 ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005);
77 ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005);
78
79 return 0;
80}
81
82int dram_init (void)
83{
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84 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
85 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
86
87 return (0);
88}