[people/ms/u-boot.git] / board / corscience / tricorder / tricorder.c

/*
 * (C) Copyright 2012
 * Corscience GmbH & Co. KG, <www.corscience.de>
 * Thomas Weber <weber@corscience.de>
 * Sunil Kumar <sunilsaini05@gmail.com>
 * Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * Derived from Devkit8000 code by
 * Frederik Kriewitz <frederik@kriewitz.eu>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <twl4030.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mem.h>
#include "tricorder.h"
#include "tricorder-eeprom.h"

DECLARE_GLOBAL_DATA_PTR;

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

	return 0;
}

/**
 * get_eeprom - read the eeprom
 *
 * @eeprom - pointer to a eeprom struct to fill
 *
 * This function will panic() on wrong EEPROM content
 */
static void get_eeprom(struct tricorder_eeprom *eeprom)
{
	int ret;

	if (!eeprom)
		panic("No eeprom given!\n");

	ret = gpio_request(7, "BMS");
	if (ret)
		panic("gpio: requesting BMS pin failed\n");

	ret = gpio_direction_input(7);
	if (ret)
		panic("gpio: set BMS as input failed\n");

	ret = gpio_get_value(7);
	if (ret < 0)
		panic("gpio: get BMS pin state failed\n");

	gpio_free(7);

	if (ret == 0) {
		/* BMS is _not_ set, do the EEPROM check */
		ret = tricorder_get_eeprom(0x51, eeprom);
		if (!ret) {
			if (strncmp(eeprom->board_name, "CS10411", 7) != 0)
				panic("Wrong board name '%.*s'\n",
				      sizeof(eeprom->board_name),
						eeprom->board_name);
			if (eeprom->board_version[0] < 'D')
				panic("Wrong board version '%.*s'\n",
				      sizeof(eeprom->board_version),
						eeprom->board_version);
		} else {
			panic("Could not get board revision\n");
		}
	} else {
		memset(eeprom, 0, TRICORDER_EEPROM_SIZE);
	}
}

/**
 * print_hwversion - print out a HW version string
 *
 * @eeprom - pointer to the eeprom
 */
static void print_hwversion(struct tricorder_eeprom *eeprom)
{
	size_t len;
	if (!eeprom)
		panic("No eeprom given!");

	printf("Board %.*s:%.*s serial %.*s",
	       sizeof(eeprom->board_name), eeprom->board_name,
	       sizeof(eeprom->board_version), eeprom->board_version,
	       sizeof(eeprom->board_serial), eeprom->board_serial);

	len = strnlen(eeprom->interface_version,
		      sizeof(eeprom->interface_version));
	if (len > 0)
		printf(" HW interface version %.*s",
		       sizeof(eeprom->interface_version),
		       eeprom->interface_version);
	puts("\n");
}

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	struct tricorder_eeprom eeprom;
	get_eeprom(&eeprom);
	print_hwversion(&eeprom);

	twl4030_power_init();
	status_led_set(0, STATUS_LED_ON);
	status_led_set(1, STATUS_LED_ON);
	status_led_set(2, STATUS_LED_ON);

	dieid_num_r();

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_TRICORDER();
}

#if defined(CONFIG_GENERIC_MMC) && !(defined(CONFIG_SPL_BUILD))
int board_mmc_init(bd_t *bis)
{
	return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif

#if defined(CONFIG_GENERIC_MMC)
void board_mmc_power_init(void)
{
	twl4030_power_mmc_init(0);
}
#endif

/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on the first bank.  This
 * provides the timing values back to the function that configures
 * the memory.  We have either one or two banks of 128MB DDR.
 */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	struct tricorder_eeprom eeprom;
	get_eeprom(&eeprom);

	/* General SDRC config */
	if (eeprom.board_version[0] > 'D') {
		/* use optimized timings for our SDRAM device */
		timings->mcfg = MCFG((256 << 20), 14);
#define MT46H64M32_TDAL  6	/* Twr/Tck + Trp/tck		*/
				/* 15/6 + 18/6 = 5.5 -> 6	*/
#define MT46H64M32_TDPL  3	/* 15/6 = 2.5 -> 3 (Twr)	*/
#define MT46H64M32_TRRD  2	/* 12/6 = 2			*/
#define MT46H64M32_TRCD  3	/* 18/6 = 3			*/
#define MT46H64M32_TRP   3	/* 18/6 = 3			*/
#define MT46H64M32_TRAS  7	/* 42/6 = 7			*/
#define MT46H64M32_TRC  10	/* 60/6 = 10			*/
#define MT46H64M32_TRFC 12	/* 72/6 = 12			*/
		timings->ctrla = ACTIM_CTRLA(MT46H64M32_TRFC, MT46H64M32_TRC,
					     MT46H64M32_TRAS, MT46H64M32_TRP,
					     MT46H64M32_TRCD, MT46H64M32_TRRD,
					     MT46H64M32_TDPL,
					     MT46H64M32_TDAL);

#define MT46H64M32_TWTR 1
#define MT46H64M32_TCKE 1
#define MT46H64M32_XSR 19	/* 112.5/6 = 18.75 => ~19	*/
#define MT46H64M32_TXP 1
		timings->ctrlb = ACTIM_CTRLB(MT46H64M32_TWTR, MT46H64M32_TCKE,
					     MT46H64M32_TXP, MT46H64M32_XSR);

		timings->mr = MICRON_V_MR_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	} else {
		/* use conservative beagleboard timings as default */
		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
		timings->ctrla = MICRON_V_ACTIMA_165;
		timings->ctrlb = MICRON_V_ACTIMB_165;
		timings->mr = MICRON_V_MR_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	}
}
Commit	Line	Data
8167af14 TW	1	/*
	2	* (C) Copyright 2012
	3	* Corscience GmbH & Co. KG, <www.corscience.de>
	4	* Thomas Weber <weber@corscience.de>
	5	* Sunil Kumar <sunilsaini05@gmail.com>
	6	* Shashi Ranjan <shashiranjanmca05@gmail.com>
	7	*
	8	* Derived from Devkit8000 code by
	9	* Frederik Kriewitz <frederik@kriewitz.eu>
	10	*
1a459660	11	* SPDX-License-Identifier: GPL-2.0+
8167af14 TW	12	*/
	13	#include <common.h>
	14	#include <twl4030.h>
	15	#include <asm/io.h>
89088058	16	#include <asm/gpio.h>
8167af14 TW	17	#include <asm/arch/mmc_host_def.h>
	18	#include <asm/arch/mux.h>
	19	#include <asm/arch/sys_proto.h>
	20	#include <asm/arch/mem.h>
	21	#include "tricorder.h"
89088058	22	#include "tricorder-eeprom.h"
8167af14 TW	23
	24	DECLARE_GLOBAL_DATA_PTR;
	25
	26	/*
	27	* Routine: board_init
	28	* Description: Early hardware init.
	29	*/
	30	int board_init(void)
	31	{
	32	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	33	/* boot param addr */
	34	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
	35
	36	return 0;
	37	}
	38
89088058 AB	39	/**
	40	* get_eeprom - read the eeprom
	41	*
	42	* @eeprom - pointer to a eeprom struct to fill
	43	*
	44	* This function will panic() on wrong EEPROM content
	45	*/
	46	static void get_eeprom(struct tricorder_eeprom *eeprom)
	47	{
	48	int ret;
	49
	50	if (!eeprom)
	51	panic("No eeprom given!\n");
	52
	53	ret = gpio_request(7, "BMS");
	54	if (ret)
	55	panic("gpio: requesting BMS pin failed\n");
	56
	57	ret = gpio_direction_input(7);
	58	if (ret)
	59	panic("gpio: set BMS as input failed\n");
	60
	61	ret = gpio_get_value(7);
	62	if (ret < 0)
	63	panic("gpio: get BMS pin state failed\n");
	64
	65	gpio_free(7);
	66
	67	if (ret == 0) {
	68	/* BMS is _not_ set, do the EEPROM check */
	69	ret = tricorder_get_eeprom(0x51, eeprom);
	70	if (!ret) {
	71	if (strncmp(eeprom->board_name, "CS10411", 7) != 0)
	72	panic("Wrong board name '%.*s'\n",
	73	sizeof(eeprom->board_name),
	74	eeprom->board_name);
	75	if (eeprom->board_version[0] < 'D')
	76	panic("Wrong board version '%.*s'\n",
	77	sizeof(eeprom->board_version),
	78	eeprom->board_version);
	79	} else {
	80	panic("Could not get board revision\n");
	81	}
1ea2301f AB	82	} else {
1ea2301f AB	83	memset(eeprom, 0, TRICORDER_EEPROM_SIZE);
89088058 AB	84	}
	85	}
	86
	87	/**
	88	* print_hwversion - print out a HW version string
	89	*
	90	* @eeprom - pointer to the eeprom
	91	*/
	92	static void print_hwversion(struct tricorder_eeprom *eeprom)
	93	{
	94	size_t len;
	95	if (!eeprom)
	96	panic("No eeprom given!");
	97
	98	printf("Board %.s:%.s serial %.*s",
	99	sizeof(eeprom->board_name), eeprom->board_name,
	100	sizeof(eeprom->board_version), eeprom->board_version,
	101	sizeof(eeprom->board_serial), eeprom->board_serial);
	102
	103	len = strnlen(eeprom->interface_version,
	104	sizeof(eeprom->interface_version));
	105	if (len > 0)
	106	printf(" HW interface version %.*s",
	107	sizeof(eeprom->interface_version),
	108	eeprom->interface_version);
	109	puts("\n");
	110	}
	111
8167af14 TW	112	/*
	113	* Routine: misc_init_r
	114	* Description: Configure board specific parts
	115	*/
	116	int misc_init_r(void)
	117	{
89088058 AB	118	struct tricorder_eeprom eeprom;
	119	get_eeprom(&eeprom);
	120	print_hwversion(&eeprom);
	121
8167af14	122	twl4030_power_init();
ad9f072c AB	123	status_led_set(0, STATUS_LED_ON);
	124	status_led_set(1, STATUS_LED_ON);
	125	status_led_set(2, STATUS_LED_ON);
8167af14 TW	126
	127	dieid_num_r();
	128
	129	return 0;
	130	}
	131
	132	/*
	133	* Routine: set_muxconf_regs
	134	* Description: Setting up the configuration Mux registers specific to the
	135	* hardware. Many pins need to be moved from protect to primary
	136	* mode.
	137	*/
	138	void set_muxconf_regs(void)
	139	{
	140	MUX_TRICORDER();
	141	}
	142
	143	#if defined(CONFIG_GENERIC_MMC) && !(defined(CONFIG_SPL_BUILD))
	144	int board_mmc_init(bd_t *bis)
	145	{
e3913f56	146	return omap_mmc_init(0, 0, 0, -1, -1);
8167af14 TW	147	}
	148	#endif
	149
aac5450e PK	150	#if defined(CONFIG_GENERIC_MMC)
	151	void board_mmc_power_init(void)
	152	{
	153	twl4030_power_mmc_init(0);
	154	}
	155	#endif
	156
8167af14 TW	157	/*
	158	* Routine: get_board_mem_timings
	159	* Description: If we use SPL then there is no x-loader nor config header
	160	* so we have to setup the DDR timings ourself on the first bank. This
	161	* provides the timing values back to the function that configures
	162	* the memory. We have either one or two banks of 128MB DDR.
	163	*/
8c4445d2	164	void get_board_mem_timings(struct board_sdrc_timings *timings)
8167af14	165	{
01782965 AB	166	struct tricorder_eeprom eeprom;
01782965 AB	167	get_eeprom(&eeprom);
8167af14	168
01782965 AB	169	/* General SDRC config */
	170	if (eeprom.board_version[0] > 'D') {
	171	/* use optimized timings for our SDRAM device */
	172	timings->mcfg = MCFG((256 << 20), 14);
	173	#define MT46H64M32_TDAL 6 /* Twr/Tck + Trp/tck */
	174	/* 15/6 + 18/6 = 5.5 -> 6 */
	175	#define MT46H64M32_TDPL 3 /* 15/6 = 2.5 -> 3 (Twr) */
	176	#define MT46H64M32_TRRD 2 /* 12/6 = 2 */
	177	#define MT46H64M32_TRCD 3 /* 18/6 = 3 */
	178	#define MT46H64M32_TRP 3 /* 18/6 = 3 */
	179	#define MT46H64M32_TRAS 7 /* 42/6 = 7 */
	180	#define MT46H64M32_TRC 10 /* 60/6 = 10 */
	181	#define MT46H64M32_TRFC 12 /* 72/6 = 12 */
	182	timings->ctrla = ACTIM_CTRLA(MT46H64M32_TRFC, MT46H64M32_TRC,
	183	MT46H64M32_TRAS, MT46H64M32_TRP,
	184	MT46H64M32_TRCD, MT46H64M32_TRRD,
	185	MT46H64M32_TDPL,
	186	MT46H64M32_TDAL);
	187
	188	#define MT46H64M32_TWTR 1
	189	#define MT46H64M32_TCKE 1
	190	#define MT46H64M32_XSR 19 /* 112.5/6 = 18.75 => ~19 */
	191	#define MT46H64M32_TXP 1
	192	timings->ctrlb = ACTIM_CTRLB(MT46H64M32_TWTR, MT46H64M32_TCKE,
	193	MT46H64M32_TXP, MT46H64M32_XSR);
	194
	195	timings->mr = MICRON_V_MR_165;
	196	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	197	} else {
	198	/* use conservative beagleboard timings as default */
	199	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	200	timings->ctrla = MICRON_V_ACTIMA_165;
	201	timings->ctrlb = MICRON_V_ACTIMB_165;
	202	timings->mr = MICRON_V_MR_165;
	203	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	204	}
8167af14	205	}