[people/ms/u-boot.git] / board / cray / L1 / L1.c

/*
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <asm/processor.h>
#include <4xx_i2c.h>
#include <command.h>
#include <rtc.h>
#include <post.h>
#include <net.h>
#include <malloc.h>

#define L1_MEMSIZE (32*1024*1024)

/* the std. DHCP stufff */
#define DHCP_ROUTER       3
#define DHCP_NETMASK      1
#define DHCP_BOOTFILE     67
#define DHCP_ROOTPATH     17
#define DHCP_HOSTNAME     12

/* some extras used by CRAY
 *
 * on the server this looks like:
 *
 * option L1-initrd-image code 224 = string;
 * option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
 */
#define DHCP_L1_INITRD  224

/* new, [better?] way via official vendor-extensions, defining an option
 * space.
 * on the server this looks like:
 *
 * option space CRAYL1;
 * option CRAYL1.initrd     code 3 = string;
 * ..etc...
 */
#define DHCP_VENDOR_SPECX   43
#define DHCP_VX_INITRD       3
#define DHCP_VX_BOOTCMD      4
#define DHCP_VX_BOOTARGS     5
#define DHCP_VX_ROOTDEV      6
#define DHCP_VX_FROMFLASH    7
#define DHCP_VX_BOOTSCRIPT   8
#define DHCP_VX_RCFILE	     9
#define DHCP_VX_MAGIC        10

/* Things DHCP server can tellme about.  If there's no flash address, then
 * they dont participate in 'update' to flash, and we force their values
 * back to '0' every boot to be sure to get them fresh from DHCP.  Yes, I
 * know this is a pain...
 *
 * If I get no bootfile, boot from flash.  If rootpath, use that.  If no
 * rootpath use initrd in flash.
 */
typedef struct dhcp_item_s {
	u8 dhcp_option;
	u8 dhcp_vendor_option;
	char *dhcpvalue;
	char *envname;
} dhcp_item_t;
static dhcp_item_t Things[] = {
	{DHCP_ROUTER, 0, NULL, "gateway"},
	{DHCP_NETMASK, 0, NULL, "netmask"},
	{DHCP_BOOTFILE, 0, NULL, "bootfile"},
	{DHCP_ROOTPATH, 0, NULL, "rootpath"},
	{DHCP_HOSTNAME, 0, NULL, "hostname"},
	{DHCP_L1_INITRD, 0, NULL, "initrd"},
/* and the other way.. */
	{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
	{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
	{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
	{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
	{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
};

#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))

extern char bootscript[];

/* Here is the boot logic as HUSH script. Overridden by any TFP provided
 * bootscript file.
 */

static void init_sdram (void);

/* ------------------------------------------------------------------------- */
int board_early_init_f (void)
{
	/* Running from ROM: global data is still READONLY */
	init_sdram ();
	mtdcr (uicsr, 0xFFFFFFFF);	/* clear all ints */
	mtdcr (uicer, 0x00000000);	/* disable all ints */
	mtdcr (uiccr, 0x00000020);	/* set all but FPGA SMI to be non-critical */
	mtdcr (uicpr, 0xFFFFFFE0);	/* set int polarities */
	mtdcr (uictr, 0x10000000);	/* set int trigger levels */
	mtdcr (uicvcr, 0x00000001);	/* set vect base=0,INT0 highest priority */
	mtdcr (uicsr, 0xFFFFFFFF);	/* clear all ints */
	return 0;
}

/* ------------------------------------------------------------------------- */
int checkboard (void)
{
	return (0);
}
/* ------------------------------------------------------------------------- */

/* ------------------------------------------------------------------------- */
int misc_init_r (void)
{
	char *s, *e;
	image_header_t *hdr;
	time_t timestamp;
	struct rtc_time tm;
	char bootcmd[32];

	hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
	timestamp = (time_t) hdr->ih_time;
	to_tm (timestamp, &tm);
	printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d  %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);

#define FACTORY_SETTINGS 0xFFFC0000
	if ((s = getenv ("ethaddr")) == NULL) {
		e = (char *) (FACTORY_SETTINGS);
		if (*(e + 0) != '0'
			|| *(e + 1) != '0'
			|| *(e + 2) != ':'
			|| *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') {
			printf ("No valid MAC address in flash location 0x3C0000!\n");
		} else {
			printf ("Factory MAC: %s\n", e);
			setenv ("ethaddr", e);
		}
	}
	sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
	setenv ("bootcmd", bootcmd);
	return (0);
}

/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
{
	return (L1_MEMSIZE);
}

/* ------------------------------------------------------------------------- */
/* stubs so we can print dates w/o any nvram RTC.*/
int rtc_get (struct rtc_time *tmp)
{
	return 0;
}
void rtc_set (struct rtc_time *tmp)
{
	return;
}
void rtc_reset (void)
{
	return;
}

/* ------------------------------------------------------------------------- */
/*  Do sdram bank init in C so I can read it..no console to print to yet!
 */
static void init_sdram (void)
{
 unsigned long tmp;

	/* write SDRAM bank 0 register */
	mtdcr (memcfga, mem_mb0cf);
	mtdcr (memcfgd, 0x00062001);

/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR.	*/
/* To set the appropriate timings, we need to know the SDRAM speed.	*/
/* We can use the PLB speed since the SDRAM speed is the same as	*/
/* the PLB speed. The PLB speed is the FBK divider times the		*/
/* 405GP reference clock, which on the L1 is 25Mhz.			*/
/* Thus, if FBK div is 2, SDRAM is 50Mhz; if FBK div is 3, SDRAM is	*/
/* 150Mhz; if FBK is 3, SDRAM is 150Mhz.				*/

	/* divisor = ((mfdcr(strap)>> 28) & 0x3); */

/* write SDRAM timing for 100Mhz. */
	mtdcr (memcfga, mem_sdtr1);
	mtdcr (memcfgd, 0x0086400D);

/* write SDRAM refresh interval register */
	mtdcr (memcfga, mem_rtr);
	mtdcr (memcfgd, 0x05F00000);
	udelay (200);

/* sdram controller.*/
	mtdcr (memcfga, mem_mcopt1);
	mtdcr (memcfgd, 0x90800000);
	udelay (200);

/* initially, disable ECC on all banks */
	udelay (200);
	mtdcr (memcfga, mem_ecccf);
	tmp = mfdcr (memcfgd);
	tmp &= 0xff0fffff;
	mtdcr (memcfga, mem_ecccf);
	mtdcr (memcfgd, tmp);

	return;
}

extern int memory_post_test (int flags);

int testdram (void)
{
 unsigned long tmp;
	uint *pstart = (uint *) 0x00000000;
	uint *pend = (uint *) L1_MEMSIZE;
	uint *p;

	if (getenv_r("booted",NULL,0) <= 0)
	{
		printf ("testdram..");
	/*AA*/
		for (p = pstart; p < pend; p++)
			*p = 0xaaaaaaaa;
		for (p = pstart; p < pend; p++) {
			if (*p != 0xaaaaaaaa) {
				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
						(uint) p, *p, 0xaaaaaaaa);
				return 1;
			}
		}
	/*55*/
		for (p = pstart; p < pend; p++)
			*p = 0x55555555;
		for (p = pstart; p < pend; p++) {
			if (*p != 0x55555555) {
				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
						(uint) p, *p, 0x55555555);
				return 1;
			}
		}
	/*addr*/
		for (p = pstart; p < pend; p++)
			*p = (unsigned)p;
		for (p = pstart; p < pend; p++) {
			if (*p != (unsigned)p) {
				printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
						(uint) p, *p, (uint)p);
				return 1;
			}
		}
		printf ("Success. ");
	}
	printf ("Enable ECC..");

	mtdcr (memcfga, mem_mcopt1);
	tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
	mtdcr (memcfga, mem_mcopt1);
	mtdcr (memcfgd, tmp);
	udelay (600);
	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
		;
	udelay (400);
	mtdcr (memcfga, mem_ecccf);
	tmp = mfdcr (memcfgd);
	tmp |= 0x00800000;
	mtdcr (memcfgd, tmp);
	udelay (400);
	printf ("enabled.\n");
	return (0);
}

/* ------------------------------------------------------------------------- */
static u8 *dhcp_env_update (u8 thing, u8 * pop)
{
	u8 i, oplen;

	oplen = *(pop + 1);

	if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
		printf ("Whoops! failed to malloc space for DHCP thing %s\n",
				Things[thing].envname);
		return NULL;
	}
	for (i = 0; (i < oplen); i++)
		if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ')
			break;
	*(Things[thing].dhcpvalue + i) = '\0';

/* set env. */
	if (Things[thing].envname)
	{
		setenv (Things[thing].envname, Things[thing].dhcpvalue);
	}
	return ((u8 *)(Things[thing].dhcpvalue));
}

/* ------------------------------------------------------------------------- */
u8 *dhcp_vendorex_prep (u8 * e)
{
	u8 thing;

/* ask for the things I want. */
	*e++ = 55;					/* Parameter Request List */
	*e++ = N_THINGS;
	for (thing = 0; thing < N_THINGS; thing++)
		*e++ = Things[thing].dhcp_option;
	*e++ = 255;

	return e;
}

/* ------------------------------------------------------------------------- */
/* .. return NULL means it wasnt mine, non-null means I got it..*/
u8 *dhcp_vendorex_proc (u8 * pop)
{
	u8 oplen, *sub_op, sub_oplen, *retval;
	u8 thing = 0;

	retval = NULL;
	oplen = *(pop + 1);
/* if pop is vender spec indicator, there are sub-options. */
	if (*pop == DHCP_VENDOR_SPECX) {
		for (sub_op = pop + 2;
		     oplen && (sub_oplen = *(sub_op + 1));
		     oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
			for (thing = 0; thing < N_THINGS; thing++) {
			    if (*sub_op == Things[thing].dhcp_vendor_option) {
					if (!(retval = dhcp_env_update (thing, sub_op))) {
						return NULL;
					}
			    }
			}
		}
	} else {
		for (thing = 0; thing < N_THINGS; thing++) {
			if (*pop == Things[thing].dhcp_option)
				if (!(retval = dhcp_env_update (thing, pop)))
					return NULL;
		}
	}
	return (pop);
}
Commit	Line	Data
47d1a6e1 WD	1	/*
	2	* (C) Copyright 2000
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	#include <common.h>
	25	#include <asm/processor.h>
79b2d0bb	26	#include <4xx_i2c.h>
47d1a6e1	27	#include <command.h>
47d1a6e1	28	#include <rtc.h>
7f70e853	29	#include <post.h>
47d1a6e1 WD	30	#include <net.h>
	31	#include <malloc.h>
	32
	33	#define L1_MEMSIZE (3210241024)
	34
	35	/* the std. DHCP stufff */
	36	#define DHCP_ROUTER 3
	37	#define DHCP_NETMASK 1
	38	#define DHCP_BOOTFILE 67
	39	#define DHCP_ROOTPATH 17
	40	#define DHCP_HOSTNAME 12
	41
	42	/* some extras used by CRAY
	43	*
	44	* on the server this looks like:
	45	*
	46	* option L1-initrd-image code 224 = string;
	47	* option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
	48	*/
	49	#define DHCP_L1_INITRD 224
	50
	51	/* new, [better?] way via official vendor-extensions, defining an option
	52	* space.
	53	* on the server this looks like:
	54	*
7f70e853 WD	55	* option space CRAYL1;
	56	* option CRAYL1.initrd code 3 = string;
	57	* ..etc...
47d1a6e1 WD	58	*/
	59	#define DHCP_VENDOR_SPECX 43
	60	#define DHCP_VX_INITRD 3
	61	#define DHCP_VX_BOOTCMD 4
7f70e853	62	#define DHCP_VX_BOOTARGS 5
47d1a6e1	63	#define DHCP_VX_ROOTDEV 6
7f70e853 WD	64	#define DHCP_VX_FROMFLASH 7
	65	#define DHCP_VX_BOOTSCRIPT 8
	66	#define DHCP_VX_RCFILE 9
	67	#define DHCP_VX_MAGIC 10
47d1a6e1 WD	68
	69	/* Things DHCP server can tellme about. If there's no flash address, then
	70	* they dont participate in 'update' to flash, and we force their values
	71	* back to '0' every boot to be sure to get them fresh from DHCP. Yes, I
	72	* know this is a pain...
	73	*
	74	* If I get no bootfile, boot from flash. If rootpath, use that. If no
	75	* rootpath use initrd in flash.
	76	*/
	77	typedef struct dhcp_item_s {
	78	u8 dhcp_option;
	79	u8 dhcp_vendor_option;
	80	char *dhcpvalue;
	81	char *envname;
	82	} dhcp_item_t;
	83	static dhcp_item_t Things[] = {
	84	{DHCP_ROUTER, 0, NULL, "gateway"},
	85	{DHCP_NETMASK, 0, NULL, "netmask"},
	86	{DHCP_BOOTFILE, 0, NULL, "bootfile"},
	87	{DHCP_ROOTPATH, 0, NULL, "rootpath"},
	88	{DHCP_HOSTNAME, 0, NULL, "hostname"},
	89	{DHCP_L1_INITRD, 0, NULL, "initrd"},
	90	/* and the other way.. */
	91	{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
	92	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
7f70e853 WD	93	{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
	94	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
	95	{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
	96	{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
47d1a6e1	97	{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
7f70e853	98	{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
47d1a6e1 WD	99	};
	100
	101	#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
	102
7f70e853 WD	103	extern char bootscript[];
	104
	105	/* Here is the boot logic as HUSH script. Overridden by any TFP provided
	106	* bootscript file.
	107	*/
	108
	109	static void init_sdram (void);
47d1a6e1 WD	110
47d1a6e1 WD	111	/* ------------------------------------------------------------------------- */
c837dcb1	112	int board_early_init_f (void)
47d1a6e1	113	{
7f70e853 WD	114	/* Running from ROM: global data is still READONLY */
7f70e853 WD	115	init_sdram ();
47d1a6e1 WD	116	mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
	117	mtdcr (uicer, 0x00000000); /* disable all ints */
	118	mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
	119	mtdcr (uicpr, 0xFFFFFFE0); /* set int polarities */
	120	mtdcr (uictr, 0x10000000); /* set int trigger levels */
	121	mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
	122	mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
	123	return 0;
	124	}
	125
	126	/* ------------------------------------------------------------------------- */
	127	int checkboard (void)
	128	{
	129	return (0);
	130	}
7f70e853	131	/* ------------------------------------------------------------------------- */
47d1a6e1 WD	132
	133	/* ------------------------------------------------------------------------- */
	134	int misc_init_r (void)
	135	{
77ddac94	136	char s, e;
47d1a6e1 WD	137	image_header_t *hdr;
	138	time_t timestamp;
	139	struct rtc_time tm;
7f70e853	140	char bootcmd[32];
47d1a6e1 WD	141
	142	hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
	143	timestamp = (time_t) hdr->ih_time;
	144	to_tm (timestamp, &tm);
	145	printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
	146
	147	#define FACTORY_SETTINGS 0xFFFC0000
	148	if ((s = getenv ("ethaddr")) == NULL) {
77ddac94	149	e = (char *) (FACTORY_SETTINGS);
47d1a6e1 WD	150	if (*(e + 0) != '0'
	151	\|\| *(e + 1) != '0'
	152	\|\| *(e + 2) != ':'
	153	\|\| (e + 3) != '4' \|\| (e + 4) != '0' \|\| *(e + 17) != '\0') {
	154	printf ("No valid MAC address in flash location 0x3C0000!\n");
	155	} else {
	156	printf ("Factory MAC: %s\n", e);
	157	setenv ("ethaddr", e);
	158	}
	159	}
7f70e853 WD	160	sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
7f70e853 WD	161	setenv ("bootcmd", bootcmd);
47d1a6e1 WD	162	return (0);
	163	}
	164
	165	/* ------------------------------------------------------------------------- */
	166	long int initdram (int board_type)
	167	{
	168	return (L1_MEMSIZE);
	169	}
	170
	171	/* ------------------------------------------------------------------------- */
	172	/* stubs so we can print dates w/o any nvram RTC.*/
b73a19e1	173	int rtc_get (struct rtc_time *tmp)
47d1a6e1	174	{
b73a19e1	175	return 0;
47d1a6e1 WD	176	}
	177	void rtc_set (struct rtc_time *tmp)
	178	{
	179	return;
	180	}
	181	void rtc_reset (void)
	182	{
	183	return;
	184	}
	185
	186	/* ------------------------------------------------------------------------- */
7f70e853	187	/* Do sdram bank init in C so I can read it..no console to print to yet!
47d1a6e1	188	*/
7f70e853	189	static void init_sdram (void)
47d1a6e1	190	{
7f70e853	191	unsigned long tmp;
47d1a6e1 WD	192
	193	/* write SDRAM bank 0 register */
	194	mtdcr (memcfga, mem_mb0cf);
	195	mtdcr (memcfgd, 0x00062001);
	196
	197	/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
	198	/* To set the appropriate timings, we need to know the SDRAM speed. */
	199	/* We can use the PLB speed since the SDRAM speed is the same as */
	200	/* the PLB speed. The PLB speed is the FBK divider times the */
	201	/* 405GP reference clock, which on the L1 is 25Mhz. */
	202	/* Thus, if FBK div is 2, SDRAM is 50Mhz; if FBK div is 3, SDRAM is */
	203	/* 150Mhz; if FBK is 3, SDRAM is 150Mhz. */
	204
	205	/* divisor = ((mfdcr(strap)>> 28) & 0x3); */
	206
	207	/* write SDRAM timing for 100Mhz. */
	208	mtdcr (memcfga, mem_sdtr1);
	209	mtdcr (memcfgd, 0x0086400D);
	210
	211	/* write SDRAM refresh interval register */
	212	mtdcr (memcfga, mem_rtr);
	213	mtdcr (memcfgd, 0x05F00000);
	214	udelay (200);
	215
	216	/* sdram controller.*/
	217	mtdcr (memcfga, mem_mcopt1);
	218	mtdcr (memcfgd, 0x90800000);
	219	udelay (200);
	220
7f70e853 WD	221	/* initially, disable ECC on all banks */
7f70e853 WD	222	udelay (200);
47d1a6e1 WD	223	mtdcr (memcfga, mem_ecccf);
	224	tmp = mfdcr (memcfgd);
	225	tmp &= 0xff0fffff;
	226	mtdcr (memcfga, mem_ecccf);
	227	mtdcr (memcfgd, tmp);
	228
7f70e853 WD	229	return;
	230	}
	231
	232	extern int memory_post_test (int flags);
	233
	234	int testdram (void)
	235	{
	236	unsigned long tmp;
	237	uint pstart = (uint ) 0x00000000;
	238	uint pend = (uint ) L1_MEMSIZE;
	239	uint *p;
	240
	241	if (getenv_r("booted",NULL,0) <= 0)
	242	{
	243	printf ("testdram..");
	244	/AA/
	245	for (p = pstart; p < pend; p++)
	246	*p = 0xaaaaaaaa;
	247	for (p = pstart; p < pend; p++) {
	248	if (*p != 0xaaaaaaaa) {
8bde7f77	249	printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853 WD	250	(uint) p, *p, 0xaaaaaaaa);
	251	return 1;
	252	}
	253	}
	254	/55/
	255	for (p = pstart; p < pend; p++)
	256	*p = 0x55555555;
	257	for (p = pstart; p < pend; p++) {
	258	if (*p != 0x55555555) {
8bde7f77	259	printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853 WD	260	(uint) p, *p, 0x55555555);
	261	return 1;
	262	}
	263	}
	264	/addr/
	265	for (p = pstart; p < pend; p++)
	266	*p = (unsigned)p;
	267	for (p = pstart; p < pend; p++) {
	268	if (*p != (unsigned)p) {
8bde7f77	269	printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853 WD	270	(uint) p, *p, (uint)p);
	271	return 1;
	272	}
	273	}
	274	printf ("Success. ");
	275	}
	276	printf ("Enable ECC..");
	277
47d1a6e1 WD	278	mtdcr (memcfga, mem_mcopt1);
	279	tmp = (mfdcr (memcfgd) & ~0xFFE00000) \| 0x90800000;
	280	mtdcr (memcfga, mem_mcopt1);
	281	mtdcr (memcfgd, tmp);
	282	udelay (600);
7f70e853 WD	283	for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
7f70e853 WD	284	;
47d1a6e1 WD	285	udelay (400);
	286	mtdcr (memcfga, mem_ecccf);
	287	tmp = mfdcr (memcfgd);
47d1a6e1 WD	288	tmp \|= 0x00800000;
	289	mtdcr (memcfgd, tmp);
	290	udelay (400);
7f70e853 WD	291	printf ("enabled.\n");
7f70e853 WD	292	return (0);
47d1a6e1 WD	293	}
	294
	295	/* ------------------------------------------------------------------------- */
	296	static u8 dhcp_env_update (u8 thing, u8 pop)
	297	{
	298	u8 i, oplen;
	299
	300	oplen = *(pop + 1);
	301
	302	if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
	303	printf ("Whoops! failed to malloc space for DHCP thing %s\n",
	304	Things[thing].envname);
	305	return NULL;
	306	}
	307	for (i = 0; (i < oplen); i++)
	308	if (((Things[thing].dhcpvalue + i) = (pop + 2 + i)) == ' ')
	309	break;
	310	*(Things[thing].dhcpvalue + i) = '\0';
	311
	312	/* set env. */
	313	if (Things[thing].envname)
7f70e853	314	{
47d1a6e1	315	setenv (Things[thing].envname, Things[thing].dhcpvalue);
7f70e853	316	}
77ddac94	317	return ((u8 *)(Things[thing].dhcpvalue));
47d1a6e1 WD	318	}
	319
	320	/* ------------------------------------------------------------------------- */
	321	u8 dhcp_vendorex_prep (u8 e)
	322	{
	323	u8 thing;
	324
	325	/* ask for the things I want. */
	326	e++ = 55; / Parameter Request List */
	327	*e++ = N_THINGS;
	328	for (thing = 0; thing < N_THINGS; thing++)
	329	*e++ = Things[thing].dhcp_option;
	330	*e++ = 255;
	331
	332	return e;
	333	}
	334
	335	/* ------------------------------------------------------------------------- */
	336	/* .. return NULL means it wasnt mine, non-null means I got it..*/
	337	u8 dhcp_vendorex_proc (u8 pop)
	338	{
	339	u8 oplen, sub_op, sub_oplen, retval;
	340	u8 thing = 0;
	341
	342	retval = NULL;
	343	oplen = *(pop + 1);
	344	/* if pop is vender spec indicator, there are sub-options. */
	345	if (*pop == DHCP_VENDOR_SPECX) {
	346	for (sub_op = pop + 2;
	347	oplen && (sub_oplen = *(sub_op + 1));
	348	oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
	349	for (thing = 0; thing < N_THINGS; thing++) {
	350	if (*sub_op == Things[thing].dhcp_vendor_option) {
7f70e853 WD	351	if (!(retval = dhcp_env_update (thing, sub_op))) {
	352	return NULL;
	353	}
47d1a6e1 WD	354	}
	355	}
	356	}
	357	} else {
	358	for (thing = 0; thing < N_THINGS; thing++) {
	359	if (*pop == Things[thing].dhcp_option)
	360	if (!(retval = dhcp_env_update (thing, pop)))
	361	return NULL;
	362	}
	363	}
7f70e853	364	return (pop);
47d1a6e1	365	}