]> git.ipfire.org Git - people/ms/u-boot.git/blame - board/cray/L1/flash.c
rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / cray / L1 / flash.c
CommitLineData
fe8c2806
WD
1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Modified 4/5/2001
26 * Wait for completion of each sector erase command issued
27 * 4/5/2001
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
29 */
30
31/*
32 * Modified July 20, 2001
33 * Strip down to support ONLY the AMD29F032B.
34 * Dave Updegraff - Cray, Inc. dave@cray.com
35 */
36
37#include <common.h>
38#include <ppc4xx.h>
39#include <asm/processor.h>
40
41/* The flash chip we use... */
42#define AMD_ID_F032B 0x41 /* 29F032B ID 32 Mbit,64 64Kx8 sectors */
43#define FLASH_AM320B 0x0009
44
45
6d0f6bcf 46flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
fe8c2806
WD
47
48/*-----------------------------------------------------------------------
49 * Functions
50 */
51static ulong flash_get_size (vu_long *addr, flash_info_t *info);
52static int write_word (flash_info_t *info, ulong dest, ulong data);
53static void flash_get_offsets (ulong base, flash_info_t *info);
54
55#define ADDR0 0x5555
56#define ADDR1 0x2aaa
57#define FLASH_WORD_SIZE unsigned char
58
59/*-----------------------------------------------------------------------
60 */
61
62unsigned long flash_init (void)
63{
64 unsigned long size_b0, size_b1;
65 int i;
66
67 /* Init: no FLASHes known */
6d0f6bcf 68 for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
fe8c2806
WD
69 flash_info[i].flash_id = FLASH_UNKNOWN;
70 }
71
72 /* Static FLASH Bank configuration here - FIXME XXX */
73
74 size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
75
76 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
77 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
78 size_b0, size_b0<<20);
79 }
80
81 /* Only one bank */
6d0f6bcf 82 if (CONFIG_SYS_MAX_FLASH_BANKS == 1)
fe8c2806
WD
83 {
84 /* Setup offsets */
85 flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
86
87#if 0
88 /* Monitor protection ON by default */
89 (void)flash_protect(FLAG_PROTECT_SET,
90 FLASH_BASE0_PRELIM,
3b57fe0a 91 FLASH_BASE0_PRELIM+monitor_flash_len-1,
fe8c2806
WD
92 &flash_info[0]);
93#endif
94 size_b1 = 0 ;
95 flash_info[0].size = size_b0;
96 }
97
98 return (size_b0 + size_b1);
99}
100
101
fe8c2806
WD
102/*-----------------------------------------------------------------------
103 */
104static void flash_get_offsets (ulong base, flash_info_t *info)
105{
106 int i;
107
108 /* set up sector start address table */
109 for (i = 0; i < info->sector_count; i++)
110 info->start[i] = base + (i * 0x00010000);
111}
112
113/*-----------------------------------------------------------------------
114 */
115void flash_print_info (flash_info_t *info)
116{
117 int i;
8bde7f77
WD
118 int k;
119 int size;
120 int erased;
121 volatile unsigned long *flash;
fe8c2806
WD
122
123 if (info->flash_id == FLASH_UNKNOWN) {
124 printf ("missing or unknown FLASH type\n");
125 return;
126 }
127
128 switch (info->flash_id & FLASH_VENDMASK) {
129 case FLASH_MAN_AMD: printf ("AMD "); break;
130 default: printf ("Unknown Vendor "); break;
131 }
132
133 switch (info->flash_id & FLASH_TYPEMASK) {
134 case FLASH_AM320B:printf ("AM29F032B (32 Mbit 64x64KB uniform sectors)\n");
135 break;
136 default: printf ("Unknown Chip Type\n");
137 break;
138 }
139
140 printf (" Size: %ld KB in %d Sectors\n",
141 info->size >> 10, info->sector_count);
142
143 printf (" Sector Start Addresses:");
144 for (i=0; i<info->sector_count; ++i) {
8bde7f77
WD
145 /*
146 * Check if whole sector is erased
147 */
148 if (i != (info->sector_count-1))
149 size = info->start[i+1] - info->start[i];
150 else
151 size = info->start[0] + info->size - info->start[i];
152 erased = 1;
153 flash = (volatile unsigned long *)info->start[i];
154 size = size >> 2; /* divide by 4 for longword access */
155 for (k=0; k<size; k++)
156 {
157 if (*flash++ != 0xffffffff)
158 {
159 erased = 0;
160 break;
161 }
162 }
fe8c2806
WD
163
164 if ((i % 5) == 0)
165 printf ("\n ");
166
167 printf (" %08lX%s%s",
168 info->start[i],
169 erased ? " E" : " ",
170 info->protect[i] ? "RO " : " "
171 );
172 }
173 printf ("\n");
174}
175
176/*-----------------------------------------------------------------------
177 */
178
179
180/*-----------------------------------------------------------------------
181 */
182
183/*
184 * The following code cannot be run from FLASH!
185 */
186static ulong flash_get_size (vu_long *addr, flash_info_t *info)
187{
188 short i;
189 FLASH_WORD_SIZE value;
190 ulong base = (ulong)addr;
8bde7f77 191 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
fe8c2806
WD
192
193 /* Write auto select command: read Manufacturer ID */
194 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
195 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
196 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
197
198 value = addr2[0];
199
200 switch (value) {
201 case (FLASH_WORD_SIZE)AMD_MANUFACT:
202 info->flash_id = FLASH_MAN_AMD;
203 break;
204 default:
205 info->flash_id = FLASH_UNKNOWN;
206 info->sector_count = 0;
207 info->size = 0;
208 return (0); /* no or unknown flash */
209 }
210
211 value = addr2[1]; /* device ID */
212
213 switch (value) {
214 case (FLASH_WORD_SIZE)AMD_ID_F032B:
215 info->flash_id += FLASH_AM320B;
216 info->sector_count = 64;
217 info->size = 0x0400000; /* => 4 MB */
218 break;
219 default:
220 info->flash_id = FLASH_UNKNOWN;
221 return (0); /* => no or unknown flash */
222
223 }
224
225 /* set up sector start address table */
226 for (i = 0; i < info->sector_count; i++)
227 info->start[i] = base + (i * 0x00010000);
228
229 /* check for protected sectors */
230 for (i = 0; i < info->sector_count; i++) {
231 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
232 /* D0 = 1 if protected */
233 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
8bde7f77 234 info->protect[i] = addr2[2] & 1;
fe8c2806
WD
235 }
236
237 /*
238 * Prevent writes to uninitialized FLASH.
239 */
240 if (info->flash_id != FLASH_UNKNOWN) {
241 addr2 = (FLASH_WORD_SIZE *)info->start[0];
242 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
243 }
244
245 return (info->size);
246}
247
248int wait_for_DQ7(flash_info_t *info, int sect)
249{
250 ulong start, now, last;
251 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
252
253 start = get_timer (0);
254 last = start;
255 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
6d0f6bcf 256 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
8bde7f77
WD
257 printf ("Timeout\n");
258 return -1;
259 }
260 /* show that we're waiting */
261 if ((now - last) > 1000) { /* every second */
262 putc ('.');
263 last = now;
264 }
fe8c2806
WD
265 }
266 return 0;
267}
268
269/*-----------------------------------------------------------------------
270 */
271
272int flash_erase (flash_info_t *info, int s_first, int s_last)
273{
274 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
275 volatile FLASH_WORD_SIZE *addr2;
276 int flag, prot, sect, l_sect;
277
278 if ((s_first < 0) || (s_first > s_last)) {
279 if (info->flash_id == FLASH_UNKNOWN) {
280 printf ("- missing\n");
281 } else {
282 printf ("- no sectors to erase\n");
283 }
284 return 1;
285 }
286
287 if (info->flash_id == FLASH_UNKNOWN) {
288 printf ("Can't erase unknown flash type - aborted\n");
289 return 1;
290 }
291
292 prot = 0;
293 for (sect=s_first; sect<=s_last; ++sect) {
294 if (info->protect[sect]) {
295 prot++;
296 }
297 }
298
299 if (prot) {
300 printf ("- Warning: %d protected sectors will not be erased!\n",
301 prot);
302 } else {
303 printf ("\n");
304 }
305
306 l_sect = -1;
307
308 /* Disable interrupts which might cause a timeout here */
309 flag = disable_interrupts();
310
311 /* Start erase on unprotected sectors */
312 for (sect = s_first; sect<=s_last; sect++) {
313 if (info->protect[sect] == 0) { /* not protected */
314 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
315 printf("Erasing sector %p\n", addr2);
316
317 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
318 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
319 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
320 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
321 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
322 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
323 l_sect = sect;
324 /*
325 * Wait for each sector to complete, it's more
326 * reliable. According to AMD Spec, you must
327 * issue all erase commands within a specified
328 * timeout. This has been seen to fail, especially
329 * if printf()s are included (for debug)!!
330 */
331 wait_for_DQ7(info, sect);
332 }
333 }
334
335 /* re-enable interrupts if necessary */
336 if (flag)
337 enable_interrupts();
338
339 /* wait at least 80us - let's wait 1 ms */
340 udelay (1000);
341
342 /* reset to read mode */
343 addr = (FLASH_WORD_SIZE *)info->start[0];
344 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
345
346 printf (" done\n");
347 return 0;
348}
349
350/*-----------------------------------------------------------------------
351 * Copy memory to flash, returns:
352 * 0 - OK
353 * 1 - write timeout
354 * 2 - Flash not erased
355 */
356
357int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
358{
359 ulong cp, wp, data;
360 int i, l, rc;
361
362 wp = (addr & ~3); /* get lower word aligned address */
363
364 /*
365 * handle unaligned start bytes
366 */
367 if ((l = addr - wp) != 0) {
368 data = 0;
369 for (i=0, cp=wp; i<l; ++i, ++cp) {
370 data = (data << 8) | (*(uchar *)cp);
371 }
372 for (; i<4 && cnt>0; ++i) {
373 data = (data << 8) | *src++;
374 --cnt;
375 ++cp;
376 }
377 for (; cnt==0 && i<4; ++i, ++cp) {
378 data = (data << 8) | (*(uchar *)cp);
379 }
380
381 if ((rc = write_word(info, wp, data)) != 0) {
382 return (rc);
383 }
384 wp += 4;
385 }
386
387 /*
388 * handle word aligned part
389 */
390 while (cnt >= 4) {
391 data = 0;
392 for (i=0; i<4; ++i) {
393 data = (data << 8) | *src++;
394 }
395 if ((rc = write_word(info, wp, data)) != 0) {
396 return (rc);
397 }
398 wp += 4;
399 cnt -= 4;
400 }
401
402 if (cnt == 0) {
403 return (0);
404 }
405
406 /*
407 * handle unaligned tail bytes
408 */
409 data = 0;
410 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
411 data = (data << 8) | *src++;
412 --cnt;
413 }
414 for (; i<4; ++i, ++cp) {
415 data = (data << 8) | (*(uchar *)cp);
416 }
417
418 return (write_word(info, wp, data));
419}
420
421/*-----------------------------------------------------------------------
422 * Write a word to Flash, returns:
423 * 0 - OK
424 * 1 - write timeout
425 * 2 - Flash not erased
426 */
427static int write_word (flash_info_t *info, ulong dest, ulong data)
428{
8bde7f77
WD
429 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
430 volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
431 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
fe8c2806
WD
432 ulong start;
433 int flag;
8bde7f77 434 int i;
fe8c2806
WD
435
436 /* Check if Flash is (sufficiently) erased */
437 if ((*((volatile FLASH_WORD_SIZE *)dest) &
8bde7f77 438 (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
fe8c2806
WD
439 return (2);
440 }
441 /* Disable interrupts which might cause a timeout here */
442 flag = disable_interrupts();
443
8bde7f77
WD
444 for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
445 {
446 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
447 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
448 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
449
450 dest2[i] = data2[i];
451
452 /* re-enable interrupts if necessary */
453 if (flag)
454 enable_interrupts();
455
456 /* data polling for D7 */
457 start = get_timer (0);
458 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
459 (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
6d0f6bcf 460 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
8bde7f77
WD
461 return (1);
462 }
463 }
464 }
fe8c2806
WD
465
466 return (0);
467}
468
469/*-----------------------------------------------------------------------
470 */