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Commit | Line | Data |
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b9eb3fdf SB |
1 | /* |
2 | * (C) Copyright 2010 | |
3 | * Stefano Babic, DENX Software Engineering, sbabic@denx.de | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
b9eb3fdf SB |
6 | */ |
7 | ||
8 | #include <common.h> | |
86271115 SB |
9 | #include <asm/arch/clock.h> |
10 | #include <asm/arch/imx-regs.h> | |
9400f592 | 11 | #include <asm/gpio.h> |
b9eb3fdf SB |
12 | #include <fpga.h> |
13 | #include <lattice.h> | |
14 | #include "qong_fpga.h" | |
15 | ||
16 | DECLARE_GLOBAL_DATA_PTR; | |
17 | ||
18 | #if defined(CONFIG_FPGA) | |
19 | ||
20 | static void qong_jtag_init(void) | |
21 | { | |
22 | return; | |
23 | } | |
24 | ||
25 | static void qong_fpga_jtag_set_tdi(int value) | |
26 | { | |
9400f592 | 27 | gpio_set_value(QONG_FPGA_TDI_PIN, value); |
b9eb3fdf SB |
28 | } |
29 | ||
30 | static void qong_fpga_jtag_set_tms(int value) | |
31 | { | |
9400f592 | 32 | gpio_set_value(QONG_FPGA_TMS_PIN, value); |
b9eb3fdf SB |
33 | } |
34 | ||
35 | static void qong_fpga_jtag_set_tck(int value) | |
36 | { | |
9400f592 | 37 | gpio_set_value(QONG_FPGA_TCK_PIN, value); |
b9eb3fdf SB |
38 | } |
39 | ||
40 | static int qong_fpga_jtag_get_tdo(void) | |
41 | { | |
9400f592 | 42 | return gpio_get_value(QONG_FPGA_TDO_PIN); |
b9eb3fdf SB |
43 | } |
44 | ||
45 | lattice_board_specific_func qong_fpga_fns = { | |
46 | qong_jtag_init, | |
47 | qong_fpga_jtag_set_tdi, | |
48 | qong_fpga_jtag_set_tms, | |
49 | qong_fpga_jtag_set_tck, | |
50 | qong_fpga_jtag_get_tdo | |
51 | }; | |
52 | ||
53 | Lattice_desc qong_fpga[CONFIG_FPGA_COUNT] = { | |
54 | { | |
55 | Lattice_XP2, | |
56 | lattice_jtag_mode, | |
57 | 356519, | |
58 | (void *) &qong_fpga_fns, | |
59 | NULL, | |
60 | 0, | |
61 | "lfxp2_5e_ftbga256" | |
62 | }, | |
63 | }; | |
64 | ||
65 | int qong_fpga_init(void) | |
66 | { | |
67 | int i; | |
68 | ||
69 | fpga_init(); | |
70 | ||
71 | for (i = 0; i < CONFIG_FPGA_COUNT; i++) { | |
72 | fpga_add(fpga_lattice, &qong_fpga[i]); | |
73 | } | |
74 | return 0; | |
75 | } | |
76 | ||
77 | #endif |