]> git.ipfire.org Git - people/ms/u-boot.git/blame - board/esd/du405/flash.c
Add GPL-2.0+ SPDX-License-Identifier to source files
[people/ms/u-boot.git] / board / esd / du405 / flash.c
CommitLineData
affae2bf
WD
1/*
2 * (C) Copyright 2001
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
affae2bf
WD
6 */
7
8#include <common.h>
b36df561 9#include <asm/ppc4xx.h>
affae2bf
WD
10#include <asm/processor.h>
11
12/*
13 * include common flash code (for esd boards)
14 */
15#include "../common/flash.c"
16
17/*-----------------------------------------------------------------------
18 * Functions
19 */
20static ulong flash_get_size (vu_long * addr, flash_info_t * info);
21static void flash_get_offsets (ulong base, flash_info_t * info);
22
23/*-----------------------------------------------------------------------
24 */
25
26unsigned long flash_init (void)
27{
28 unsigned long size_b0, size_b1;
29 int i;
30 uint pbcr;
31 unsigned long base_b0, base_b1;
32
33 /* Init: no FLASHes known */
6d0f6bcf 34 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
affae2bf
WD
35 flash_info[i].flash_id = FLASH_UNKNOWN;
36 }
37
38 /* Static FLASH Bank configuration here - FIXME XXX */
39
40 base_b0 = FLASH_BASE0_PRELIM;
41 size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
42
43 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
44 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
45 size_b0, size_b0 << 20);
46 }
47
48 base_b1 = FLASH_BASE1_PRELIM;
49 size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
50
51 /* Re-do sizing to get full correct info */
52
53 if (size_b1) {
d1c3b275
SR
54 mtdcr (EBC0_CFGADDR, PB0CR);
55 pbcr = mfdcr (EBC0_CFGDATA);
56 mtdcr (EBC0_CFGADDR, PB0CR);
affae2bf
WD
57 base_b1 = -size_b1;
58 pbcr = (pbcr & 0x0001ffff) | base_b1 |
59 (((size_b1 / 1024 / 1024) - 1) << 17);
d1c3b275
SR
60 mtdcr (EBC0_CFGDATA, pbcr);
61 /* printf("PB1CR = %x\n", pbcr); */
affae2bf
WD
62 }
63
64 if (size_b0) {
d1c3b275
SR
65 mtdcr (EBC0_CFGADDR, PB1CR);
66 pbcr = mfdcr (EBC0_CFGDATA);
67 mtdcr (EBC0_CFGADDR, PB1CR);
affae2bf
WD
68 base_b0 = base_b1 - size_b0;
69 pbcr = (pbcr & 0x0001ffff) | base_b0 |
70 (((size_b0 / 1024 / 1024) - 1) << 17);
d1c3b275
SR
71 mtdcr (EBC0_CFGDATA, pbcr);
72 /* printf("PB0CR = %x\n", pbcr); */
affae2bf
WD
73 }
74
75 size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
76
77 flash_get_offsets (base_b0, &flash_info[0]);
78
79 /* monitor protection ON by default */
80 flash_protect (FLAG_PROTECT_SET,
3b57fe0a 81 base_b0 + size_b0 - monitor_flash_len,
affae2bf
WD
82 base_b0 + size_b0 - 1, &flash_info[0]);
83
84 if (size_b1) {
85 /* Re-do sizing to get full correct info */
86 size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
87
88 flash_get_offsets (base_b1, &flash_info[1]);
89
90 /* monitor protection ON by default */
91 flash_protect (FLAG_PROTECT_SET,
3b57fe0a 92 base_b1 + size_b1 - monitor_flash_len,
affae2bf
WD
93 base_b1 + size_b1 - 1, &flash_info[1]);
94 /* monitor protection OFF by default (one is enough) */
95 flash_protect (FLAG_PROTECT_CLEAR,
3b57fe0a 96 base_b0 + size_b0 - monitor_flash_len,
affae2bf
WD
97 base_b0 + size_b0 - 1, &flash_info[0]);
98 } else {
99 flash_info[1].flash_id = FLASH_UNKNOWN;
100 flash_info[1].sector_count = -1;
101 }
102
103 flash_info[0].size = size_b0;
104 flash_info[1].size = size_b1;
105
106 return (size_b0 + size_b1);
107}