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d1712369 | 1 | /* |
e02aea61 | 2 | * Copyright 2008-2011 Freescale Semiconductor, Inc. |
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3 | * |
4 | * (C) Copyright 2000 | |
5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
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8 | */ |
9 | ||
10 | #include <common.h> | |
11 | #include <asm/fsl_law.h> | |
12 | #include <asm/mmu.h> | |
13 | ||
14 | struct law_entry law_table[] = { | |
15 | SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC), | |
be1ff615 | 16 | #ifdef CONFIG_SYS_BMAN_MEM_PHYS |
d1712369 | 17 | SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN), |
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18 | #endif |
19 | #ifdef CONFIG_SYS_QMAN_MEM_PHYS | |
d1712369 | 20 | SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN), |
be1ff615 | 21 | #endif |
f8bc7bb5 | 22 | #ifdef PIXIS_BASE_PHYS |
d1712369 | 23 | SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), |
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24 | #endif |
25 | #ifdef CPLD_BASE_PHYS | |
26 | SET_LAW(CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), | |
27 | #endif | |
d1712369 | 28 | #ifdef CONFIG_SYS_DCSRBAR_PHYS |
f110fe94 SG |
29 | /* Limit DCSR to 32M to access NPC Trace Buffer */ |
30 | SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), | |
d1712369 | 31 | #endif |
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32 | #ifdef CONFIG_SYS_NAND_BASE_PHYS |
33 | SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), | |
34 | #endif | |
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35 | }; |
36 | ||
37 | int num_law_entries = ARRAY_SIZE(law_table); |