[people/ms/u-boot.git] / board / freescale / common / vid.c

/*
 * Copyright 2014 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:     GPL-2.0+
 */

#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/io.h>
#ifdef CONFIG_FSL_LSCH2
#include <asm/arch/immap_lsch2.h>
#elif defined(CONFIG_FSL_LSCH3)
#include <asm/arch/immap_lsch3.h>
#else
#include <asm/immap_85xx.h>
#endif
#include "vid.h"

DECLARE_GLOBAL_DATA_PTR;

int __weak i2c_multiplexer_select_vid_channel(u8 channel)
{
	return 0;
}

/*
 * Compensate for a board specific voltage drop between regulator and SoC
 * return a value in mV
 */
int __weak board_vdd_drop_compensation(void)
{
	return 0;
}

/*
 * Get the i2c address configuration for the IR regulator chip
 *
 * There are some variance in the RDB HW regarding the I2C address configuration
 * for the IR regulator chip, which is likely a problem of external resistor
 * accuracy. So we just check each address in a hopefully non-intrusive mode
 * and use the first one that seems to work
 *
 * The IR chip can show up under the following addresses:
 * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA)
 * 0x09 (Verified on T1040RDB-PA)
 * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB)
 */
static int find_ir_chip_on_i2c(void)
{
	int i2caddress;
	int ret;
	u8 byte;
	int i;
	const int ir_i2c_addr[] = {0x38, 0x08, 0x09};

	/* Check all the address */
	for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) {
		i2caddress = ir_i2c_addr[i];
		ret = i2c_read(i2caddress,
			       IR36021_MFR_ID_OFFSET, 1, (void *)&byte,
			       sizeof(byte));
		if ((ret >= 0) && (byte == IR36021_MFR_ID))
			return i2caddress;
	}
	return -1;
}

/* Maximum loop count waiting for new voltage to take effect */
#define MAX_LOOP_WAIT_NEW_VOL		100
/* Maximum loop count waiting for the voltage to be stable */
#define MAX_LOOP_WAIT_VOL_STABLE	100
/*
 * read_voltage from sensor on I2C bus
 * We use average of 4 readings, waiting for WAIT_FOR_ADC before
 * another reading
 */
#define NUM_READINGS    4       /* prefer to be power of 2 for efficiency */

/* If an INA220 chip is available, we can use it to read back the voltage
 * as it may have a higher accuracy than the IR chip for the same purpose
 */
#ifdef CONFIG_VOL_MONITOR_INA220
#define WAIT_FOR_ADC	532	/* wait for 532 microseconds for ADC */
#define ADC_MIN_ACCURACY	4
#else
#define WAIT_FOR_ADC	138	/* wait for 138 microseconds for ADC */
#define ADC_MIN_ACCURACY	4
#endif

#ifdef CONFIG_VOL_MONITOR_INA220
static int read_voltage_from_INA220(int i2caddress)
{
	int i, ret, voltage_read = 0;
	u16 vol_mon;
	u8 buf[2];

	for (i = 0; i < NUM_READINGS; i++) {
		ret = i2c_read(I2C_VOL_MONITOR_ADDR,
			       I2C_VOL_MONITOR_BUS_V_OFFSET, 1,
			       (void *)&buf, 2);
		if (ret) {
			printf("VID: failed to read core voltage\n");
			return ret;
		}
		vol_mon = (buf[0] << 8) | buf[1];
		if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) {
			printf("VID: Core voltage sensor error\n");
			return -1;
		}
		debug("VID: bus voltage reads 0x%04x\n", vol_mon);
		/* LSB = 4mv */
		voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4;
		udelay(WAIT_FOR_ADC);
	}
	/* calculate the average */
	voltage_read /= NUM_READINGS;

	return voltage_read;
}
#endif

/* read voltage from IR */
#ifdef CONFIG_VOL_MONITOR_IR36021_READ
static int read_voltage_from_IR(int i2caddress)
{
	int i, ret, voltage_read = 0;
	u16 vol_mon;
	u8 buf;

	for (i = 0; i < NUM_READINGS; i++) {
		ret = i2c_read(i2caddress,
			       IR36021_LOOP1_VOUT_OFFSET,
			       1, (void *)&buf, 1);
		if (ret) {
			printf("VID: failed to read vcpu\n");
			return ret;
		}
		vol_mon = buf;
		if (!vol_mon) {
			printf("VID: Core voltage sensor error\n");
			return -1;
		}
		debug("VID: bus voltage reads 0x%02x\n", vol_mon);
		/* Resolution is 1/128V. We scale up here to get 1/128mV
		 * and divide at the end
		 */
		voltage_read += vol_mon * 1000;
		udelay(WAIT_FOR_ADC);
	}
	/* Scale down to the real mV as IR resolution is 1/128V, rounding up */
	voltage_read = DIV_ROUND_UP(voltage_read, 128);

	/* calculate the average */
	voltage_read /= NUM_READINGS;

	/* Compensate for a board specific voltage drop between regulator and
	 * SoC before converting into an IR VID value
	 */
	voltage_read -= board_vdd_drop_compensation();

	return voltage_read;
}
#endif

static int read_voltage(int i2caddress)
{
	int voltage_read;
#ifdef CONFIG_VOL_MONITOR_INA220
	voltage_read = read_voltage_from_INA220(i2caddress);
#elif defined CONFIG_VOL_MONITOR_IR36021_READ
	voltage_read = read_voltage_from_IR(i2caddress);
#else
	return -1;
#endif
	return voltage_read;
}

/*
 * We need to calculate how long before the voltage stops to drop
 * or increase. It returns with the loop count. Each loop takes
 * several readings (WAIT_FOR_ADC)
 */
static int wait_for_new_voltage(int vdd, int i2caddress)
{
	int timeout, vdd_current;

	vdd_current = read_voltage(i2caddress);
	/* wait until voltage starts to reach the target. Voltage slew
	 * rates by typical regulators will always lead to stable readings
	 * within each fairly long ADC interval in comparison to the
	 * intended voltage delta change until the target voltage is
	 * reached. The fairly small voltage delta change to any target
	 * VID voltage also means that this function will always complete
	 * within few iterations. If the timeout was ever reached, it would
	 * point to a serious failure in the regulator system.
	 */
	for (timeout = 0;
	     abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) &&
	     timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) {
		vdd_current = read_voltage(i2caddress);
	}
	if (timeout >= MAX_LOOP_WAIT_NEW_VOL) {
		printf("VID: Voltage adjustment timeout\n");
		return -1;
	}
	return timeout;
}

/*
 * this function keeps reading the voltage until it is stable or until the
 * timeout expires
 */
static int wait_for_voltage_stable(int i2caddress)
{
	int timeout, vdd_current, vdd;

	vdd = read_voltage(i2caddress);
	udelay(NUM_READINGS * WAIT_FOR_ADC);

	/* wait until voltage is stable */
	vdd_current = read_voltage(i2caddress);
	/* The maximum timeout is
	 * MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC
	 */
	for (timeout = MAX_LOOP_WAIT_VOL_STABLE;
	     abs(vdd - vdd_current) > ADC_MIN_ACCURACY &&
	     timeout > 0; timeout--) {
		vdd = vdd_current;
		udelay(NUM_READINGS * WAIT_FOR_ADC);
		vdd_current = read_voltage(i2caddress);
	}
	if (timeout == 0)
		return -1;
	return vdd_current;
}

#ifdef CONFIG_VOL_MONITOR_IR36021_SET
/* Set the voltage to the IR chip */
static int set_voltage_to_IR(int i2caddress, int vdd)
{
	int wait, vdd_last;
	int ret;
	u8 vid;

	/* Compensate for a board specific voltage drop between regulator and
	 * SoC before converting into an IR VID value
	 */
	vdd += board_vdd_drop_compensation();
#ifdef CONFIG_FSL_LSCH2
	vid = DIV_ROUND_UP(vdd - 265, 5);
#else
	vid = DIV_ROUND_UP(vdd - 245, 5);
#endif

	ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET,
			1, (void *)&vid, sizeof(vid));
	if (ret) {
		printf("VID: failed to write VID\n");
		return -1;
	}
	wait = wait_for_new_voltage(vdd, i2caddress);
	if (wait < 0)
		return -1;
	debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC);

	vdd_last = wait_for_voltage_stable(i2caddress);
	if (vdd_last < 0)
		return -1;
	debug("VID: Current voltage is %d mV\n", vdd_last);
	return vdd_last;
}
#endif

static int set_voltage(int i2caddress, int vdd)
{
	int vdd_last = -1;

#ifdef CONFIG_VOL_MONITOR_IR36021_SET
	vdd_last = set_voltage_to_IR(i2caddress, vdd);
#else
	#error Specific voltage monitor must be defined
#endif
	return vdd_last;
}

#ifdef CONFIG_FSL_LSCH3
int adjust_vdd(ulong vdd_override)
{
	int re_enable = disable_interrupts();
	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
	u32 fusesr;
	u8 vid, buf;
	int vdd_target, vdd_current, vdd_last;
	int ret, i2caddress;
	unsigned long vdd_string_override;
	char *vdd_string;
#ifdef CONFIG_ARCH_LS1088A
	static const uint16_t vdd[32] = {
		10250,
		9875,
		9750,
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		9000,
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		10000,  /* 1.0000V */
		10125,
		10250,
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
	};

#else
	static const uint16_t vdd[32] = {
		10500,
		0,      /* reserved */
		9750,
		0,      /* reserved */
		9500,
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		10000,  /* 1.0000V */
		0,      /* reserved */
		10250,
		0,      /* reserved */
		10500,
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
		0,      /* reserved */
	};
#endif
	struct vdd_drive {
		u8 vid;
		unsigned voltage;
	};

	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
	if (ret) {
		debug("VID: I2C failed to switch channel\n");
		ret = -1;
		goto exit;
	}
	ret = find_ir_chip_on_i2c();
	if (ret < 0) {
		printf("VID: Could not find voltage regulator on I2C.\n");
		ret = -1;
		goto exit;
	} else {
		i2caddress = ret;
		debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
	}

	/* check IR chip work on Intel mode*/
	ret = i2c_read(i2caddress,
		       IR36021_INTEL_MODE_OOFSET,
		       1, (void *)&buf, 1);
	if (ret) {
		printf("VID: failed to read IR chip mode.\n");
		ret = -1;
		goto exit;
	}
	if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
		printf("VID: IR Chip is not used in Intel mode.\n");
		ret = -1;
		goto exit;
	}

	/* get the voltage ID from fuse status register */
	fusesr = in_le32(&gur->dcfg_fusesr);
	vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) &
		FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK;
	if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) {
		vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) &
			FSL_CHASSIS3_DCFG_FUSESR_VID_MASK;
	}
	vdd_target = vdd[vid];

	/* check override variable for overriding VDD */
	vdd_string = env_get(CONFIG_VID_FLS_ENV);
	if (vdd_override == 0 && vdd_string &&
	    !strict_strtoul(vdd_string, 10, &vdd_string_override))
		vdd_override = vdd_string_override;

	if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
		vdd_target = vdd_override * 10; /* convert to 1/10 mV */
		debug("VDD override is %lu\n", vdd_override);
	} else if (vdd_override != 0) {
		printf("Invalid value.\n");
	}

	/* divide and round up by 10 to get a value in mV */
	vdd_target = DIV_ROUND_UP(vdd_target, 10);
	if (vdd_target == 0) {
		debug("VID: VID not used\n");
		ret = 0;
		goto exit;
	} else if (vdd_target < VDD_MV_MIN || vdd_target > VDD_MV_MAX) {
		/* Check vdd_target is in valid range */
		printf("VID: Target VID %d mV is not in range.\n",
		       vdd_target);
		ret = -1;
		goto exit;
	} else {
		debug("VID: vid = %d mV\n", vdd_target);
	}

	/*
	 * Read voltage monitor to check real voltage.
	 */
	vdd_last = read_voltage(i2caddress);
	if (vdd_last < 0) {
		printf("VID: Couldn't read sensor abort VID adjustment\n");
		ret = -1;
		goto exit;
	}
	vdd_current = vdd_last;
	debug("VID: Core voltage is currently at %d mV\n", vdd_last);
	/*
	  * Adjust voltage to at or one step above target.
	  * As measurements are less precise than setting the values
	  * we may run through dummy steps that cancel each other
	  * when stepping up and then down.
	  */
	while (vdd_last > 0 &&
	       vdd_last < vdd_target) {
		vdd_current += IR_VDD_STEP_UP;
		vdd_last = set_voltage(i2caddress, vdd_current);
	}
	while (vdd_last > 0 &&
	       vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
		vdd_current -= IR_VDD_STEP_DOWN;
		vdd_last = set_voltage(i2caddress, vdd_current);
	}

	if (vdd_last > 0)
		printf("VID: Core voltage after adjustment is at %d mV\n",
		       vdd_last);
	else
		ret = -1;
exit:
	if (re_enable)
		enable_interrupts();
	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
	return ret;
}
#else /* !CONFIG_FSL_LSCH3 */
int adjust_vdd(ulong vdd_override)
{
	int re_enable = disable_interrupts();
#if defined(CONFIG_FSL_LSCH2)
	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
#else
	ccsr_gur_t __iomem *gur =
		(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
#endif
	u32 fusesr;
	u8 vid, buf;
	int vdd_target, vdd_current, vdd_last;
	int ret, i2caddress;
	unsigned long vdd_string_override;
	char *vdd_string;
	static const uint16_t vdd[32] = {
		0,      /* unused */
		9875,   /* 0.9875V */
		9750,
		9625,
		9500,
		9375,
		9250,
		9125,
		9000,
		8875,
		8750,
		8625,
		8500,
		8375,
		8250,
		8125,
		10000,  /* 1.0000V */
		10125,
		10250,
		10375,
		10500,
		10625,
		10750,
		10875,
		11000,
		0,      /* reserved */
	};
	struct vdd_drive {
		u8 vid;
		unsigned voltage;
	};

	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
	if (ret) {
		debug("VID: I2C failed to switch channel\n");
		ret = -1;
		goto exit;
	}
	ret = find_ir_chip_on_i2c();
	if (ret < 0) {
		printf("VID: Could not find voltage regulator on I2C.\n");
		ret = -1;
		goto exit;
	} else {
		i2caddress = ret;
		debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
	}

	/* check IR chip work on Intel mode*/
	ret = i2c_read(i2caddress,
		       IR36021_INTEL_MODE_OOFSET,
		       1, (void *)&buf, 1);
	if (ret) {
		printf("VID: failed to read IR chip mode.\n");
		ret = -1;
		goto exit;
	}
	if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
		printf("VID: IR Chip is not used in Intel mode.\n");
		ret = -1;
		goto exit;
	}

	/* get the voltage ID from fuse status register */
	fusesr = in_be32(&gur->dcfg_fusesr);
	/*
	 * VID is used according to the table below
	 *                ---------------------------------------
	 *                |                DA_V                 |
	 *                |-------------------------------------|
	 *                | 5b00000 | 5b00001-5b11110 | 5b11111 |
	 * ---------------+---------+-----------------+---------|
	 * | D | 5b00000  | NO VID  | VID = DA_V      | NO VID  |
	 * | A |----------+---------+-----------------+---------|
	 * | _ | 5b00001  |VID =    | VID =           |VID =    |
	 * | V |   ~      | DA_V_ALT|   DA_V_ALT      | DA_A_VLT|
	 * | _ | 5b11110  |         |                 |         |
	 * | A |----------+---------+-----------------+---------|
	 * | L | 5b11111  | No VID  | VID = DA_V      | NO VID  |
	 * | T |          |         |                 |         |
	 * ------------------------------------------------------
	 */
#ifdef CONFIG_FSL_LSCH2
	vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) &
		FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK;
	if ((vid == 0) || (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) {
		vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) &
			FSL_CHASSIS2_DCFG_FUSESR_VID_MASK;
	}
#else
	vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) &
		FSL_CORENET_DCFG_FUSESR_ALTVID_MASK;
	if ((vid == 0) || (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) {
		vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) &
			FSL_CORENET_DCFG_FUSESR_VID_MASK;
	}
#endif
	vdd_target = vdd[vid];

	/* check override variable for overriding VDD */
	vdd_string = env_get(CONFIG_VID_FLS_ENV);
	if (vdd_override == 0 && vdd_string &&
	    !strict_strtoul(vdd_string, 10, &vdd_string_override))
		vdd_override = vdd_string_override;
	if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
		vdd_target = vdd_override * 10; /* convert to 1/10 mV */
		debug("VDD override is %lu\n", vdd_override);
	} else if (vdd_override != 0) {
		printf("Invalid value.\n");
	}
	if (vdd_target == 0) {
		debug("VID: VID not used\n");
		ret = 0;
		goto exit;
	} else {
		/* divide and round up by 10 to get a value in mV */
		vdd_target = DIV_ROUND_UP(vdd_target, 10);
		debug("VID: vid = %d mV\n", vdd_target);
	}

	/*
	 * Read voltage monitor to check real voltage.
	 */
	vdd_last = read_voltage(i2caddress);
	if (vdd_last < 0) {
		printf("VID: Couldn't read sensor abort VID adjustment\n");
		ret = -1;
		goto exit;
	}
	vdd_current = vdd_last;
	debug("VID: Core voltage is currently at %d mV\n", vdd_last);
	/*
	  * Adjust voltage to at or one step above target.
	  * As measurements are less precise than setting the values
	  * we may run through dummy steps that cancel each other
	  * when stepping up and then down.
	  */
	while (vdd_last > 0 &&
	       vdd_last < vdd_target) {
		vdd_current += IR_VDD_STEP_UP;
		vdd_last = set_voltage(i2caddress, vdd_current);
	}
	while (vdd_last > 0 &&
	       vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
		vdd_current -= IR_VDD_STEP_DOWN;
		vdd_last = set_voltage(i2caddress, vdd_current);
	}

	if (vdd_last > 0)
		printf("VID: Core voltage after adjustment is at %d mV\n",
		       vdd_last);
	else
		ret = -1;
exit:
	if (re_enable)
		enable_interrupts();

	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);

	return ret;
}
#endif

static int print_vdd(void)
{
	int vdd_last, ret, i2caddress;

	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
	if (ret) {
		debug("VID : I2c failed to switch channel\n");
		return -1;
	}
	ret = find_ir_chip_on_i2c();
	if (ret < 0) {
		printf("VID: Could not find voltage regulator on I2C.\n");
		goto exit;
	} else {
		i2caddress = ret;
		debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
	}

	/*
	 * Read voltage monitor to check real voltage.
	 */
	vdd_last = read_voltage(i2caddress);
	if (vdd_last < 0) {
		printf("VID: Couldn't read sensor abort VID adjustment\n");
		goto exit;
	}
	printf("VID: Core voltage is at %d mV\n", vdd_last);
exit:
	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);

	return ret < 0 ? -1 : 0;

}

static int do_vdd_override(cmd_tbl_t *cmdtp,
			   int flag, int argc,
			   char * const argv[])
{
	ulong override;

	if (argc < 2)
		return CMD_RET_USAGE;

	if (!strict_strtoul(argv[1], 10, &override))
		adjust_vdd(override);   /* the value is checked by callee */
	else
		return CMD_RET_USAGE;
	return 0;
}

static int do_vdd_read(cmd_tbl_t *cmdtp,
			 int flag, int argc,
			 char * const argv[])
{
	if (argc < 1)
		return CMD_RET_USAGE;
	print_vdd();

	return 0;
}

U_BOOT_CMD(
	vdd_override, 2, 0, do_vdd_override,
	"override VDD",
	" - override with the voltage specified in mV, eg. 1050"
);

U_BOOT_CMD(
	vdd_read, 1, 0, do_vdd_read,
	"read VDD",
	" - Read the voltage specified in mV"
)
Commit	Line	Data
3ad2737e YZ	1	/*
	2	* Copyright 2014 Freescale Semiconductor, Inc.
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
	8	#include <command.h>
	9	#include <i2c.h>
02b5d2ed	10	#include <asm/io.h>
126fe70d	11	#ifdef CONFIG_FSL_LSCH2
02b5d2ed	12	#include <asm/arch/immap_lsch2.h>
ed2530d0 RH	13	#elif defined(CONFIG_FSL_LSCH3)
ed2530d0 RH	14	#include <asm/arch/immap_lsch3.h>
02b5d2ed	15	#else
3ad2737e	16	#include <asm/immap_85xx.h>
02b5d2ed	17	#endif
3ad2737e YZ	18	#include "vid.h"
	19
	20	DECLARE_GLOBAL_DATA_PTR;
	21
	22	int __weak i2c_multiplexer_select_vid_channel(u8 channel)
	23	{
	24	return 0;
	25	}
	26
	27	/*
	28	* Compensate for a board specific voltage drop between regulator and SoC
	29	* return a value in mV
	30	*/
	31	int __weak board_vdd_drop_compensation(void)
	32	{
	33	return 0;
	34	}
	35
	36	/*
	37	* Get the i2c address configuration for the IR regulator chip
	38	*
	39	* There are some variance in the RDB HW regarding the I2C address configuration
	40	* for the IR regulator chip, which is likely a problem of external resistor
	41	* accuracy. So we just check each address in a hopefully non-intrusive mode
	42	* and use the first one that seems to work
	43	*
	44	* The IR chip can show up under the following addresses:
	45	* 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA)
	46	* 0x09 (Verified on T1040RDB-PA)
2f66a828	47	* 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB)
3ad2737e YZ	48	*/
	49	static int find_ir_chip_on_i2c(void)
	50	{
	51	int i2caddress;
	52	int ret;
	53	u8 byte;
	54	int i;
	55	const int ir_i2c_addr[] = {0x38, 0x08, 0x09};
	56
	57	/* Check all the address */
	58	for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) {
	59	i2caddress = ir_i2c_addr[i];
	60	ret = i2c_read(i2caddress,
	61	IR36021_MFR_ID_OFFSET, 1, (void *)&byte,
	62	sizeof(byte));
	63	if ((ret >= 0) && (byte == IR36021_MFR_ID))
	64	return i2caddress;
	65	}
	66	return -1;
	67	}
	68
	69	/* Maximum loop count waiting for new voltage to take effect */
	70	#define MAX_LOOP_WAIT_NEW_VOL 100
	71	/* Maximum loop count waiting for the voltage to be stable */
	72	#define MAX_LOOP_WAIT_VOL_STABLE 100
	73	/*
	74	* read_voltage from sensor on I2C bus
	75	* We use average of 4 readings, waiting for WAIT_FOR_ADC before
	76	* another reading
	77	*/
	78	#define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */
	79
	80	/* If an INA220 chip is available, we can use it to read back the voltage
	81	* as it may have a higher accuracy than the IR chip for the same purpose
	82	*/
	83	#ifdef CONFIG_VOL_MONITOR_INA220
	84	#define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */
	85	#define ADC_MIN_ACCURACY 4
	86	#else
	87	#define WAIT_FOR_ADC 138 /* wait for 138 microseconds for ADC */
	88	#define ADC_MIN_ACCURACY 4
	89	#endif
	90
	91	#ifdef CONFIG_VOL_MONITOR_INA220
	92	static int read_voltage_from_INA220(int i2caddress)
	93	{
	94	int i, ret, voltage_read = 0;
	95	u16 vol_mon;
	96	u8 buf[2];
	97
	98	for (i = 0; i < NUM_READINGS; i++) {
	99	ret = i2c_read(I2C_VOL_MONITOR_ADDR,
	100	I2C_VOL_MONITOR_BUS_V_OFFSET, 1,
	101	(void *)&buf, 2);
	102	if (ret) {
	103	printf("VID: failed to read core voltage\n");
	104	return ret;
	105	}
	106	vol_mon = (buf[0] << 8) \| buf[1];
	107	if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) {
	108	printf("VID: Core voltage sensor error\n");
	109	return -1;
	110	}
	111	debug("VID: bus voltage reads 0x%04x\n", vol_mon);
112	/* LSB = 4mv */
113	voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4;
114	udelay(WAIT_FOR_ADC);
115	}
116	/* calculate the average */
117	voltage_read /= NUM_READINGS;
118
119	return voltage_read;
120	}
121	#endif
122
123	/* read voltage from IR */
124	#ifdef CONFIG_VOL_MONITOR_IR36021_READ
125	static int read_voltage_from_IR(int i2caddress)
126	{
127	int i, ret, voltage_read = 0;
128	u16 vol_mon;
129	u8 buf;
130
131	for (i = 0; i < NUM_READINGS; i++) {
132	ret = i2c_read(i2caddress,
133	IR36021_LOOP1_VOUT_OFFSET,
134	1, (void *)&buf, 1);
135	if (ret) {
136	printf("VID: failed to read vcpu\n");
137	return ret;
138	}
139	vol_mon = buf;
140	if (!vol_mon) {
141	printf("VID: Core voltage sensor error\n");
142	return -1;
143	}
144	debug("VID: bus voltage reads 0x%02x\n", vol_mon);
145	/* Resolution is 1/128V. We scale up here to get 1/128mV
146	* and divide at the end
147	*/
148	voltage_read += vol_mon * 1000;
149	udelay(WAIT_FOR_ADC);
150	}
151	/* Scale down to the real mV as IR resolution is 1/128V, rounding up */
152	voltage_read = DIV_ROUND_UP(voltage_read, 128);
153
154	/* calculate the average */
155	voltage_read /= NUM_READINGS;
156
157	/* Compensate for a board specific voltage drop between regulator and
158	* SoC before converting into an IR VID value
159	*/
160	voltage_read -= board_vdd_drop_compensation();
161
162	return voltage_read;
163	}
164	#endif
165
166	static int read_voltage(int i2caddress)
167	{
168	int voltage_read;
169	#ifdef CONFIG_VOL_MONITOR_INA220
170	voltage_read = read_voltage_from_INA220(i2caddress);
171	#elif defined CONFIG_VOL_MONITOR_IR36021_READ
172	voltage_read = read_voltage_from_IR(i2caddress);
173	#else
174	return -1;
175	#endif
176	return voltage_read;
177	}
178
179	/*
180	* We need to calculate how long before the voltage stops to drop
181	* or increase. It returns with the loop count. Each loop takes
182	* several readings (WAIT_FOR_ADC)
183	*/
184	static int wait_for_new_voltage(int vdd, int i2caddress)
185	{
186	int timeout, vdd_current;
187
188	vdd_current = read_voltage(i2caddress);
189	/* wait until voltage starts to reach the target. Voltage slew
190	* rates by typical regulators will always lead to stable readings
191	* within each fairly long ADC interval in comparison to the
192	* intended voltage delta change until the target voltage is
193	* reached. The fairly small voltage delta change to any target
194	* VID voltage also means that this function will always complete
195	* within few iterations. If the timeout was ever reached, it would
196	* point to a serious failure in the regulator system.
197	*/
198	for (timeout = 0;
199	abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) &&
200	timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) {
201	vdd_current = read_voltage(i2caddress);
202	}
203	if (timeout >= MAX_LOOP_WAIT_NEW_VOL) {
204	printf("VID: Voltage adjustment timeout\n");
205	return -1;
206	}
207	return timeout;
208	}
209
210	/*
211	* this function keeps reading the voltage until it is stable or until the
212	* timeout expires
213	*/
214	static int wait_for_voltage_stable(int i2caddress)
215	{
216	int timeout, vdd_current, vdd;
217
218	vdd = read_voltage(i2caddress);
219	udelay(NUM_READINGS * WAIT_FOR_ADC);
220
221	/* wait until voltage is stable */
222	vdd_current = read_voltage(i2caddress);
223	/* The maximum timeout is
224	* MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC
225	*/
226	for (timeout = MAX_LOOP_WAIT_VOL_STABLE;
227	abs(vdd - vdd_current) > ADC_MIN_ACCURACY &&
228	timeout > 0; timeout--) {
229	vdd = vdd_current;
230	udelay(NUM_READINGS * WAIT_FOR_ADC);
231	vdd_current = read_voltage(i2caddress);
232	}
233	if (timeout == 0)
234	return -1;
235	return vdd_current;
236	}
237
238	#ifdef CONFIG_VOL_MONITOR_IR36021_SET
239	/* Set the voltage to the IR chip */
240	static int set_voltage_to_IR(int i2caddress, int vdd)
241	{
242	int wait, vdd_last;
243	int ret;
244	u8 vid;
245
246	/* Compensate for a board specific voltage drop between regulator and
247	* SoC before converting into an IR VID value
248	*/
249	vdd += board_vdd_drop_compensation();
126fe70d	250	#ifdef CONFIG_FSL_LSCH2
02b5d2ed SX	251	vid = DIV_ROUND_UP(vdd - 265, 5);
02b5d2ed SX	252	#else
3ad2737e	253	vid = DIV_ROUND_UP(vdd - 245, 5);
02b5d2ed	254	#endif
3ad2737e YZ	255
	256	ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET,
	257	1, (void *)&vid, sizeof(vid));
	258	if (ret) {
	259	printf("VID: failed to write VID\n");
	260	return -1;
	261	}
	262	wait = wait_for_new_voltage(vdd, i2caddress);
	263	if (wait < 0)
	264	return -1;
	265	debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC);
	266
	267	vdd_last = wait_for_voltage_stable(i2caddress);
	268	if (vdd_last < 0)
	269	return -1;
	270	debug("VID: Current voltage is %d mV\n", vdd_last);
	271	return vdd_last;
	272	}
	273	#endif
	274
	275	static int set_voltage(int i2caddress, int vdd)
	276	{
	277	int vdd_last = -1;
	278
	279	#ifdef CONFIG_VOL_MONITOR_IR36021_SET
	280	vdd_last = set_voltage_to_IR(i2caddress, vdd);
	281	#else
	282	#error Specific voltage monitor must be defined
	283	#endif
	284	return vdd_last;
	285	}
	286
29ca713c	287	#ifdef CONFIG_FSL_LSCH3
3ad2737e YZ	288	int adjust_vdd(ulong vdd_override)
	289	{
	290	int re_enable = disable_interrupts();
29ca713c PJ	291	struct ccsr_gur gur = (void )(CONFIG_SYS_FSL_GUTS_ADDR);
	292	u32 fusesr;
	293	u8 vid, buf;
	294	int vdd_target, vdd_current, vdd_last;
	295	int ret, i2caddress;
	296	unsigned long vdd_string_override;
	297	char *vdd_string;
c535ad4e RB	298	#ifdef CONFIG_ARCH_LS1088A
	299	static const uint16_t vdd[32] = {
	300	10250,
	301	9875,
	302	9750,
	303	0, /* reserved */
	304	0, /* reserved */
	305	0, /* reserved */
	306	0, /* reserved */
	307	0, /* reserved */
	308	9000,
	309	0, /* reserved */
	310	0, /* reserved */
	311	0, /* reserved */
	312	0, /* reserved */
	313	0, /* reserved */
	314	0, /* reserved */
	315	0, /* reserved */
	316	10000, /* 1.0000V */
	317	10125,
	318	10250,
	319	0, /* reserved */
	320	0, /* reserved */
	321	0, /* reserved */
	322	0, /* reserved */
	323	0, /* reserved */
	324	0, /* reserved */
	325	0, /* reserved */
	326	0, /* reserved */
	327	0, /* reserved */
	328	0, /* reserved */
	329	0, /* reserved */
	330	0, /* reserved */
	331	0, /* reserved */
	332	};
	333
	334	#else
29ca713c PJ	335	static const uint16_t vdd[32] = {
	336	10500,
	337	0, /* reserved */
	338	9750,
	339	0, /* reserved */
	340	9500,
	341	0, /* reserved */
	342	0, /* reserved */
	343	0, /* reserved */
	344	0, /* reserved */
	345	0, /* reserved */
	346	0, /* reserved */
	347	0, /* reserved */
	348	0, /* reserved */
	349	0, /* reserved */
	350	0, /* reserved */
	351	0, /* reserved */
	352	10000, /* 1.0000V */
	353	0, /* reserved */
	354	10250,
	355	0, /* reserved */
	356	10500,
	357	0, /* reserved */
	358	0, /* reserved */
	359	0, /* reserved */
	360	0, /* reserved */
	361	0, /* reserved */
	362	0, /* reserved */
	363	0, /* reserved */
	364	0, /* reserved */
	365	0, /* reserved */
	366	0, /* reserved */
	367	0, /* reserved */
	368	};
c535ad4e	369	#endif
29ca713c PJ	370	struct vdd_drive {
	371	u8 vid;
	372	unsigned voltage;
	373	};
	374
	375	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
	376	if (ret) {
	377	debug("VID: I2C failed to switch channel\n");
	378	ret = -1;
	379	goto exit;
	380	}
	381	ret = find_ir_chip_on_i2c();
	382	if (ret < 0) {
	383	printf("VID: Could not find voltage regulator on I2C.\n");
	384	ret = -1;
	385	goto exit;
	386	} else {
	387	i2caddress = ret;
	388	debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
	389	}
	390
	391	/* check IR chip work on Intel mode*/
	392	ret = i2c_read(i2caddress,
	393	IR36021_INTEL_MODE_OOFSET,
	394	1, (void *)&buf, 1);
	395	if (ret) {
	396	printf("VID: failed to read IR chip mode.\n");
	397	ret = -1;
	398	goto exit;
	399	}
	400	if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
	401	printf("VID: IR Chip is not used in Intel mode.\n");
	402	ret = -1;
	403	goto exit;
	404	}
	405
	406	/* get the voltage ID from fuse status register */
	407	fusesr = in_le32(&gur->dcfg_fusesr);
	408	vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) &
	409	FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK;
	410	if ((vid == 0) \|\| (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) {
	411	vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) &
	412	FSL_CHASSIS3_DCFG_FUSESR_VID_MASK;
	413	}
	414	vdd_target = vdd[vid];
	415
	416	/* check override variable for overriding VDD */
00caae6d	417	vdd_string = env_get(CONFIG_VID_FLS_ENV);
29ca713c PJ	418	if (vdd_override == 0 && vdd_string &&
	419	!strict_strtoul(vdd_string, 10, &vdd_string_override))
	420	vdd_override = vdd_string_override;
	421
	422	if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
	423	vdd_target = vdd_override * 10; /* convert to 1/10 mV */
	424	debug("VDD override is %lu\n", vdd_override);
	425	} else if (vdd_override != 0) {
	426	printf("Invalid value.\n");
	427	}
	428
	429	/* divide and round up by 10 to get a value in mV */
	430	vdd_target = DIV_ROUND_UP(vdd_target, 10);
	431	if (vdd_target == 0) {
	432	debug("VID: VID not used\n");
	433	ret = 0;
	434	goto exit;
	435	} else if (vdd_target < VDD_MV_MIN \|\| vdd_target > VDD_MV_MAX) {
	436	/* Check vdd_target is in valid range */
	437	printf("VID: Target VID %d mV is not in range.\n",
	438	vdd_target);
	439	ret = -1;
	440	goto exit;
	441	} else {
	442	debug("VID: vid = %d mV\n", vdd_target);
	443	}
	444
	445	/*
	446	* Read voltage monitor to check real voltage.
	447	*/
	448	vdd_last = read_voltage(i2caddress);
	449	if (vdd_last < 0) {
	450	printf("VID: Couldn't read sensor abort VID adjustment\n");
	451	ret = -1;
	452	goto exit;
	453	}
	454	vdd_current = vdd_last;
	455	debug("VID: Core voltage is currently at %d mV\n", vdd_last);
	456	/*
	457	* Adjust voltage to at or one step above target.
	458	* As measurements are less precise than setting the values
	459	* we may run through dummy steps that cancel each other
	460	* when stepping up and then down.
	461	*/
	462	while (vdd_last > 0 &&
	463	vdd_last < vdd_target) {
	464	vdd_current += IR_VDD_STEP_UP;
	465	vdd_last = set_voltage(i2caddress, vdd_current);
	466	}
	467	while (vdd_last > 0 &&
	468	vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
	469	vdd_current -= IR_VDD_STEP_DOWN;
	470	vdd_last = set_voltage(i2caddress, vdd_current);
	471	}
	472
	473	if (vdd_last > 0)
	474	printf("VID: Core voltage after adjustment is at %d mV\n",
	475	vdd_last);
	476	else
	477	ret = -1;
	478	exit:
	479	if (re_enable)
	480	enable_interrupts();
	481	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
482	return ret;
483	}
484	#else /* !CONFIG_FSL_LSCH3 */
485	int adjust_vdd(ulong vdd_override)
486	{
487	int re_enable = disable_interrupts();
488	#if defined(CONFIG_FSL_LSCH2)
02b5d2ed SX	489	struct ccsr_gur gur = (void )(CONFIG_SYS_FSL_GUTS_ADDR);
02b5d2ed SX	490	#else
3ad2737e YZ	491	ccsr_gur_t __iomem *gur =
3ad2737e YZ	492	(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
02b5d2ed	493	#endif
3ad2737e	494	u32 fusesr;
cabe4d2f	495	u8 vid, buf;
3ad2737e YZ	496	int vdd_target, vdd_current, vdd_last;
	497	int ret, i2caddress;
	498	unsigned long vdd_string_override;
	499	char *vdd_string;
	500	static const uint16_t vdd[32] = {
	501	0, /* unused */
	502	9875, /* 0.9875V */
	503	9750,
	504	9625,
	505	9500,
	506	9375,
	507	9250,
	508	9125,
	509	9000,
	510	8875,
	511	8750,
	512	8625,
	513	8500,
	514	8375,
	515	8250,
	516	8125,
	517	10000, /* 1.0000V */
	518	10125,
	519	10250,
	520	10375,
	521	10500,
	522	10625,
	523	10750,
	524	10875,
	525	11000,
	526	0, /* reserved */
	527	};
	528	struct vdd_drive {
	529	u8 vid;
	530	unsigned voltage;
	531	};
	532
	533	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
	534	if (ret) {
	535	debug("VID: I2C failed to switch channel\n");
	536	ret = -1;
	537	goto exit;
	538	}
	539	ret = find_ir_chip_on_i2c();
	540	if (ret < 0) {
	541	printf("VID: Could not find voltage regulator on I2C.\n");
	542	ret = -1;
	543	goto exit;
	544	} else {
	545	i2caddress = ret;
	546	debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
	547	}
	548
cabe4d2f YZ	549	/* check IR chip work on Intel mode*/
	550	ret = i2c_read(i2caddress,
	551	IR36021_INTEL_MODE_OOFSET,
	552	1, (void *)&buf, 1);
	553	if (ret) {
	554	printf("VID: failed to read IR chip mode.\n");
	555	ret = -1;
	556	goto exit;
	557	}
	558	if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
	559	printf("VID: IR Chip is not used in Intel mode.\n");
	560	ret = -1;
	561	goto exit;
	562	}
	563
3ad2737e YZ	564	/* get the voltage ID from fuse status register */
	565	fusesr = in_be32(&gur->dcfg_fusesr);
	566	/*
	567	* VID is used according to the table below
	568	* ---------------------------------------
	569	* \| DA_V \|
	570	* \|-------------------------------------\|
	571	* \| 5b00000 \| 5b00001-5b11110 \| 5b11111 \|
	572	* ---------------+---------+-----------------+---------\|
	573	* \| D \| 5b00000 \| NO VID \| VID = DA_V \| NO VID \|
	574	* \| A \|----------+---------+-----------------+---------\|
	575	* \| _ \| 5b00001 \|VID = \| VID = \|VID = \|
	576	* \| V \| ~ \| DA_V_ALT\| DA_V_ALT \| DA_A_VLT\|
	577	* \| _ \| 5b11110 \| \| \| \|
	578	* \| A \|----------+---------+-----------------+---------\|
	579	* \| L \| 5b11111 \| No VID \| VID = DA_V \| NO VID \|
	580	* \| T \| \| \| \| \|
	581	* ------------------------------------------------------
	582	*/
126fe70d	583	#ifdef CONFIG_FSL_LSCH2
02b5d2ed SX	584	vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) &
	585	FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK;
	586	if ((vid == 0) \|\| (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) {
	587	vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) &
	588	FSL_CHASSIS2_DCFG_FUSESR_VID_MASK;
	589	}
	590	#else
3ad2737e YZ	591	vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) &
	592	FSL_CORENET_DCFG_FUSESR_ALTVID_MASK;
	593	if ((vid == 0) \|\| (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) {
	594	vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) &
	595	FSL_CORENET_DCFG_FUSESR_VID_MASK;
	596	}
02b5d2ed	597	#endif
3ad2737e YZ	598	vdd_target = vdd[vid];
	599
	600	/* check override variable for overriding VDD */
00caae6d	601	vdd_string = env_get(CONFIG_VID_FLS_ENV);
3ad2737e YZ	602	if (vdd_override == 0 && vdd_string &&
	603	!strict_strtoul(vdd_string, 10, &vdd_string_override))
	604	vdd_override = vdd_string_override;
	605	if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
	606	vdd_target = vdd_override * 10; /* convert to 1/10 mV */
	607	debug("VDD override is %lu\n", vdd_override);
	608	} else if (vdd_override != 0) {
	609	printf("Invalid value.\n");
	610	}
	611	if (vdd_target == 0) {
	612	debug("VID: VID not used\n");
	613	ret = 0;
	614	goto exit;
	615	} else {
	616	/* divide and round up by 10 to get a value in mV */
	617	vdd_target = DIV_ROUND_UP(vdd_target, 10);
	618	debug("VID: vid = %d mV\n", vdd_target);
	619	}
	620
	621	/*
	622	* Read voltage monitor to check real voltage.
	623	*/
	624	vdd_last = read_voltage(i2caddress);
	625	if (vdd_last < 0) {
	626	printf("VID: Couldn't read sensor abort VID adjustment\n");
	627	ret = -1;
	628	goto exit;
	629	}
	630	vdd_current = vdd_last;
	631	debug("VID: Core voltage is currently at %d mV\n", vdd_last);
	632	/*
	633	* Adjust voltage to at or one step above target.
	634	* As measurements are less precise than setting the values
	635	* we may run through dummy steps that cancel each other
	636	* when stepping up and then down.
	637	*/
	638	while (vdd_last > 0 &&
	639	vdd_last < vdd_target) {
	640	vdd_current += IR_VDD_STEP_UP;
	641	vdd_last = set_voltage(i2caddress, vdd_current);
	642	}
	643	while (vdd_last > 0 &&
	644	vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
	645	vdd_current -= IR_VDD_STEP_DOWN;
	646	vdd_last = set_voltage(i2caddress, vdd_current);
	647	}
	648
	649	if (vdd_last > 0)
	650	printf("VID: Core voltage after adjustment is at %d mV\n",
	651	vdd_last);
	652	else
	653	ret = -1;
	654	exit:
	655	if (re_enable)
	656	enable_interrupts();
1be8d10b WS	657
	658	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
	659
3ad2737e YZ	660	return ret;
3ad2737e YZ	661	}
29ca713c	662	#endif
3ad2737e YZ	663
	664	static int print_vdd(void)
	665	{
	666	int vdd_last, ret, i2caddress;
	667
	668	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
	669	if (ret) {
	670	debug("VID : I2c failed to switch channel\n");
	671	return -1;
	672	}
	673	ret = find_ir_chip_on_i2c();
	674	if (ret < 0) {
	675	printf("VID: Could not find voltage regulator on I2C.\n");
1be8d10b	676	goto exit;
3ad2737e YZ	677	} else {
	678	i2caddress = ret;
	679	debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
	680	}
	681
	682	/*
	683	* Read voltage monitor to check real voltage.
	684	*/
	685	vdd_last = read_voltage(i2caddress);
	686	if (vdd_last < 0) {
	687	printf("VID: Couldn't read sensor abort VID adjustment\n");
1be8d10b	688	goto exit;
3ad2737e YZ	689	}
3ad2737e YZ	690	printf("VID: Core voltage is at %d mV\n", vdd_last);
1be8d10b WS	691	exit:
	692	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
	693
	694	return ret < 0 ? -1 : 0;
3ad2737e	695
3ad2737e YZ	696	}
	697
	698	static int do_vdd_override(cmd_tbl_t *cmdtp,
	699	int flag, int argc,
	700	char * const argv[])
	701	{
	702	ulong override;
	703
	704	if (argc < 2)
	705	return CMD_RET_USAGE;
	706
	707	if (!strict_strtoul(argv[1], 10, &override))
	708	adjust_vdd(override); /* the value is checked by callee */
	709	else
	710	return CMD_RET_USAGE;
	711	return 0;
	712	}
	713
	714	static int do_vdd_read(cmd_tbl_t *cmdtp,
	715	int flag, int argc,
	716	char * const argv[])
	717	{
	718	if (argc < 1)
	719	return CMD_RET_USAGE;
	720	print_vdd();
	721
	722	return 0;
	723	}
	724
	725	U_BOOT_CMD(
	726	vdd_override, 2, 0, do_vdd_override,
	727	"override VDD",
	728	" - override with the voltage specified in mV, eg. 1050"
	729	);
	730
	731	U_BOOT_CMD(
	732	vdd_read, 1, 0, do_vdd_read,
	733	"read VDD",
	734	" - Read the voltage specified in mV"
	735	)