[people/ms/u-boot.git] / board / freescale / m548xevb / m548xevb.c

/*
 * (C) Copyright 2000-2003
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <config.h>
#include <common.h>
#include <pci.h>
#include <asm/immap.h>

DECLARE_GLOBAL_DATA_PTR;

int checkboard(void)
{
	puts("Board: ");
	puts("Freescale FireEngine 5485 EVB\n");
	return 0;
};

phys_size_t initdram(int board_type)
{
	volatile siu_t *siu = (siu_t *) (MMAP_SIU);
	volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM);
	u32 dramsize, i;

	siu->drv = CONFIG_SYS_SDRAM_DRVSTRENGTH;

	dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
	for (i = 0x13; i < 0x20; i++) {
		if (dramsize == (1 << i))
			break;
	}
	i--;
	siu->cs0cfg = (CONFIG_SYS_SDRAM_BASE | i);

#ifdef CONFIG_SYS_DRAMSZ1
	temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
	for (i = 0x13; i < 0x20; i++) {
		if (temp == (1 << i))
			break;
	}
	i--;
	dramsize += temp;
	siu->cs1cfg = ((CONFIG_SYS_SDRAM_BASE + temp) | i);
#endif

	sdram->cfg1 = CONFIG_SYS_SDRAM_CFG1;
	sdram->cfg2 = CONFIG_SYS_SDRAM_CFG2;

	/* Issue PALL */
	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 2;

	/* Issue LEMR */
	sdram->mode = CONFIG_SYS_SDRAM_EMOD;
	sdram->mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);

	udelay(500);

	/* Issue PALL */
	sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL | 2);

	/* Perform two refresh cycles */
	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4;
	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4;

	sdram->mode = CONFIG_SYS_SDRAM_MODE;

	sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00;

	udelay(100);

	return dramsize;
};

int testdram(void)
{
	/* TODO: XXX XXX XXX */
	printf("DRAM test not implemented!\n");

	return (0);
}

#if defined(CONFIG_PCI)
/*
 * Initialize PCI devices, report devices found.
 */
static struct pci_controller hose;
extern void pci_mcf547x_8x_init(struct pci_controller *hose);

void pci_init_board(void)
{
	pci_mcf547x_8x_init(&hose);
}
#endif				/* CONFIG_PCI */
Commit	Line	Data
1aee1111 TL	1	/*
	2	* (C) Copyright 2000-2003
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
	6	* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#include <config.h>
	28	#include <common.h>
	29	#include <pci.h>
	30	#include <asm/immap.h>
	31
	32	DECLARE_GLOBAL_DATA_PTR;
	33
	34	int checkboard(void)
	35	{
	36	puts("Board: ");
	37	puts("Freescale FireEngine 5485 EVB\n");
	38	return 0;
	39	};
	40
9973e3c6	41	phys_size_t initdram(int board_type)
1aee1111 TL	42	{
	43	volatile siu_t siu = (siu_t ) (MMAP_SIU);
	44	volatile sdram_t sdram = (volatile sdram_t )(MMAP_SDRAM);
	45	u32 dramsize, i;
	46
6d0f6bcf	47	siu->drv = CONFIG_SYS_SDRAM_DRVSTRENGTH;
1aee1111	48
6d0f6bcf	49	dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
1aee1111 TL	50	for (i = 0x13; i < 0x20; i++) {
	51	if (dramsize == (1 << i))
	52	break;
	53	}
	54	i--;
6d0f6bcf	55	siu->cs0cfg = (CONFIG_SYS_SDRAM_BASE \| i);
1aee1111	56
6d0f6bcf JCPV	57	#ifdef CONFIG_SYS_DRAMSZ1
6d0f6bcf JCPV	58	temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
1aee1111 TL	59	for (i = 0x13; i < 0x20; i++) {
	60	if (temp == (1 << i))
	61	break;
	62	}
	63	i--;
	64	dramsize += temp;
6d0f6bcf	65	siu->cs1cfg = ((CONFIG_SYS_SDRAM_BASE + temp) \| i);
1aee1111 TL	66	#endif
1aee1111 TL	67
6d0f6bcf JCPV	68	sdram->cfg1 = CONFIG_SYS_SDRAM_CFG1;
6d0f6bcf JCPV	69	sdram->cfg2 = CONFIG_SYS_SDRAM_CFG2;
1aee1111 TL	70
1aee1111 TL	71	/* Issue PALL */
6d0f6bcf	72	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL \| 2;
1aee1111 TL	73
1aee1111 TL	74	/* Issue LEMR */
6d0f6bcf JCPV	75	sdram->mode = CONFIG_SYS_SDRAM_EMOD;
6d0f6bcf JCPV	76	sdram->mode = (CONFIG_SYS_SDRAM_MODE \| 0x04000000);
1aee1111 TL	77
	78	udelay(500);
	79
	80	/* Issue PALL */
6d0f6bcf	81	sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL \| 2);
1aee1111 TL	82
1aee1111 TL	83	/* Perform two refresh cycles */
6d0f6bcf JCPV	84	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL \| 4;
6d0f6bcf JCPV	85	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL \| 4;
1aee1111	86
6d0f6bcf	87	sdram->mode = CONFIG_SYS_SDRAM_MODE;
1aee1111	88
6d0f6bcf	89	sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) \| 0x10000F00;
1aee1111 TL	90
	91	udelay(100);
	92
	93	return dramsize;
	94	};
	95
	96	int testdram(void)
	97	{
	98	/* TODO: XXX XXX XXX */
	99	printf("DRAM test not implemented!\n");
	100
	101	return (0);
	102	}
	103
	104	#if defined(CONFIG_PCI)
	105	/*
	106	* Initialize PCI devices, report devices found.
	107	*/
	108	static struct pci_controller hose;
	109	extern void pci_mcf547x_8x_init(struct pci_controller *hose);
	110
	111	void pci_init_board(void)
	112	{
	113	pci_mcf547x_8x_init(&hose);
	114	}
	115	#endif /* CONFIG_PCI */