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Commit | Line | Data |
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9617c8d4 KG |
1 | /* |
2 | * Copyright 2008 Freescale Semiconductor, Inc. | |
3 | * | |
5b8031cc | 4 | * SPDX-License-Identifier: GPL-2.0 |
9617c8d4 KG |
5 | */ |
6 | ||
7 | #include <common.h> | |
9617c8d4 | 8 | |
5614e71b YS |
9 | #include <fsl_ddr_sdram.h> |
10 | #include <fsl_ddr_dimm_params.h> | |
9617c8d4 | 11 | |
dfb49108 HW |
12 | void fsl_ddr_board_options(memctl_options_t *popts, |
13 | dimm_params_t *pdimm, | |
14 | unsigned int ctrl_num) | |
9617c8d4 KG |
15 | { |
16 | /* | |
17 | * Factors to consider for CPO: | |
18 | * - frequency | |
19 | * - ddr1 vs. ddr2 | |
20 | */ | |
21 | popts->cpo_override = 0; | |
22 | ||
23 | /* | |
24 | * Factors to consider for write data delay: | |
25 | * - number of DIMMs | |
26 | * | |
27 | * 1 = 1/4 clock delay | |
28 | * 2 = 1/2 clock delay | |
29 | * 3 = 3/4 clock delay | |
30 | * 4 = 1 clock delay | |
31 | * 5 = 5/4 clock delay | |
32 | * 6 = 3/2 clock delay | |
33 | */ | |
34 | popts->write_data_delay = 3; | |
35 | ||
b4983e16 | 36 | /* 2T timing enable */ |
0dd38a35 | 37 | popts->twot_en = 1; |
b4983e16 | 38 | |
9617c8d4 KG |
39 | /* |
40 | * Factors to consider for half-strength driver enable: | |
41 | * - number of DIMMs installed | |
42 | */ | |
43 | popts->half_strength_driver_enable = 0; | |
44 | } |