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30ea4be9 VN |
1 | /* |
2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | * Fabio Estevam <fabio.estevam@freescale.com> | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
30ea4be9 VN |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <linux/list.h> | |
10 | #include <asm/gpio.h> | |
721d0b00 | 11 | #include <asm/arch/iomux-mx53.h> |
30ea4be9 VN |
12 | #include <linux/fb.h> |
13 | #include <ipu_pixfmt.h> | |
14 | ||
15 | #define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24) | |
16 | ||
17 | static struct fb_videomode const claa_wvga = { | |
18 | .name = "CLAA07LC0ACW", | |
19 | .refresh = 57, | |
20 | .xres = 800, | |
21 | .yres = 480, | |
22 | .pixclock = 37037, | |
23 | .left_margin = 40, | |
24 | .right_margin = 60, | |
25 | .upper_margin = 10, | |
26 | .lower_margin = 10, | |
27 | .hsync_len = 20, | |
28 | .vsync_len = 10, | |
29 | .sync = 0, | |
30 | .vmode = FB_VMODE_NONINTERLACED | |
31 | }; | |
32 | ||
17c5ef20 FE |
33 | static struct fb_videomode const seiko_wvga = { |
34 | .name = "Seiko-43WVF1G", | |
35 | .refresh = 60, | |
36 | .xres = 800, | |
37 | .yres = 480, | |
38 | .pixclock = 29851, /* picosecond (33.5 MHz) */ | |
39 | .left_margin = 89, | |
40 | .right_margin = 164, | |
41 | .upper_margin = 23, | |
42 | .lower_margin = 10, | |
43 | .hsync_len = 10, | |
44 | .vsync_len = 10, | |
45 | .sync = 0, | |
46 | }; | |
47 | ||
30ea4be9 VN |
48 | void setup_iomux_lcd(void) |
49 | { | |
721d0b00 BT |
50 | static const iomux_v3_cfg_t lcd_pads[] = { |
51 | MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK, | |
52 | MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, | |
53 | MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, | |
54 | MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, | |
55 | MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0, | |
56 | MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1, | |
57 | MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2, | |
58 | MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3, | |
59 | MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4, | |
60 | MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5, | |
61 | MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6, | |
62 | MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7, | |
63 | MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8, | |
64 | MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9, | |
65 | MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10, | |
66 | MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11, | |
67 | MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12, | |
68 | MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13, | |
69 | MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14, | |
70 | MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15, | |
71 | MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16, | |
72 | MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17, | |
73 | MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18, | |
74 | MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19, | |
75 | MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20, | |
76 | MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21, | |
77 | MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22, | |
78 | MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23, | |
79 | }; | |
80 | ||
81 | imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); | |
30ea4be9 VN |
82 | |
83 | /* Turn on GPIO backlight */ | |
721d0b00 | 84 | imx_iomux_v3_setup_pad(MX53_PAD_EIM_D24__GPIO3_24); |
30ea4be9 VN |
85 | gpio_direction_output(MX53LOCO_LCD_POWER, 1); |
86 | ||
87 | /* Turn on display contrast */ | |
721d0b00 BT |
88 | imx_iomux_v3_setup_pad(MX53_PAD_GPIO_1__GPIO1_1); |
89 | gpio_direction_output(IMX_GPIO_NR(1, 1), 1); | |
30ea4be9 VN |
90 | } |
91 | ||
17c5ef20 | 92 | int board_video_skip(void) |
30ea4be9 | 93 | { |
17c5ef20 FE |
94 | int ret; |
95 | char const *e = getenv("panel"); | |
96 | ||
97 | if (e) { | |
98 | if (strcmp(e, "seiko") == 0) { | |
99 | ret = ipuv3_fb_init(&seiko_wvga, 0, IPU_PIX_FMT_RGB24); | |
100 | if (ret) | |
101 | printf("Seiko cannot be configured: %d\n", ret); | |
102 | return ret; | |
103 | } | |
104 | } | |
105 | ||
106 | /* | |
107 | * 'panel' env variable not found or has different value than 'seiko' | |
108 | * Defaulting to claa lcd. | |
109 | */ | |
110 | ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565); | |
30ea4be9 | 111 | if (ret) |
17c5ef20 FE |
112 | printf("CLAA cannot be configured: %d\n", ret); |
113 | return ret; | |
30ea4be9 | 114 | } |