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1 | /* |
2 | * Copyright (C) 2013 Gateworks Corporation | |
3 | * | |
4 | * Author: Tim Harvey <tharvey@gateworks.com> | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef _GWVENTANA_COMMON_H_ | |
10 | #define _GWVENTANA_COMMON_H_ | |
11 | ||
12 | #include "ventana_eeprom.h" | |
13 | ||
14 | /* GPIO's common to all baseboards */ | |
15 | #define GP_PHY_RST IMX_GPIO_NR(1, 30) | |
16 | #define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) | |
17 | #define GP_SD3_CD IMX_GPIO_NR(7, 0) | |
18 | #define GP_RS232_EN IMX_GPIO_NR(2, 11) | |
19 | #define GP_MSATA_SEL IMX_GPIO_NR(2, 8) | |
34b080b7 | 20 | #define GP_SD3_VSELECT IMX_GPIO_NR(6, 14) |
e56c5791 TH |
21 | |
22 | #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | |
23 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ | |
24 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) | |
25 | ||
26 | #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | |
27 | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ | |
28 | PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) | |
29 | ||
30 | #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | |
31 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ | |
32 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) | |
33 | ||
34 | #define SPI_PAD_CTRL (PAD_CTL_HYS | \ | |
35 | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ | |
36 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) | |
37 | ||
e56c5791 TH |
38 | #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
39 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ | |
40 | PAD_CTL_ODE | PAD_CTL_SRE_FAST) | |
41 | ||
42 | #define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | |
43 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ | |
44 | PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST) | |
45 | ||
9a83a815 | 46 | #define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION) |
e56c5791 TH |
47 | |
48 | #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) | |
49 | ||
50 | /* | |
51 | * each baseboard has 4 user configurable Digital IO lines which can | |
52 | * be pinmuxed as a GPIO or in some cases a PWM | |
53 | */ | |
54 | struct dio_cfg { | |
55 | iomux_v3_cfg_t gpio_padmux[2]; | |
56 | unsigned gpio_param; | |
57 | iomux_v3_cfg_t pwm_padmux[2]; | |
58 | unsigned pwm_param; | |
59 | }; | |
60 | ||
61 | struct ventana { | |
62 | /* pinmux */ | |
63 | iomux_v3_cfg_t const *gpio_pads; | |
64 | int num_pads; | |
65 | /* DIO pinmux/val */ | |
66 | struct dio_cfg dio_cfg[4]; | |
67 | int num_gpios; | |
68 | /* various gpios (0 if non-existent) */ | |
69 | int leds[3]; | |
70 | int pcie_rst; | |
71 | int mezz_pwren; | |
72 | int mezz_irq; | |
73 | int rs485en; | |
74 | int gps_shdn; | |
75 | int vidin_en; | |
76 | int dioi2c_en; | |
77 | int pcie_sson; | |
78 | int usb_sel; | |
79 | int wdis; | |
5c55572f | 80 | int msata_en; |
34b080b7 | 81 | bool usd_vsel; |
e56c5791 TH |
82 | }; |
83 | ||
84 | extern struct ventana gpio_cfg[GW_UNKNOWN]; | |
85 | ||
86 | /* configure i2c iomux */ | |
87 | void setup_ventana_i2c(void); | |
88 | /* configure uart iomux */ | |
89 | void setup_iomux_uart(void); | |
90 | /* conifgure PMIC */ | |
6d38f3a8 | 91 | void setup_pmic(void); |
e56c5791 TH |
92 | /* configure gpio iomux/defaults */ |
93 | void setup_iomux_gpio(int board, struct ventana_board_info *); | |
94 | /* late setup of GPIO (configuration per baseboard and env) */ | |
95 | void setup_board_gpio(int board, struct ventana_board_info *); | |
96 | ||
97 | #endif /* #ifndef _GWVENTANA_COMMON_H_ */ |