[people/ms/u-boot.git] / board / gdsys / common / miiphybb.c

/*
 * (C) Copyright 2010
 * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <miiphy.h>

#include <asm/io.h>

struct io_bb_pinset {
	int mdio;
	int mdc;
};

static int io_bb_mii_init(struct bb_miiphy_bus *bus)
{
	return 0;
}

static int io_bb_mdio_active(struct bb_miiphy_bus *bus)
{
	struct io_bb_pinset *pins = bus->priv;

	out_be32((void *)GPIO0_TCR,
		in_be32((void *)GPIO0_TCR) | pins->mdio);

	return 0;
}

static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus)
{
	struct io_bb_pinset *pins = bus->priv;

	out_be32((void *)GPIO0_TCR,
		in_be32((void *)GPIO0_TCR) & ~pins->mdio);

	return 0;
}

static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
{
	struct io_bb_pinset *pins = bus->priv;

	if (v)
		out_be32((void *)GPIO0_OR,
			in_be32((void *)GPIO0_OR) | pins->mdio);
	else
		out_be32((void *)GPIO0_OR,
			in_be32((void *)GPIO0_OR) & ~pins->mdio);

	return 0;
}

static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
{
	struct io_bb_pinset *pins = bus->priv;

	*v = ((in_be32((void *)GPIO0_IR) & pins->mdio) != 0);

	return 0;
}

static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
{
	struct io_bb_pinset *pins = bus->priv;

	if (v)
		out_be32((void *)GPIO0_OR,
			in_be32((void *)GPIO0_OR) | pins->mdc);
	else
		out_be32((void *)GPIO0_OR,
			in_be32((void *)GPIO0_OR) & ~pins->mdc);

	return 0;
}

static int io_bb_delay(struct bb_miiphy_bus *bus)
{
	udelay(1);

	return 0;
}

struct io_bb_pinset io_bb_pinsets[] = {
	{
		.mdio = CONFIG_SYS_MDIO_PIN,
		.mdc = CONFIG_SYS_MDC_PIN,
	},
#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
	{
		.mdio = CONFIG_SYS_MDIO1_PIN,
		.mdc = CONFIG_SYS_MDC1_PIN,
	},
#endif
};

struct bb_miiphy_bus bb_miiphy_buses[] = {
	{
		.name = CONFIG_SYS_GBIT_MII_BUSNAME,
		.init = io_bb_mii_init,
		.mdio_active = io_bb_mdio_active,
		.mdio_tristate = io_bb_mdio_tristate,
		.set_mdio = io_bb_set_mdio,
		.get_mdio = io_bb_get_mdio,
		.set_mdc = io_bb_set_mdc,
		.delay = io_bb_delay,
		.priv = &io_bb_pinsets[0],
	},
#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
	{
		.name = CONFIG_SYS_GBIT_MII1_BUSNAME,
		.init = io_bb_mii_init,
		.mdio_active = io_bb_mdio_active,
		.mdio_tristate = io_bb_mdio_tristate,
		.set_mdio = io_bb_set_mdio,
		.get_mdio = io_bb_get_mdio,
		.set_mdc = io_bb_set_mdc,
		.delay = io_bb_delay,
		.priv = &io_bb_pinsets[1],
	},
#endif
};

int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
			  sizeof(bb_miiphy_buses[0]);
Commit	Line	Data
a605ea7e DE	1	/*
	2	* (C) Copyright 2010
	3	* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
a605ea7e DE	6	*/
	7
	8	#include <common.h>
	9	#include <miiphy.h>
	10
	11	#include <asm/io.h>
	12
255ef4d9 DE	13	struct io_bb_pinset {
	14	int mdio;
	15	int mdc;
	16	};
	17
a605ea7e DE	18	static int io_bb_mii_init(struct bb_miiphy_bus *bus)
	19	{
	20	return 0;
	21	}
	22
	23	static int io_bb_mdio_active(struct bb_miiphy_bus *bus)
	24	{
255ef4d9 DE	25	struct io_bb_pinset *pins = bus->priv;
255ef4d9 DE	26
a605ea7e	27	out_be32((void *)GPIO0_TCR,
255ef4d9	28	in_be32((void *)GPIO0_TCR) \| pins->mdio);
a605ea7e DE	29
	30	return 0;
	31	}
	32
	33	static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus)
	34	{
255ef4d9 DE	35	struct io_bb_pinset *pins = bus->priv;
255ef4d9 DE	36
a605ea7e	37	out_be32((void *)GPIO0_TCR,
255ef4d9	38	in_be32((void *)GPIO0_TCR) & ~pins->mdio);
a605ea7e DE	39
	40	return 0;
	41	}
	42
	43	static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
	44	{
255ef4d9 DE	45	struct io_bb_pinset *pins = bus->priv;
255ef4d9 DE	46
a605ea7e DE	47	if (v)
a605ea7e DE	48	out_be32((void *)GPIO0_OR,
255ef4d9	49	in_be32((void *)GPIO0_OR) \| pins->mdio);
a605ea7e DE	50	else
a605ea7e DE	51	out_be32((void *)GPIO0_OR,
255ef4d9	52	in_be32((void *)GPIO0_OR) & ~pins->mdio);
a605ea7e DE	53
	54	return 0;
	55	}
	56
	57	static int io_bb_get_mdio(struct bb_miiphy_bus bus, int v)
	58	{
255ef4d9 DE	59	struct io_bb_pinset *pins = bus->priv;
	60
	61	v = ((in_be32((void )GPIO0_IR) & pins->mdio) != 0);
a605ea7e DE	62
	63	return 0;
	64	}
	65
	66	static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
	67	{
255ef4d9 DE	68	struct io_bb_pinset *pins = bus->priv;
255ef4d9 DE	69
a605ea7e DE	70	if (v)
a605ea7e DE	71	out_be32((void *)GPIO0_OR,
255ef4d9	72	in_be32((void *)GPIO0_OR) \| pins->mdc);
a605ea7e DE	73	else
a605ea7e DE	74	out_be32((void *)GPIO0_OR,
255ef4d9	75	in_be32((void *)GPIO0_OR) & ~pins->mdc);
a605ea7e DE	76
	77	return 0;
	78	}
	79
	80	static int io_bb_delay(struct bb_miiphy_bus *bus)
	81	{
	82	udelay(1);
	83
	84	return 0;
	85	}
	86
255ef4d9 DE	87	struct io_bb_pinset io_bb_pinsets[] = {
	88	{
	89	.mdio = CONFIG_SYS_MDIO_PIN,
	90	.mdc = CONFIG_SYS_MDC_PIN,
	91	},
	92	#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
	93	{
	94	.mdio = CONFIG_SYS_MDIO1_PIN,
	95	.mdc = CONFIG_SYS_MDC1_PIN,
	96	},
	97	#endif
	98	};
	99
a605ea7e DE	100	struct bb_miiphy_bus bb_miiphy_buses[] = {
	101	{
	102	.name = CONFIG_SYS_GBIT_MII_BUSNAME,
	103	.init = io_bb_mii_init,
	104	.mdio_active = io_bb_mdio_active,
	105	.mdio_tristate = io_bb_mdio_tristate,
	106	.set_mdio = io_bb_set_mdio,
	107	.get_mdio = io_bb_get_mdio,
	108	.set_mdc = io_bb_set_mdc,
	109	.delay = io_bb_delay,
255ef4d9 DE	110	.priv = &io_bb_pinsets[0],
	111	},
	112	#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
	113	{
	114	.name = CONFIG_SYS_GBIT_MII1_BUSNAME,
	115	.init = io_bb_mii_init,
	116	.mdio_active = io_bb_mdio_active,
	117	.mdio_tristate = io_bb_mdio_tristate,
	118	.set_mdio = io_bb_set_mdio,
	119	.get_mdio = io_bb_get_mdio,
	120	.set_mdc = io_bb_set_mdc,
	121	.delay = io_bb_delay,
	122	.priv = &io_bb_pinsets[1],
	123	},
	124	#endif
a605ea7e DE	125	};
	126
	127	int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
	128	sizeof(bb_miiphy_buses[0]);