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c609719b WD |
1 | /* |
2 | * (C) Copyright 2000 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
c609719b WD |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <mpc8xx.h> | |
10 | #include <asm/8xx_immap.h> | |
11 | #include "ioport.h" | |
12 | ||
13 | #if 0 | |
14 | #define IOPORT_DEBUG | |
15 | #endif | |
16 | ||
17 | #ifdef IOPORT_DEBUG | |
18 | #define PRINTF(fmt,args...) printf (fmt ,##args) | |
19 | #else | |
20 | #define PRINTF(fmt,args...) | |
21 | #endif | |
22 | ||
23 | /* | |
24 | * The ioport configuration table. | |
25 | */ | |
26 | const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = { | |
27 | /* | |
28 | * Port A configuration | |
7aa78614 | 29 | * Pin Signal Type Active Initial state |
53677ef1 WD |
30 | * PA7 fpgaProgramLowOut Out Low High |
31 | * PA1 fpgaCoreVoltageFailLow In Low N/A | |
c609719b | 32 | */ |
53677ef1 | 33 | { /* conf ppar psor pdir podr pdat pint function */ |
c609719b WD |
34 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */ |
35 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */ | |
36 | /* PA15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
37 | /* PA14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
38 | /* PA13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
39 | /* PA12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
40 | /* PA11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
41 | /* PA10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
42 | /* PA9 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 1*/ | |
43 | /* PA8 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 1*/ | |
44 | /* PA7 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaProgramLow */ | |
45 | /* PA6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
46 | /* PA5 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 0*/ | |
47 | /* PA4 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 0*/ | |
48 | /* PA3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
49 | /* PA2 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
7aa78614 WD |
50 | #if !defined(CONFIG_SC) |
51 | /* PA1 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaCoreVoltageFail*/ | |
52 | #else | |
c609719b | 53 | /* PA1 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
7aa78614 | 54 | #endif |
c609719b WD |
55 | /* PA0 */ { 0, 0, 0, 0, 0, 0, 0 } /* */ |
56 | }, | |
57 | ||
58 | /* | |
7aa78614 | 59 | * Port B configuration |
c609719b WD |
60 | * Pin Signal Type Active Initial state |
61 | * PB14 docBusyLowIn In Low X | |
62 | * PB15 gpio1Sig Out High Low | |
63 | * PB16 fpgaDoneBi In High X | |
7aa78614 | 64 | * PB17 swBitOkLowOut Out Low High |
c609719b WD |
65 | * PB19 speakerVolSig Out/Hi-Z High/Low High (Hi-Z) |
66 | * PB22 fpgaInitLowBi In Low X | |
67 | * PB23 batteryOkSig In High X | |
7aa78614 WD |
68 | * PB31 pulseCatcherClr Out High 0 |
69 | */ | |
53677ef1 | 70 | { /* conf ppar psor pdir podr pdat pint function */ |
7aa78614 WD |
71 | #if !defined(CONFIG_SC) |
72 | /* PB31 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
73 | #else | |
74 | /* PB31 */ { 1, 0, 0, 1, 0, 0, 0 }, /* pulseCatcherClr */ | |
75 | #endif | |
c609719b WD |
76 | /* PB30 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
77 | /* PB29 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
78 | /* PB28 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
79 | /* PB27 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
80 | /* PB26 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
81 | /* PB25 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
82 | /* PB24 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
7aa78614 | 83 | #if !defined(CONFIG_SC) |
c609719b | 84 | /* PB23 */ { 1, 0, 0, 0, 0, 0, 0 }, /* batteryOk */ |
7aa78614 WD |
85 | #else |
86 | /* PB23 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
87 | #endif | |
c609719b WD |
88 | /* PB22 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaInitLowBi */ |
89 | /* PB21 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
90 | /* PB20 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
7aa78614 | 91 | #if !defined(CONFIG_SC) |
c609719b | 92 | /* PB19 */ { 1, 0, 0, 1, 1, 1, 0 }, /* speakerVol */ |
7aa78614 WD |
93 | #else |
94 | /* PB19 */ { 0, 0, 0, 1, 1, 1, 0 }, /* */ | |
95 | #endif | |
c609719b | 96 | /* PB18 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
7aa78614 | 97 | /* PB17 */ { 1, 0, 0, 1, 0, 1, 0 }, /* swBitOkLow */ |
c609719b WD |
98 | /* PB16 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaDone */ |
99 | /* PB15 */ { 1, 0, 0, 1, 0, 0, 0 }, /* gpio1 */ | |
7aa78614 | 100 | #if !defined(CONFIG_SC) |
c609719b | 101 | /* PB14 */ { 1, 0, 0, 0, 0, 0, 0 } /* docBusyLow */ |
7aa78614 | 102 | #else |
53677ef1 | 103 | /* PB14 */ { 0, 0, 0, 0, 0, 0, 0 } /* */ |
7aa78614 WD |
104 | #endif |
105 | }, | |
c609719b WD |
106 | |
107 | /* | |
7aa78614 | 108 | * Port C configuration |
c609719b WD |
109 | * Pin Signal Type Active Initial state |
110 | * PC4 i2cBus1EnSig Out High High | |
111 | * PC5 i2cBus2EnSig Out High High | |
112 | * PC6 gpio0Sig Out High Low | |
113 | * PC8 i2cBus3EnSig Out High High | |
114 | * PC10 i2cBus4EnSig Out High High | |
115 | * PC11 fpgaResetLowOut Out Low High | |
116 | * PC12 systemBitOkIn In High X | |
117 | * PC15 selfDreqLow In Low X | |
118 | */ | |
53677ef1 | 119 | { /* conf ppar psor pdir podr pdat pint function */ |
c609719b WD |
120 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
121 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
122 | /* PC15 */ { 1, 0, 0, 0, 0, 0, 0 }, /* selfDreqLowIn */ | |
123 | /* PC14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
124 | /* PC13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
7aa78614 | 125 | #if !defined(CONFIG_SC) |
c609719b | 126 | /* PC12 */ { 1, 0, 0, 0, 0, 0, 0 }, /* systemBitOkIn */ |
7aa78614 | 127 | #else |
53677ef1 | 128 | /* PC12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
7aa78614 | 129 | #endif |
c609719b | 130 | /* PC11 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaResetLowOut */ |
7aa78614 | 131 | #if !defined(CONFIG_SC) |
c609719b | 132 | /* PC10 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus4EnSig */ |
7aa78614 WD |
133 | #else |
134 | /* PC10 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */ | |
135 | #endif | |
c609719b | 136 | /* PC9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
7aa78614 | 137 | #if !defined(CONFIG_SC) |
c609719b | 138 | /* PC8 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus3EnSig */ |
7aa78614 WD |
139 | #else |
140 | /* PC8 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */ | |
141 | #endif | |
c609719b WD |
142 | /* PC7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
143 | /* PC6 */ { 1, 0, 0, 1, 0, 1, 0 }, /* gpio0 */ | |
7aa78614 | 144 | #if !defined(CONFIG_SC) |
c609719b WD |
145 | /* PC5 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus2EnSig */ |
146 | /* PC4 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus1EnSig */ | |
7aa78614 WD |
147 | #else |
148 | /* PC5 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */ | |
149 | /* PC4 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */ | |
150 | #endif | |
c609719b WD |
151 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
152 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
153 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
154 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */ | |
7aa78614 | 155 | }, |
c609719b | 156 | |
7aa78614 WD |
157 | /* |
158 | * Port D configuration | |
159 | */ | |
53677ef1 | 160 | { /* conf ppar psor pdir podr pdat pint function */ |
c609719b WD |
161 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ |
162 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
163 | /* PD15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
164 | /* PD14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
165 | /* PD13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
166 | /* PD12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
167 | /* PD11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
168 | /* PD10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
169 | /* PD9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
170 | /* PD8 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
171 | /* PD7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
172 | /* PD6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
173 | /* PD5 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
174 | /* PD4 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
175 | /* PD3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
176 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
177 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */ | |
178 | /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */ | |
7aa78614 | 179 | } |
c609719b WD |
180 | }; |
181 | ||
182 | /* | |
183 | * Configure the MPC8XX I/O ports per the ioport configuration table | |
a47a12be | 184 | * (taken from ./arch/powerpc/cpu/mpc8260/cpu_init.c) |
c609719b | 185 | */ |
bf9e3b38 | 186 | void config_mpc8xx_ioports (volatile immap_t * immr) |
c609719b | 187 | { |
bf9e3b38 | 188 | int portnum; |
c609719b | 189 | |
bf9e3b38 | 190 | for (portnum = 0; portnum < NUM_PORTS; portnum++) { |
c609719b WD |
191 | uint pmsk = 0, ppar = 0, psor = 0, pdir = 0; |
192 | uint podr = 0, pdat = 0, pint = 0; | |
193 | uint msk = 1; | |
bf9e3b38 WD |
194 | mpc8xx_iop_conf_t *iopc = |
195 | (mpc8xx_iop_conf_t *) & iop_conf_tab[portnum][0]; | |
c609719b WD |
196 | mpc8xx_iop_conf_t *eiopc = iopc + PORT_BITS; |
197 | ||
198 | /* | |
199 | * For all ports except port B, ignore the two don't care entries | |
200 | * in the configuration tables. | |
201 | */ | |
202 | if (portnum != 1) { | |
bf9e3b38 WD |
203 | iopc = (mpc8xx_iop_conf_t *) & |
204 | iop_conf_tab[portnum][2]; | |
c609719b WD |
205 | } |
206 | ||
207 | /* | |
208 | * NOTE: index 0 refers to pin 17, index 17 refers to pin 0 | |
209 | */ | |
210 | while (iopc < eiopc) { | |
bf9e3b38 | 211 | if (iopc->conf) { |
c609719b | 212 | pmsk |= msk; |
bf9e3b38 WD |
213 | if (iopc->ppar) |
214 | ppar |= msk; | |
215 | if (iopc->psor) | |
216 | psor |= msk; | |
217 | if (iopc->pdir) | |
218 | pdir |= msk; | |
219 | if (iopc->podr) | |
220 | podr |= msk; | |
221 | if (iopc->pdat) | |
222 | pdat |= msk; | |
223 | if (iopc->pint) | |
224 | pint |= msk; | |
225 | } | |
226 | msk <<= 1; | |
227 | iopc++; | |
c609719b WD |
228 | } |
229 | ||
bf9e3b38 WD |
230 | PRINTF ("%s:%d:\n portnum=%d ", __FUNCTION__, __LINE__, |
231 | portnum); | |
c609719b | 232 | #ifdef IOPORT_DEBUG |
bf9e3b38 WD |
233 | switch (portnum) { |
234 | case 0: | |
235 | printf ("(A)\n"); | |
236 | break; | |
237 | case 1: | |
238 | printf ("(B)\n"); | |
239 | break; | |
240 | case 2: | |
241 | printf ("(C)\n"); | |
242 | break; | |
243 | case 3: | |
244 | printf ("(D)\n"); | |
245 | break; | |
246 | default: | |
247 | printf ("(?)\n"); | |
248 | break; | |
c609719b WD |
249 | } |
250 | #endif | |
bf9e3b38 WD |
251 | PRINTF (" ppar=0x%.8x pdir=0x%.8x podr=0x%.8x\n" |
252 | " pdat=0x%.8x psor=0x%.8x pint=0x%.8x pmsk=0x%.8x\n", | |
253 | ppar, pdir, podr, pdat, psor, pint, pmsk); | |
c609719b WD |
254 | |
255 | /* | |
256 | * Have to handle the ioports on a port-by-port basis since there | |
257 | * are three different flavors. | |
258 | */ | |
259 | if (pmsk != 0) { | |
bf9e3b38 | 260 | uint tpmsk = ~pmsk; |
c609719b | 261 | |
bf9e3b38 WD |
262 | if (0 == portnum) { /* port A */ |
263 | immr->im_ioport.iop_papar &= tpmsk; | |
264 | immr->im_ioport.iop_padat = | |
265 | (immr->im_ioport. | |
266 | iop_padat & tpmsk) | pdat; | |
267 | immr->im_ioport.iop_padir = | |
268 | (immr->im_ioport. | |
269 | iop_padir & tpmsk) | pdir; | |
270 | immr->im_ioport.iop_paodr = | |
271 | (immr->im_ioport. | |
272 | iop_paodr & tpmsk) | podr; | |
273 | immr->im_ioport.iop_papar |= ppar; | |
274 | } else if (1 == portnum) { /* port B */ | |
275 | immr->im_cpm.cp_pbpar &= tpmsk; | |
276 | immr->im_cpm.cp_pbdat = | |
277 | (immr->im_cpm. | |
278 | cp_pbdat & tpmsk) | pdat; | |
279 | immr->im_cpm.cp_pbdir = | |
280 | (immr->im_cpm. | |
281 | cp_pbdir & tpmsk) | pdir; | |
282 | immr->im_cpm.cp_pbodr = | |
283 | (immr->im_cpm. | |
284 | cp_pbodr & tpmsk) | podr; | |
285 | immr->im_cpm.cp_pbpar |= ppar; | |
286 | } else if (2 == portnum) { /* port C */ | |
287 | immr->im_ioport.iop_pcpar &= tpmsk; | |
288 | immr->im_ioport.iop_pcdat = | |
289 | (immr->im_ioport. | |
290 | iop_pcdat & tpmsk) | pdat; | |
291 | immr->im_ioport.iop_pcdir = | |
292 | (immr->im_ioport. | |
293 | iop_pcdir & tpmsk) | pdir; | |
294 | immr->im_ioport.iop_pcint = | |
295 | (immr->im_ioport. | |
296 | iop_pcint & tpmsk) | pint; | |
297 | immr->im_ioport.iop_pcso = | |
298 | (immr->im_ioport. | |
299 | iop_pcso & tpmsk) | psor; | |
300 | immr->im_ioport.iop_pcpar |= ppar; | |
301 | } else if (3 == portnum) { /* port D */ | |
302 | immr->im_ioport.iop_pdpar &= tpmsk; | |
303 | immr->im_ioport.iop_pddat = | |
304 | (immr->im_ioport. | |
305 | iop_pddat & tpmsk) | pdat; | |
306 | immr->im_ioport.iop_pddir = | |
307 | (immr->im_ioport. | |
308 | iop_pddir & tpmsk) | pdir; | |
309 | immr->im_ioport.iop_pdpar |= ppar; | |
c609719b WD |
310 | } |
311 | } | |
bf9e3b38 | 312 | } |
c609719b | 313 | |
bf9e3b38 WD |
314 | PRINTF ("%s:%d: Port A:\n papar=0x%.4x padir=0x%.4x" |
315 | " paodr=0x%.4x\n padat=0x%.4x\n", __FUNCTION__, __LINE__, | |
316 | immr->im_ioport.iop_papar, immr->im_ioport.iop_padir, | |
317 | immr->im_ioport.iop_paodr, immr->im_ioport.iop_padat); | |
318 | PRINTF ("%s:%d: Port B:\n pbpar=0x%.8x pbdir=0x%.8x" | |
319 | " pbodr=0x%.8x\n pbdat=0x%.8x\n", __FUNCTION__, __LINE__, | |
320 | immr->im_cpm.cp_pbpar, immr->im_cpm.cp_pbdir, | |
321 | immr->im_cpm.cp_pbodr, immr->im_cpm.cp_pbdat); | |
322 | PRINTF ("%s:%d: Port C:\n pcpar=0x%.4x pcdir=0x%.4x" | |
323 | " pcdat=0x%.4x\n pcso=0x%.4x pcint=0x%.4x\n ", | |
324 | __FUNCTION__, __LINE__, immr->im_ioport.iop_pcpar, | |
325 | immr->im_ioport.iop_pcdir, immr->im_ioport.iop_pcdat, | |
326 | immr->im_ioport.iop_pcso, immr->im_ioport.iop_pcint); | |
327 | PRINTF ("%s:%d: Port D:\n pdpar=0x%.4x pddir=0x%.4x" | |
328 | " pddat=0x%.4x\n", __FUNCTION__, __LINE__, | |
329 | immr->im_ioport.iop_pdpar, immr->im_ioport.iop_pddir, | |
330 | immr->im_ioport.iop_pddat); | |
c609719b | 331 | } |