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ebf2b9e3 ZLK |
1 | /* |
2 | * Imagination Technologies MIPSfpga platform code | |
3 | * | |
4 | * Copyright (C) 2016, Imagination Technologies Ltd. | |
5 | * | |
6 | * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> | |
7 | * | |
8 | * SPDX-License-Identifier: GPL-2.0+ | |
9 | * | |
10 | */ | |
11 | ||
12 | #include <common.h> | |
13 | ||
088454cd SG |
14 | DECLARE_GLOBAL_DATA_PTR; |
15 | ||
ebf2b9e3 | 16 | /* initialize the DDR Controller and PHY */ |
088454cd | 17 | int initdram(void) |
ebf2b9e3 ZLK |
18 | { |
19 | /* MIG IP block is smart and doesn't need SW | |
20 | * to do any init */ | |
088454cd SG |
21 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; /* in bytes */ |
22 | ||
23 | return 0; | |
ebf2b9e3 | 24 | } |