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6895d451 JR |
1 | /* |
2 | * (C) Copyright 2009 DENX Software Engineering | |
3 | * Author: John Rigby <jrigby@gmail.com> | |
4 | * | |
5 | * Based on imx27lite.c: | |
6 | * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net> | |
7 | * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com> | |
8 | * And: | |
9 | * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | * | |
26 | */ | |
27 | #include <common.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/arch/imx-regs.h> | |
30 | #include <asm/arch/imx25-pinmux.h> | |
c2205f4d | 31 | #include <asm/gpio.h> |
e6d9b978 | 32 | #include <asm/arch/sys_proto.h> |
6895d451 | 33 | |
6895d451 JR |
34 | DECLARE_GLOBAL_DATA_PTR; |
35 | ||
da962b71 BT |
36 | #ifdef CONFIG_SPL_BUILD |
37 | void board_init_f(ulong bootflag) | |
38 | { | |
5c6db120 | 39 | relocate_code(CONFIG_SPL_TEXT_BASE); |
da962b71 BT |
40 | asm volatile("ldr pc, =nand_boot"); |
41 | } | |
42 | #endif | |
43 | ||
6895d451 | 44 | #ifdef CONFIG_FEC_MXC |
5fecb36c SB |
45 | #define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) |
46 | #define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9) | |
6e2fbdea | 47 | |
6895d451 JR |
48 | void tx25_fec_init(void) |
49 | { | |
50 | struct iomuxc_mux_ctl *muxctl; | |
51 | struct iomuxc_pad_ctl *padctl; | |
6895d451 | 52 | u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5); |
6895d451 JR |
53 | u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode; |
54 | ||
55 | debug("tx25_fec_init\n"); | |
56 | /* | |
57 | * fec pin init is generic | |
58 | */ | |
59 | mx25_fec_init_pins(); | |
60 | ||
61 | /* | |
62 | * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins. | |
63 | * | |
64 | * FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13 | |
65 | * FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11 | |
66 | */ | |
67 | muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; | |
68 | padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; | |
69 | ||
70 | writel(gpio_mux_mode, &muxctl->pad_d13); | |
71 | writel(gpio_mux_mode, &muxctl->pad_d11); | |
72 | ||
73 | writel(0x0, &padctl->pad_d13); | |
74 | writel(0x0, &padctl->pad_d11); | |
75 | ||
76 | /* drop PHY power and assert reset (low) */ | |
09891238 VN |
77 | gpio_direction_output(GPIO_FEC_RESET_B, 0); |
78 | gpio_direction_output(GPIO_FEC_ENABLE_B, 0); | |
6895d451 JR |
79 | |
80 | mdelay(5); | |
81 | ||
82 | debug("resetting phy\n"); | |
83 | ||
84 | /* turn on PHY power leaving reset asserted */ | |
09891238 | 85 | gpio_set_value(GPIO_FEC_ENABLE_B, 1); |
6895d451 JR |
86 | |
87 | mdelay(10); | |
88 | ||
89 | /* | |
90 | * Setup some strapping pins that are latched by the PHY | |
91 | * as reset goes high. | |
92 | * | |
93 | * Set PHY mode to 111 | |
94 | * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5 | |
95 | * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5 | |
96 | * mode2 is tied high so nothing to do | |
97 | * | |
98 | * Turn on RMII mode | |
99 | * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode | |
100 | */ | |
101 | /* | |
102 | * save three current mux modes and set each to gpio mode | |
103 | */ | |
104 | saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0); | |
105 | saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1); | |
106 | saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv); | |
107 | ||
108 | writel(gpio_mux_mode, &muxctl->pad_fec_rdata0); | |
109 | writel(gpio_mux_mode, &muxctl->pad_fec_rdata1); | |
110 | writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv); | |
111 | ||
112 | /* | |
113 | * set each to 1 and make each an output | |
114 | */ | |
5fecb36c SB |
115 | gpio_direction_output(IMX_GPIO_NR(3, 10), 1); |
116 | gpio_direction_output(IMX_GPIO_NR(3, 11), 1); | |
117 | gpio_direction_output(IMX_GPIO_NR(3, 12), 1); | |
6895d451 JR |
118 | |
119 | mdelay(22); /* this value came from RedBoot */ | |
120 | ||
121 | /* | |
122 | * deassert PHY reset | |
123 | */ | |
09891238 | 124 | gpio_set_value(GPIO_FEC_RESET_B, 1); |
6895d451 JR |
125 | |
126 | mdelay(5); | |
127 | ||
128 | /* | |
129 | * set FEC pins back | |
130 | */ | |
131 | writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0); | |
132 | writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1); | |
133 | writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv); | |
134 | } | |
135 | #else | |
136 | #define tx25_fec_init() | |
137 | #endif | |
138 | ||
139 | int board_init() | |
140 | { | |
141 | #ifdef CONFIG_MXC_UART | |
9aa720b1 | 142 | mx25_uart1_init_pins(); |
6895d451 | 143 | #endif |
87db58dc | 144 | /* board id for linux */ |
87db58dc | 145 | gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
6895d451 JR |
146 | return 0; |
147 | } | |
148 | ||
149 | int board_late_init(void) | |
150 | { | |
151 | tx25_fec_init(); | |
152 | return 0; | |
153 | } | |
154 | ||
77f11a99 | 155 | int dram_init(void) |
6895d451 | 156 | { |
ab86f72c | 157 | /* dram_init must store complete ramsize in gd->ram_size */ |
a55d23cc | 158 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, |
ab86f72c HS |
159 | PHYS_SDRAM_1_SIZE); |
160 | return 0; | |
161 | } | |
6895d451 | 162 | |
ab86f72c HS |
163 | void dram_init_banksize(void) |
164 | { | |
6895d451 | 165 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
a55d23cc | 166 | gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, |
6895d451 JR |
167 | PHYS_SDRAM_1_SIZE); |
168 | #if CONFIG_NR_DRAM_BANKS > 1 | |
169 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; | |
a55d23cc | 170 | gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2, |
6895d451 | 171 | PHYS_SDRAM_2_SIZE); |
ab86f72c | 172 | #else |
6895d451 | 173 | |
ab86f72c | 174 | #endif |
6895d451 JR |
175 | } |
176 | ||
177 | int checkboard(void) | |
178 | { | |
179 | printf("KARO TX25\n"); | |
180 | return 0; | |
181 | } |