projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| bc8f8c26 IY |
1 | /* |
| 2 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | |
| 3 | * Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com | |
| 4 | * | |
| 1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| bc8f8c26 IY |
6 | */ |
| 7 | ||
| 8 | #include <common.h> | |
| 9 | #include <i2c.h> | |
| 10 | #include <libfdt.h> | |
| 11 | #include <fdt_support.h> | |
| 12 | #include <pci.h> | |
| 13 | #include <mpc83xx.h> | |
| 14 | #include <netdev.h> | |
| 15 | #include <asm/io.h> | |
| 16 | #include <asm/fsl_serdes.h> | |
| 17 | #include <asm/fsl_mpc83xx_serdes.h> | |
| 18 | ||
| 19 | DECLARE_GLOBAL_DATA_PTR; | |
| 20 | ||
| 21 | int checkboard(void) | |
| 22 | { | |
| 23 | printf("Board: MPC8308 P1M\n"); | |
| 24 | ||
| 25 | return 0; | |
| 26 | } | |
| 27 | ||
| 28 | static struct pci_region pcie_regions_0[] = { | |
| 29 | { | |
| 30 | .bus_start = CONFIG_SYS_PCIE1_MEM_BASE, | |
| 31 | .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS, | |
| 32 | .size = CONFIG_SYS_PCIE1_MEM_SIZE, | |
| 33 | .flags = PCI_REGION_MEM, | |
| 34 | }, | |
| 35 | { | |
| 36 | .bus_start = CONFIG_SYS_PCIE1_IO_BASE, | |
| 37 | .phys_start = CONFIG_SYS_PCIE1_IO_PHYS, | |
| 38 | .size = CONFIG_SYS_PCIE1_IO_SIZE, | |
| 39 | .flags = PCI_REGION_IO, | |
| 40 | }, | |
| 41 | }; | |
| 42 | ||
| 43 | void pci_init_board(void) | |
| 44 | { | |
| 45 | immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; | |
| 46 | sysconf83xx_t *sysconf = &immr->sysconf; | |
| 47 | law83xx_t *pcie_law = sysconf->pcielaw; | |
| 48 | struct pci_region *pcie_reg[] = { pcie_regions_0 }; | |
| 49 | ||
| 50 | fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX, | |
| 51 | FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); | |
| 52 | ||
| 53 | /* Deassert the resets in the control register */ | |
| 54 | out_be32(&sysconf->pecr1, 0xE0008000); | |
| 55 | udelay(2000); | |
| 56 | ||
| 57 | /* Configure PCI Express Local Access Windows */ | |
| 58 | out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); | |
| 59 | out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB); | |
| 60 | ||
| 6aa3d3bf | 61 | mpc83xx_pcie_init(1, pcie_reg); |
| bc8f8c26 IY |
62 | } |
| 63 | ||
| 64 | #if defined(CONFIG_OF_BOARD_SETUP) | |
| e895a4b0 | 65 | int ft_board_setup(void *blob, bd_t *bd) |
| bc8f8c26 IY |
66 | { |
| 67 | ft_cpu_setup(blob, bd); | |
| a5c289b9 | 68 | fsl_fdt_fixup_dr_usb(blob, bd); |
| e895a4b0 SG |
69 | |
| 70 | return 0; | |
| bc8f8c26 IY |
71 | } |
| 72 | #endif | |
| 73 | ||
| 74 | int board_eth_init(bd_t *bis) | |
| 75 | { | |
| 76 | int rv, num_if = 0; | |
| 77 | ||
| 78 | /* Initialize TSECs first */ | |
| 79 | rv = cpu_eth_init(bis); | |
| 80 | if (rv >= 0) | |
| 81 | num_if += rv; | |
| 82 | else | |
| 83 | printf("ERROR: failed to initialize TSECs.\n"); | |
| 84 | ||
| 85 | rv = pci_eth_init(bis); | |
| 86 | if (rv >= 0) | |
| 87 | num_if += rv; | |
| 88 | else | |
| 89 | printf("ERROR: failed to initialize PCI Ethernet.\n"); | |
| 90 | ||
| 91 | return num_if; | |
| 92 | } |