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* Patches by Robert Schwebel, 26 Jun 2003:
[people/ms/u-boot.git] / board / mpl / common / isa.c
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1/*
2 * (C) Copyright 2001
3 * Denis Peter, MPL AG Switzerland
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 *
24 * TODO: clean-up
25 */
26
27#include <common.h>
28#include <asm/processor.h>
29#include <devices.h>
30#include "isa.h"
31#include "piix4_pci.h"
32#include "kbd.h"
33#include "video.h"
34
35extern int drv_isa_kbd_init (void);
36
37#undef ISA_DEBUG
38
39#ifdef ISA_DEBUG
40#define PRINTF(fmt,args...) printf (fmt ,##args)
41#else
42#define PRINTF(fmt,args...)
43#endif
44
45#ifndef TRUE
46#define TRUE 1
47#endif
48#ifndef FALSE
49#define FALSE 0
50#endif
51
52
53
54/* fdc (logical device 0) */
55const SIO_LOGDEV_TABLE sio_fdc[] = {
56 {0x60, 3}, /* set IO to FDPort (3F0) */
57 {0x61, 0xF0}, /* set IO to FDPort (3F0) */
58 {0x70, 06}, /* set IRQ 6 for FDPort */
59 {0x74, 02}, /* set DMA 2 for FDPort */
60 {0xF0, 0x05}, /* set to PS2 type */
61 {0xF1, 0x00}, /* default value */
62 {0x30, 1}, /* and activate the device */
63 {0xFF, 0} /* end of device table */
64};
65/* paralell port (logical device 3) */
66const SIO_LOGDEV_TABLE sio_pport[] = {
67 {0x60, 3}, /* set IO to PPort (378) */
68 {0x61, 0x78}, /* set IO to PPort (378) */
69 {0x70, 07}, /* set IRQ 7 for PPort */
70 {0xF1, 00}, /* set PPort to normal */
71 {0x30, 1}, /* and activate the device */
72 {0xFF, 0} /* end of device table */
73};
74/* paralell port (logical device 3) Floppy assigned to lpt */
75const SIO_LOGDEV_TABLE sio_pport_fdc[] = {
76 {0x60, 3}, /* set IO to PPort (378) */
77 {0x61, 0x78}, /* set IO to PPort (378) */
78 {0x70, 07}, /* set IRQ 7 for PPort */
79 {0xF1, 02}, /* set PPort to Floppy */
80 {0x30, 1}, /* and activate the device */
81 {0xFF, 0} /* end of device table */
82};
83/* uart 1 (logical device 4) */
84const SIO_LOGDEV_TABLE sio_com1[] = {
85 {0x60, 3}, /* set IO to COM1 (3F8) */
86 {0x61, 0xF8}, /* set IO to COM1 (3F8) */
87 {0x70, 04}, /* set IRQ 4 for COM1 */
88 {0x30, 1}, /* and activate the device */
89 {0xFF, 0} /* end of device table */
90};
91/* uart 2 (logical device 5) */
92const SIO_LOGDEV_TABLE sio_com2[] = {
93 {0x60, 2}, /* set IO to COM2 (2F8) */
94 {0x61, 0xF8}, /* set IO to COM2 (2F8) */
95 {0x70, 03}, /* set IRQ 3 for COM2 */
96 {0x30, 1}, /* and activate the device */
97 {0xFF, 0} /* end of device table */
98};
99
100/* keyboard controller (logical device 7) */
101const SIO_LOGDEV_TABLE sio_keyboard[] = {
102 {0x70, 1}, /* set IRQ 1 for keyboard */
103 {0x72, 12}, /* set IRQ 12 for mouse */
104 {0xF0, 0}, /* disable Port92 (this is a PowerPC!!) */
105 {0x30, 1}, /* and activate the device */
106 {0xFF, 0} /* end of device table */
107};
108
109
110/*******************************************************************************
111* Config SuperIO FDC37C672
112********************************************************************************/
113unsigned char open_cfg_super_IO(int address)
114{
115 out8(CFG_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */
116 out8(CFG_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */
117 if(in8(CFG_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */
118 return TRUE;
119 else
120 return FALSE;
121}
122
123void close_cfg_super_IO(int address)
124{
125 out8(CFG_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */
126}
127
128
129unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr)
130{
131 /* assuming config reg is open */
132 out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
133 out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
134 out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
135 return in8(CFG_ISA_IO_BASE_ADDRESS | address | 1);
136}
137
138void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data)
139{
140 /* assuming config reg is open */
141 out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
142 out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
143 out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
144 out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */
145}
146
147void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev)
148{
149 while (ldt->index != 0xFF) {
150 write_cfg_super_IO(SIO_CFG_PORT, ldev, ldt->index, ldt->val);
151 ldt++;
152 } /* endwhile */
153}
154
155void isa_sio_loadtable(void)
156{
157 unsigned char *s = getenv("floppy");
158 /* setup Floppy device 0*/
159 isa_write_table((SIO_LOGDEV_TABLE *)&sio_fdc,0);
160 /* setup parallel port device 3 */
161 if(s && !strncmp(s, "lpt", 3)) {
162 printf("SIO: Floppy assigned to LPT\n");
163 /* floppy is assigned to the LPT */
164 isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport_fdc,3);
165 }
166 else {
167 /*printf("Floppy assigned to internal port\n");*/
168 isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport,3);
169 }
170 /* setup Com1 port device 4 */
171 isa_write_table((SIO_LOGDEV_TABLE *)&sio_com1,4);
172 /* setup Com2 port device 5 */
173 isa_write_table((SIO_LOGDEV_TABLE *)&sio_com2,5);
174 /* setup keyboards device 7 */
175 isa_write_table((SIO_LOGDEV_TABLE *)&sio_keyboard,7);
176}
177
178
179void isa_sio_setup(void)
180{
181 if(open_cfg_super_IO(SIO_CFG_PORT)==TRUE)
182 {
183 isa_sio_loadtable();
184 close_cfg_super_IO(0x3F0);
185 }
186}
187
188
189
190/******************************************************************************
191 * IRQ Controller
192 * we use the Vector mode
193 */
194
195struct isa_irq_action {
196 interrupt_handler_t *handler;
197 void *arg;
198 int count;
199};
200
201static struct isa_irq_action isa_irqs[16];
202
203
204/*
205 * This contains the irq mask for both 8259A irq controllers,
206 */
207static unsigned int cached_irq_mask = 0xffff;
208
209#define cached_imr1 (unsigned char)cached_irq_mask
210#define cached_imr2 (unsigned char)(cached_irq_mask>>8)
211#define IMR_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
212#define IMR_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
213#define ICW1_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
214#define ICW1_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
215#define ICW2_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
216#define ICW2_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
217#define ICW3_1 ICW2_1
218#define ICW3_2 ICW2_2
219#define ICW4_1 ICW2_1
220#define ICW4_2 ICW2_2
221#define ISR_1 ICW1_1
222#define ISR_2 ICW1_2
223
224
225void disable_8259A_irq(unsigned int irq)
226{
227 unsigned int mask = 1 << irq;
228
229 cached_irq_mask |= mask;
230 if (irq & 8)
231 out8(IMR_2,cached_imr2);
232 else
233 out8(IMR_1,cached_imr1);
234}
235
236void enable_8259A_irq(unsigned int irq)
237{
238 unsigned int mask = ~(1 << irq);
239
240 cached_irq_mask &= mask;
241 if (irq & 8)
242 out8(IMR_2,cached_imr2);
243 else
244 out8(IMR_1,cached_imr1);
245}
246/*
247int i8259A_irq_pending(unsigned int irq)
248{
249 unsigned int mask = 1<<irq;
250 int ret;
251
252 if (irq < 8)
253 ret = inb(0x20) & mask;
254 else
255 ret = inb(0xA0) & (mask >> 8);
256 spin_unlock_irqrestore(&i8259A_lock, flags);
257
258 return ret;
259}
260*/
261
262/*
263 * This function assumes to be called rarely. Switching between
264 * 8259A registers is slow.
265 */
266int i8259A_irq_real(unsigned int irq)
267{
268 int value;
269 int irqmask = 1<<irq;
270
271 if (irq < 8) {
272 out8(ISR_1,0x0B); /* ISR register */
273 value = in8(ISR_1) & irqmask;
274 out8(ISR_1,0x0A); /* back to the IRR register */
275 return value;
276 }
277 out8(ISR_2,0x0B); /* ISR register */
278 value = in8(ISR_2) & (irqmask >> 8);
279 out8(ISR_2,0x0A); /* back to the IRR register */
280 return value;
281}
282
283/*
284 * Careful! The 8259A is a fragile beast, it pretty
285 * much _has_ to be done exactly like this (mask it
286 * first, _then_ send the EOI, and the order of EOI
287 * to the two 8259s is important!
288 */
289void mask_and_ack_8259A(unsigned int irq)
290{
291 unsigned int irqmask = 1 << irq;
292 unsigned int temp_irqmask = cached_irq_mask;
293 /*
294 * Lightweight spurious IRQ detection. We do not want
295 * to overdo spurious IRQ handling - it's usually a sign
296 * of hardware problems, so we only do the checks we can
297 * do without slowing down good hardware unnecesserily.
298 *
299 * Note that IRQ7 and IRQ15 (the two spurious IRQs
300 * usually resulting from the 8259A-1|2 PICs) occur
301 * even if the IRQ is masked in the 8259A. Thus we
302 * can check spurious 8259A IRQs without doing the
303 * quite slow i8259A_irq_real() call for every IRQ.
304 * This does not cover 100% of spurious interrupts,
305 * but should be enough to warn the user that there
306 * is something bad going on ...
307 */
308 if (temp_irqmask & irqmask)
309 goto spurious_8259A_irq;
310 temp_irqmask |= irqmask;
311
312handle_real_irq:
313 if (irq & 8) {
314 in8(IMR_2); /* DUMMY - (do we need this?) */
315 out8(IMR_2,(unsigned char)(temp_irqmask>>8));
316 out8(ISR_2,0x60+(irq&7));/* 'Specific EOI' to slave */
317 out8(ISR_1,0x62); /* 'Specific EOI' to master-IRQ2 */
318 out8(IMR_2,cached_imr2); /* turn it on again */
319 } else {
320 in8(IMR_1); /* DUMMY - (do we need this?) */
321 out8(IMR_1,(unsigned char)temp_irqmask);
322 out8(ISR_1,0x60+irq); /* 'Specific EOI' to master */
323 out8(IMR_1,cached_imr1); /* turn it on again */
324 }
325
326 return;
327
328spurious_8259A_irq:
329 /*
330 * this is the slow path - should happen rarely.
331 */
332 if (i8259A_irq_real(irq))
333 /*
334 * oops, the IRQ _is_ in service according to the
335 * 8259A - not spurious, go handle it.
336 */
337 goto handle_real_irq;
338
339 {
340 static int spurious_irq_mask;
341 /*
342 * At this point we can be sure the IRQ is spurious,
343 * lets ACK and report it. [once per IRQ]
344 */
345 if (!(spurious_irq_mask & irqmask)) {
346 PRINTF("spurious 8259A interrupt: IRQ%d.\n", irq);
347 spurious_irq_mask |= irqmask;
348 }
349 /* irq_err_count++; */
350 /*
351 * Theoretically we do not have to handle this IRQ,
352 * but in Linux this does not cause problems and is
353 * simpler for us.
354 */
355 goto handle_real_irq;
356 }
357}
358
359void init_8259A(void)
360{
361 out8(IMR_1,0xff); /* mask all of 8259A-1 */
362 out8(IMR_2,0xff); /* mask all of 8259A-2 */
363
364 out8(ICW1_1,0x11); /* ICW1: select 8259A-1 init */
365 out8(ICW2_1,0x20 + 0); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
366 out8(ICW3_1,0x04); /* 8259A-1 (the master) has a slave on IR2 */
367 out8(ICW4_1,0x01); /* master expects normal EOI */
368 out8(ICW1_2,0x11); /* ICW2: select 8259A-2 init */
369 out8(ICW2_2,0x20 + 8); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
370 out8(ICW3_2,0x02); /* 8259A-2 is a slave on master's IR2 */
371 out8(ICW4_2,0x01); /* (slave's support for AEOI in flat mode
372 is to be investigated) */
373 udelay(10000); /* wait for 8259A to initialize */
374 out8(IMR_1,cached_imr1); /* restore master IRQ mask */
375 udelay(10000); /* wait for 8259A to initialize */
376 out8(IMR_2,cached_imr2); /* restore slave IRQ mask */
377}
378
379
380#define PCI_INT_ACK_ADDR 0xEED00000
381
382int handle_isa_int(void)
383{
384 unsigned long irqack;
385 unsigned char isr1,isr2,irq;
386 /* first we acknokledge the int via the PCI bus */
387 irqack=in32(PCI_INT_ACK_ADDR);
388 /* now we get the ISRs */
389 isr2=in8(ISR_2);
390 isr1=in8(ISR_1);
391 irq=(unsigned char)irqack;
392 if((irq==7)&&((isr1&0x80)==0)) {
393 PRINTF("IRQ7 detected but not in ISR\n");
394 }
395 else {
396 /* we should handle cascaded interrupts here also */
397 /* printf("ISA Irq %d\n",irq); */
398 isa_irqs[irq].count++;
399 if (isa_irqs[irq].handler != NULL)
400 (*isa_irqs[irq].handler)(isa_irqs[irq].arg); /* call isr */
401 else
402 {
403 PRINTF ("bogus interrupt vector 0x%x\n", irq);
404 }
405 }
406 /* issue EOI instruction to clear the IRQ */
407 mask_and_ack_8259A(irq);
408 return 0;
409}
410
411
412
413/******************************************************************
414 * Install and free an ISA interrupt handler.
415 */
416
417void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
418{
419 if (isa_irqs[vec].handler != NULL) {
420 printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n",
421 vec, (uint)handler, (uint)isa_irqs[vec].handler);
422 }
423 isa_irqs[vec].handler = handler;
424 isa_irqs[vec].arg = arg;
425 enable_8259A_irq(vec);
426 PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask);
427
428}
429
430void isa_irq_free_handler(int vec)
431{
432 disable_8259A_irq(vec);
433 isa_irqs[vec].handler = NULL;
434 isa_irqs[vec].arg = NULL;
435 printf ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask);
436
437}
438
439/****************************************************************************/
440void isa_init_irq_contr(void)
441{
442 int i;
443 /* disable all Interrupts */
444 /* first write icws controller 1 */
445 for(i=0;i<16;i++)
446 {
447 isa_irqs[i].handler=NULL;
448 isa_irqs[i].arg=NULL;
449 isa_irqs[i].count=0;
450 }
451 init_8259A();
452 out8(IMR_2,0xFF);
453}
454
455
456/******************************************************************
457 * Init the ISA bus and devices.
458 */
459
460
461int isa_init(void)
462{
463 isa_sio_setup();
464 drv_isa_kbd_init();
465 return 0;
466}
467
468
469