[people/ms/u-boot.git] / board / nvidia / dts / tegra20-harmony.dts

/dts-v1/;

#include "tegra20.dtsi"

/ {
	model = "NVIDIA Tegra20 Harmony evaluation board";
	compatible = "nvidia,harmony", "nvidia,tegra20";

	aliases {
		usb0 = "/usb@c5008000";
		usb1 = "/usb@c5004000";
		sdhci0 = "/sdhci@c8000600";
		sdhci1 = "/sdhci@c8000200";
	};

	memory {
		reg = <0x00000000 0x40000000>;
	};

	serial@70006300 {
		clock-frequency = < 216000000 >;
	};

	nand-controller@70008000 {
		nvidia,wp-gpios = <&gpio 23 0>;		/* PC7 */
		nvidia,width = <8>;
		nvidia,timing = <26 100 20 80 20 10 12 10 70>;
		nand@0 {
			reg = <0>;
			compatible = "hynix,hy27uf4g2b", "nand-flash";
		};
	};

	i2c@7000c000 {
		status = "disabled";
	};

	i2c@7000c400 {
		status = "disabled";
	};

	i2c@7000c500 {
		status = "disabled";
	};

	i2c@7000d000 {
		status = "disabled";
	};

	usb@c5000000 {
		status = "disabled";
	};

	usb@c5004000 {
		nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
	};

	sdhci@c8000200 {
		status = "okay";
		cd-gpios = <&gpio 69 1>; /* gpio PI5 */
		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
		power-gpios = <&gpio 155 0>; /* gpio PT3 */
		bus-width = <4>;
	};

	sdhci@c8000600 {
		status = "okay";
		cd-gpios = <&gpio 58 1>; /* gpio PH2 */
		wp-gpios = <&gpio 59 0>; /* gpio PH3 */
		power-gpios = <&gpio 70 0>; /* gpio PI6 */
		bus-width = <8>;
	};
};
Commit	Line	Data
f3d93309 SW	1	/dts-v1/;
f3d93309 SW	2
6c5be646	3	#include "tegra20.dtsi"
f3d93309 SW	4
f3d93309 SW	5	/ {
00a2749d	6	model = "NVIDIA Tegra20 Harmony evaluation board";
f3d93309 SW	7	compatible = "nvidia,harmony", "nvidia,tegra20";
	8
	9	aliases {
	10	usb0 = "/usb@c5008000";
699c40e8	11	usb1 = "/usb@c5004000";
126685ad TW	12	sdhci0 = "/sdhci@c8000600";
126685ad TW	13	sdhci1 = "/sdhci@c8000200";
f3d93309 SW	14	};
	15
	16	memory {
	17	reg = <0x00000000 0x40000000>;
	18	};
	19
f3d93309 SW	20	serial@70006300 {
	21	clock-frequency = < 216000000 >;
	22	};
	23
b7723f3f AM	24	nand-controller@70008000 {
	25	nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
	26	nvidia,width = <8>;
	27	nvidia,timing = <26 100 20 80 20 10 12 10 70>;
	28	nand@0 {
	29	reg = <0>;
	30	compatible = "hynix,hy27uf4g2b", "nand-flash";
	31	};
	32	};
	33
f3d93309 SW	34	i2c@7000c000 {
	35	status = "disabled";
	36	};
	37
	38	i2c@7000c400 {
	39	status = "disabled";
	40	};
	41
	42	i2c@7000c500 {
	43	status = "disabled";
	44	};
	45
	46	i2c@7000d000 {
	47	status = "disabled";
	48	};
	49
	50	usb@c5000000 {
	51	status = "disabled";
	52	};
	53
	54	usb@c5004000 {
699c40e8	55	nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
f3d93309	56	};
126685ad TW	57
	58	sdhci@c8000200 {
	59	status = "okay";
	60	cd-gpios = <&gpio 69 1>; /* gpio PI5 */
	61	wp-gpios = <&gpio 57 0>; /* gpio PH1 */
	62	power-gpios = <&gpio 155 0>; /* gpio PT3 */
	63	bus-width = <4>;
	64	};
	65
	66	sdhci@c8000600 {
	67	status = "okay";
	68	cd-gpios = <&gpio 58 1>; /* gpio PH2 */
	69	wp-gpios = <&gpio 59 0>; /* gpio PH3 */
	70	power-gpios = <&gpio 70 0>; /* gpio PI6 */
	71	bus-width = <8>;
	72	};
f3d93309	73	};