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1/*
2 * (C) Copyright 2008
3 * Grazvydas Ignotas <notasas@gmail.com>
4 *
5 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
6 * Richard Woodruff <r-woodruff2@ti.com>
7 * Syed Mohammed Khasim <khasim@ti.com>
8 * Sunil Kumar <sunilsaini05@gmail.com>
9 * Shashi Ranjan <shashiranjanmca05@gmail.com>
10 *
11 * (C) Copyright 2004-2008
12 * Texas Instruments, <www.ti.com>
13 *
1a459660 14 * SPDX-License-Identifier: GPL-2.0+
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15 */
16#include <common.h>
2c155130 17#include <twl4030.h>
2be2c6cc 18#include <asm/io.h>
7cad446b 19#include <asm/gpio.h>
86c5c544 20#include <asm/arch/mmc_host_def.h>
2be2c6cc 21#include <asm/arch/mux.h>
080a46ea 22#include <asm/arch/gpio.h>
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23#include <asm/arch/sys_proto.h>
24#include <asm/mach-types.h>
25#include "pandora.h"
26
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27DECLARE_GLOBAL_DATA_PTR;
28
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29#define TWL4030_BB_CFG_BBCHEN (1 << 4)
30#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
31#define TWL4030_BB_CFG_BBISEL_500UA 2
32
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33#define CONTROL_WKUP_CTRL 0x48002a5c
34#define GPIO_IO_PWRDNZ (1 << 6)
35#define PBIASLITEVMODE1 (1 << 8)
36
58911517 37/*
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38 * Routine: board_init
39 * Description: Early hardware init.
58911517 40 */
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41int board_init(void)
42{
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43 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
44 /* board id for Linux */
45 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;
46 /* boot param addr */
47 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
48
49 return 0;
50}
51
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52static void set_output_gpio(unsigned int gpio, int value)
53{
54 int ret;
55
56 ret = gpio_request(gpio, "");
57 if (ret != 0) {
58 printf("could not request GPIO %u\n", gpio);
59 return;
60 }
61 ret = gpio_direction_output(gpio, value);
62 if (ret != 0)
63 printf("could not set GPIO %u to %d\n", gpio, value);
64}
65
58911517 66/*
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67 * Routine: misc_init_r
68 * Description: Configure board specific parts
58911517 69 */
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70int misc_init_r(void)
71{
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72 t2_t *t2_base = (t2_t *)T2_BASE;
73 u32 pbias_lite;
2be2c6cc 74
ead39d7a 75 twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
2be2c6cc 76
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77 /* set up dual-voltage GPIOs to 1.8V */
78 pbias_lite = readl(&t2_base->pbias_lite);
79 pbias_lite &= ~PBIASLITEVMODE1;
80 pbias_lite |= PBIASLITEPWRDNZ1;
81 writel(pbias_lite, &t2_base->pbias_lite);
82 if (get_cpu_family() == CPU_OMAP36XX)
83 writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
84 CONTROL_WKUP_CTRL);
85
86 /* make sure audio and BT chips are in powerdown state */
87 set_output_gpio(14, 0);
88 set_output_gpio(15, 0);
89 set_output_gpio(118, 0);
90
91 /* enable USB supply */
92 set_output_gpio(164, 1);
2be2c6cc 93
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94 /* wifi needs a short pulse to enter powersave state */
95 set_output_gpio(23, 1);
96 udelay(5000);
97 gpio_direction_output(23, 0);
2be2c6cc 98
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99 /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */
100 twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
0208aaf6 101 TWL4030_PM_RECEIVER_BB_CFG,
5246d01e 102 TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV |
0208aaf6 103 TWL4030_BB_CFG_BBISEL_500UA);
5246d01e 104
679f82c3 105 omap_die_id_display();
e6a6a704 106
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107 return 0;
108}
109
58911517 110/*
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111 * Routine: set_muxconf_regs
112 * Description: Setting up the configuration Mux registers specific to the
113 * hardware. Many pins need to be moved from protect to primary
114 * mode.
58911517 115 */
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116void set_muxconf_regs(void)
117{
118 MUX_PANDORA();
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119 if (get_cpu_family() == CPU_OMAP36XX) {
120 MUX_PANDORA_3730();
121 }
2be2c6cc 122}
86c5c544 123
4aa2ba3a 124#ifdef CONFIG_MMC
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125int board_mmc_init(bd_t *bis)
126{
e3913f56 127 return omap_mmc_init(0, 0, 0, -1, -1);
86c5c544 128}
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129
130void board_mmc_power_init(void)
131{
132 twl4030_power_mmc_init(0);
133}
86c5c544 134#endif