projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 0764c164 VL |
1 | /* Memory sub-system initialization code */ |
| 2 | ||
| 3 | #include <config.h> | |
| 0764c164 VL |
4 | #include <asm/regdef.h> |
| 5 | #include <asm/mipsregs.h> | |
| 6 | ||
| 7 | .text | |
| 8 | .set noreorder | |
| 9 | .set mips32 | |
| 10 | ||
| 11 | .globl lowlevel_init | |
| 12 | lowlevel_init: | |
| 13 | ||
| 14 | /* | |
| 15 | * Step 2) Establish Status Register | |
| 16 | * (set BEV, clear ERL, clear EXL, clear IE) | |
| 17 | */ | |
| 18 | li t1, 0x00400000 | |
| 19 | mtc0 t1, CP0_STATUS | |
| 20 | ||
| 21 | /* | |
| 22 | * Step 3) Establish CP0 Config0 | |
| 23 | * (set K0=3) | |
| 24 | */ | |
| 25 | li t1, 0x00000003 | |
| 26 | mtc0 t1, CP0_CONFIG | |
| 27 | ||
| 28 | /* | |
| 29 | * Step 7) Establish Cause | |
| 30 | * (set IV bit) | |
| 31 | */ | |
| 32 | li t1, 0x00800000 | |
| 33 | mtc0 t1, CP0_CAUSE | |
| 34 | ||
| 35 | /* Establish Wired (and Random) */ | |
| 36 | mtc0 zero, CP0_WIRED | |
| 37 | nop | |
| 38 | ||
| 43c50925 | 39 | jr ra |
| 0764c164 | 40 | nop |