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8ca805e1 NI |
1 | /* |
2 | * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | |
3 | * Copyright (C) 2011 Renesas Solutions Corp. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
8ca805e1 NI |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <asm/io.h> | |
10 | #include <asm/processor.h> | |
11 | #include <netdev.h> | |
d7405559 | 12 | #include <i2c.h> |
8ca805e1 | 13 | |
8ca805e1 NI |
14 | #define MODEMR (0xFFCC0020) |
15 | #define MODEMR_MASK (0x6) | |
16 | #define MODEMR_533MHZ (0x2) | |
17 | ||
18 | int checkboard(void) | |
19 | { | |
20 | u32 r = readl(MODEMR); | |
21 | if ((r & MODEMR_MASK) & MODEMR_533MHZ) | |
22 | puts("CPU Clock: 533MHz\n"); | |
23 | else | |
24 | puts("CPU Clock: 400MHz\n"); | |
25 | ||
26 | puts("BOARD: Renesas Technology Corp. R0P7734C00000RZ\n"); | |
27 | return 0; | |
28 | } | |
29 | ||
30 | #define MSTPSR1 (0xFFC80044) | |
31 | #define MSTPCR1 (0xFFC80034) | |
32 | #define MSTPSR1_GETHER (1 << 14) | |
33 | ||
34 | int board_init(void) | |
35 | { | |
36 | #if defined(CONFIG_SH_ETHER) | |
37 | u32 r = readl(MSTPSR1); | |
38 | if (r & MSTPSR1_GETHER) | |
39 | writel((r & ~MSTPSR1_GETHER), MSTPCR1); | |
40 | #endif | |
d7405559 NI |
41 | |
42 | return 0; | |
43 | } | |
44 | ||
45 | int board_late_init(void) | |
46 | { | |
47 | u8 mac[6]; | |
48 | ||
49 | /* Read Mac Address and set*/ | |
50 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
51 | i2c_set_bus_num(CONFIG_SYS_I2C_MODULE); | |
52 | ||
53 | /* Read MAC address */ | |
54 | i2c_read(0x50, 0x10, 0, mac, 6); | |
55 | ||
0adb5b76 | 56 | if (is_valid_ethaddr(mac)) |
d7405559 NI |
57 | eth_setenv_enetaddr("ethaddr", mac); |
58 | ||
8ca805e1 NI |
59 | return 0; |
60 | } | |
61 | ||
8ca805e1 NI |
62 | #ifdef CONFIG_SMC911X |
63 | int board_eth_init(bd_t *bis) | |
64 | { | |
65 | int rc = 0; | |
66 | rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); | |
67 | return rc; | |
68 | } | |
69 | #endif |