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Commit | Line | Data |
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f5e2466f NI |
1 | /* |
2 | * Copyright (C) 2007,2008 | |
3 | * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
f5e2466f NI |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <ide.h> | |
3c094b65 | 10 | #include <netdev.h> |
f5e2466f | 11 | #include <asm/processor.h> |
5cd5b2c9 | 12 | #include <asm/io.h> |
f5e2466f NI |
13 | #include <asm/pci.h> |
14 | ||
15 | int checkboard(void) | |
16 | { | |
17 | puts("BOARD: Renesas Solutions R2D Plus\n"); | |
18 | return 0; | |
19 | } | |
20 | ||
21 | int board_init(void) | |
22 | { | |
23 | return 0; | |
24 | } | |
25 | ||
f5e2466f NI |
26 | int board_late_init(void) |
27 | { | |
28 | return 0; | |
29 | } | |
30 | ||
5cd5b2c9 NI |
31 | #define FPGA_BASE 0xA4000000 |
32 | #define FPGA_CFCTL (FPGA_BASE + 0x04) | |
33 | #define CFCTL_EN (0x432) | |
34 | #define FPGA_CFPOW (FPGA_BASE + 0x06) | |
35 | #define CFPOW_ON (0x02) | |
36 | #define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A) | |
37 | #define CFCDINTCLR_EN (0x01) | |
f5e2466f | 38 | |
5cd5b2c9 | 39 | void ide_set_reset(int idereset) |
f5e2466f NI |
40 | { |
41 | /* if reset = 1 IDE reset will be asserted */ | |
5cd5b2c9 NI |
42 | if (idereset) { |
43 | outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */ | |
44 | outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */ | |
45 | outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */ | |
f5e2466f NI |
46 | } |
47 | } | |
48 | ||
f5e2466f NI |
49 | static struct pci_controller hose; |
50 | void pci_init_board(void) | |
51 | { | |
5cd5b2c9 | 52 | pci_sh7751_init(&hose); |
f5e2466f | 53 | } |
0b252f50 BW |
54 | |
55 | int board_eth_init(bd_t *bis) | |
56 | { | |
57 | return pci_eth_init(bis); | |
58 | } |