[people/ms/u-boot.git] / board / samsung / common / exynos5-dt.c

/*
 * Copyright (C) 2012 Samsung Electronics
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <dwc3-uboot.h>
#include <fdtdec.h>
#include <asm/io.h>
#include <errno.h>
#include <i2c.h>
#include <mmc.h>
#include <netdev.h>
#include <samsung-usb-phy-uboot.h>
#include <spi.h>
#include <usb.h>
#include <video_bridge.h>
#include <asm/gpio.h>
#include <asm/arch/cpu.h>
#include <asm/arch/dwmmc.h>
#include <asm/arch/mmc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/power.h>
#include <asm/arch/sromc.h>
#include <power/pmic.h>
#include <power/max77686_pmic.h>
#include <power/regulator.h>
#include <power/s2mps11.h>
#include <power/s5m8767.h>
#include <samsung/exynos5-dt-types.h>
#include <samsung/misc.h>
#include <tmu.h>

DECLARE_GLOBAL_DATA_PTR;

static void board_enable_audio_codec(void)
{
	int node, ret;
	struct gpio_desc en_gpio;

	node = fdtdec_next_compatible(gd->fdt_blob, 0,
		COMPAT_SAMSUNG_EXYNOS5_SOUND);
	if (node <= 0)
		return;

	ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
					 "codec-enable-gpio", 0, &en_gpio,
					 GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
	if (ret == -FDT_ERR_NOTFOUND)
		return;

	/* Turn on the GPIO which connects to the codec's "enable" line. */
	gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);

#ifdef CONFIG_SOUND_MAX98095
	/* Enable MAX98095 Codec */
	gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
	gpio_direction_output(EXYNOS5_GPIO_X17, 1);
	gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
#endif
}

int exynos_init(void)
{
	board_enable_audio_codec();

	return 0;
}

static int exynos_set_regulator(const char *name, uint uv)
{
	struct udevice *dev;
	int ret;

	ret = regulator_get_by_platname(name, &dev);
	if (ret) {
		debug("%s: Cannot find regulator %s\n", __func__, name);
		return ret;
	}
	ret = regulator_set_value(dev, uv);
	if (ret) {
		debug("%s: Cannot set regulator %s\n", __func__, name);
		return ret;
	}

	return 0;
}

int exynos_power_init(void)
{
	struct udevice *dev;
	int ret;

	ret = pmic_get("max77686", &dev);
	if (!ret) {
		/* TODO(sjg@chromium.org): Move into the clock/pmic API */
		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
				MAX77686_32KHCP_EN);
		if (ret)
			return ret;
		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
				MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
		if (ret)
			return ret;
	} else {
		ret = pmic_get("s5m8767-pmic", &dev);
		/* TODO(sjg@chromium.org): Use driver model to access clock */
#ifdef CONFIG_PMIC_S5M8767
		if (!ret)
			s5m8767_enable_32khz_cp(dev);
#endif
	}
	if (ret == -ENODEV)
		return 0;

	ret = regulators_enable_boot_on(false);
	if (ret)
		return ret;

	ret = exynos_set_regulator("vdd_mif", 1100000);
	if (ret)
		return ret;

	ret = exynos_set_regulator("vdd_arm", 1300000);
	if (ret)
		return ret;
	ret = exynos_set_regulator("vdd_int", 1012500);
	if (ret)
		return ret;
	ret = exynos_set_regulator("vdd_g3d", 1200000);
	if (ret)
		return ret;

	return 0;
}

int board_get_revision(void)
{
	return 0;
}

#ifdef CONFIG_USB_DWC3
static struct dwc3_device dwc3_device_data = {
	.maximum_speed = USB_SPEED_SUPER,
	.base = 0x12400000,
	.dr_mode = USB_DR_MODE_PERIPHERAL,
	.index = 0,
};

int usb_gadget_handle_interrupts(void)
{
	dwc3_uboot_handle_interrupt(0);
	return 0;
}

int board_usb_init(int index, enum usb_init_type init)
{
	struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
		samsung_get_base_usb3_phy();

	if (!phy) {
		pr_err("usb3 phy not supported");
		return -ENODEV;
	}

	set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
	exynos5_usb3_phy_init(phy);

	return dwc3_uboot_init(&dwc3_device_data);
}
#endif
#ifdef CONFIG_SET_DFU_ALT_INFO
char *get_dfu_alt_system(char *interface, char *devstr)
{
	char *info = "Not supported!";

	if (board_is_odroidxu4() || board_is_odroidhc1())
		return info;

	return env_get("dfu_alt_system");
}

char *get_dfu_alt_boot(char *interface, char *devstr)
{
	char *info = "Not supported!";
	struct mmc *mmc;
	char *alt_boot;
	int dev_num;

	if (board_is_odroidxu4() || board_is_odroidhc1())
		return info;

	dev_num = simple_strtoul(devstr, NULL, 10);

	mmc = find_mmc_device(dev_num);
	if (!mmc)
		return NULL;

	if (mmc_init(mmc))
		return NULL;

	if (IS_SD(mmc))
		alt_boot = CONFIG_DFU_ALT_BOOT_SD;
	else
		alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;

	return alt_boot;
}
#endif
Commit	Line	Data
c65dc7d8 SG	1	/*
	2	* Copyright (C) 2012 Samsung Electronics
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
	8	#include <dm.h>
	9	#include <dwc3-uboot.h>
	10	#include <fdtdec.h>
	11	#include <asm/io.h>
	12	#include <errno.h>
	13	#include <i2c.h>
	14	#include <mmc.h>
	15	#include <netdev.h>
	16	#include <samsung-usb-phy-uboot.h>
	17	#include <spi.h>
	18	#include <usb.h>
	19	#include <video_bridge.h>
	20	#include <asm/gpio.h>
	21	#include <asm/arch/cpu.h>
	22	#include <asm/arch/dwmmc.h>
	23	#include <asm/arch/mmc.h>
	24	#include <asm/arch/pinmux.h>
	25	#include <asm/arch/power.h>
	26	#include <asm/arch/sromc.h>
	27	#include <power/pmic.h>
	28	#include <power/max77686_pmic.h>
	29	#include <power/regulator.h>
1611c8cb	30	#include <power/s2mps11.h>
c65dc7d8	31	#include <power/s5m8767.h>
1611c8cb PM	32	#include <samsung/exynos5-dt-types.h>
1611c8cb PM	33	#include <samsung/misc.h>
c65dc7d8 SG	34	#include <tmu.h>
	35
	36	DECLARE_GLOBAL_DATA_PTR;
	37
	38	static void board_enable_audio_codec(void)
	39	{
	40	int node, ret;
	41	struct gpio_desc en_gpio;
	42
	43	node = fdtdec_next_compatible(gd->fdt_blob, 0,
	44	COMPAT_SAMSUNG_EXYNOS5_SOUND);
	45	if (node <= 0)
	46	return;
	47
150c5afe	48	ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
c65dc7d8 SG	49	"codec-enable-gpio", 0, &en_gpio,
	50	GPIOD_IS_OUT \| GPIOD_IS_OUT_ACTIVE);
	51	if (ret == -FDT_ERR_NOTFOUND)
	52	return;
	53
	54	/* Turn on the GPIO which connects to the codec's "enable" line. */
	55	gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
	56
	57	#ifdef CONFIG_SOUND_MAX98095
	58	/* Enable MAX98095 Codec */
	59	gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
	60	gpio_direction_output(EXYNOS5_GPIO_X17, 1);
	61	gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
	62	#endif
	63	}
	64
	65	int exynos_init(void)
	66	{
	67	board_enable_audio_codec();
	68
	69	return 0;
	70	}
	71
	72	static int exynos_set_regulator(const char *name, uint uv)
	73	{
	74	struct udevice *dev;
	75	int ret;
	76
	77	ret = regulator_get_by_platname(name, &dev);
	78	if (ret) {
	79	debug("%s: Cannot find regulator %s\n", __func__, name);
	80	return ret;
	81	}
	82	ret = regulator_set_value(dev, uv);
	83	if (ret) {
	84	debug("%s: Cannot set regulator %s\n", __func__, name);
	85	return ret;
	86	}
	87
	88	return 0;
	89	}
	90
	91	int exynos_power_init(void)
	92	{
	93	struct udevice *dev;
	94	int ret;
	95
	96	ret = pmic_get("max77686", &dev);
	97	if (!ret) {
	98	/* TODO(sjg@chromium.org): Move into the clock/pmic API */
	99	ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
	100	MAX77686_32KHCP_EN);
	101	if (ret)
	102	return ret;
	103	ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
	104	MAX77686_BBCHOSTEN \| MAX77686_BBCVS_3_5V);
	105	if (ret)
	106	return ret;
	107	} else {
	108	ret = pmic_get("s5m8767-pmic", &dev);
	109	/* TODO(sjg@chromium.org): Use driver model to access clock */
	110	#ifdef CONFIG_PMIC_S5M8767
	111	if (!ret)
	112	s5m8767_enable_32khz_cp(dev);
113	#endif
114	}
115	if (ret == -ENODEV)
116	return 0;
117
118	ret = regulators_enable_boot_on(false);
119	if (ret)
120	return ret;
121
122	ret = exynos_set_regulator("vdd_mif", 1100000);
123	if (ret)
124	return ret;
125
701e740f	126	ret = exynos_set_regulator("vdd_arm", 1300000);
c65dc7d8 SG	127	if (ret)
	128	return ret;
	129	ret = exynos_set_regulator("vdd_int", 1012500);
	130	if (ret)
	131	return ret;
	132	ret = exynos_set_regulator("vdd_g3d", 1200000);
	133	if (ret)
	134	return ret;
	135
	136	return 0;
	137	}
	138
	139	int board_get_revision(void)
	140	{
	141	return 0;
	142	}
	143
c65dc7d8 SG	144	#ifdef CONFIG_USB_DWC3
	145	static struct dwc3_device dwc3_device_data = {
	146	.maximum_speed = USB_SPEED_SUPER,
	147	.base = 0x12400000,
	148	.dr_mode = USB_DR_MODE_PERIPHERAL,
	149	.index = 0,
	150	};
	151
	152	int usb_gadget_handle_interrupts(void)
	153	{
	154	dwc3_uboot_handle_interrupt(0);
	155	return 0;
	156	}
	157
	158	int board_usb_init(int index, enum usb_init_type init)
	159	{
	160	struct exynos_usb3_phy phy = (struct exynos_usb3_phy )
	161	samsung_get_base_usb3_phy();
	162
	163	if (!phy) {
9b643e31	164	pr_err("usb3 phy not supported");
c65dc7d8 SG	165	return -ENODEV;
	166	}
	167
	168	set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
	169	exynos5_usb3_phy_init(phy);
	170
	171	return dwc3_uboot_init(&dwc3_device_data);
	172	}
	173	#endif
	174	#ifdef CONFIG_SET_DFU_ALT_INFO
	175	char get_dfu_alt_system(char interface, char *devstr)
	176	{
1611c8cb PM	177	char *info = "Not supported!";
1611c8cb PM	178
7090ead3	179	if (board_is_odroidxu4() \|\| board_is_odroidhc1())
1611c8cb PM	180	return info;
1611c8cb PM	181
00caae6d	182	return env_get("dfu_alt_system");
c65dc7d8 SG	183	}
	184
	185	char get_dfu_alt_boot(char interface, char *devstr)
	186	{
1611c8cb	187	char *info = "Not supported!";
c65dc7d8 SG	188	struct mmc *mmc;
	189	char *alt_boot;
	190	int dev_num;
	191
7090ead3	192	if (board_is_odroidxu4() \|\| board_is_odroidhc1())
1611c8cb PM	193	return info;
1611c8cb PM	194
c65dc7d8 SG	195	dev_num = simple_strtoul(devstr, NULL, 10);
	196
	197	mmc = find_mmc_device(dev_num);
	198	if (!mmc)
	199	return NULL;
	200
	201	if (mmc_init(mmc))
	202	return NULL;
	203
	204	if (IS_SD(mmc))
	205	alt_boot = CONFIG_DFU_ALT_BOOT_SD;
	206	else
	207	alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
	208
	209	return alt_boot;
	210	}
	211	#endif