[people/ms/u-boot.git] / board / samsung / smdk5250 / lowlevel_init.S

/*
 * Lowlevel setup for SMDK5250 board based on S5PC520
 *
 * Copyright (C) 2012 Samsung Electronics
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <config.h>
#include <version.h>
#include <asm/arch/cpu.h>

_TEXT_BASE:
	.word	CONFIG_SYS_TEXT_BASE

	.globl lowlevel_init
lowlevel_init:

	/* use iRAM stack in bl2 */
	ldr	sp, =CONFIG_IRAM_STACK
	stmdb	r13!, {ip,lr}

	/* check reset status */
	ldr	r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET)
	ldr	r1, [r0]

	/* AFTR wakeup reset */
	ldr	r2, =S5P_CHECK_DIDLE
	cmp	r1, r2
	beq	exit_wakeup

	/* LPA wakeup reset */
	ldr	r2, =S5P_CHECK_LPA
	cmp	r1, r2
	beq	exit_wakeup

	/* Sleep wakeup reset */
	ldr	r2, =S5P_CHECK_SLEEP
	cmp	r1, r2
	beq	wakeup_reset

	/*
	 * If U-boot is already running in RAM, no need to relocate U-Boot.
	 * Memory controller must be configured before relocating U-Boot
	 * in ram.
	 */
	ldr	r0, =0x0ffffff		/* r0 <- Mask Bits*/
	bic	r1, pc, r0		/* pc <- current addr of code */
					/* r1 <- unmasked bits of pc */
	ldr	r2, _TEXT_BASE		/* r2 <- original base addr in ram */
	bic	r2, r2, r0		/* r2 <- unmasked bits of r2*/
	cmp	r1, r2			/* compare r1, r2 */
	beq	1f			/* r0 == r1 then skip sdram init */

	/* init system clock */
	bl	system_clock_init

	/* Memory initialize */
	bl	mem_ctrl_init

1:
	bl	arch_cpu_init
	bl	tzpc_init
	ldmia	r13!, {ip,pc}

wakeup_reset:
	bl	system_clock_init
	bl	mem_ctrl_init
	bl	arch_cpu_init
	bl	tzpc_init

exit_wakeup:
	/* Load return address and jump to kernel */
	ldr	r0, =(EXYNOS5_POWER_BASE + INFORM0_OFFSET)

	/* r1 = physical address of exynos5_cpu_resume function*/
	ldr	r1, [r0]

	/* Jump to kernel */
	mov	pc, r1
	nop
	nop
Commit	Line	Data
0aee53ba CK	1	/*
	2	* Lowlevel setup for SMDK5250 board based on S5PC520
	3	*
	4	* Copyright (C) 2012 Samsung Electronics
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
0aee53ba CK	7	*/
	8
	9	#include <config.h>
	10	#include <version.h>
	11	#include <asm/arch/cpu.h>
	12
	13	_TEXT_BASE:
	14	.word CONFIG_SYS_TEXT_BASE
	15
	16	.globl lowlevel_init
	17	lowlevel_init:
	18
	19	/* use iRAM stack in bl2 */
	20	ldr sp, =CONFIG_IRAM_STACK
	21	stmdb r13!, {ip,lr}
	22
	23	/* check reset status */
	24	ldr r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET)
	25	ldr r1, [r0]
	26
	27	/* AFTR wakeup reset */
	28	ldr r2, =S5P_CHECK_DIDLE
	29	cmp r1, r2
	30	beq exit_wakeup
	31
	32	/* LPA wakeup reset */
	33	ldr r2, =S5P_CHECK_LPA
	34	cmp r1, r2
	35	beq exit_wakeup
	36
	37	/* Sleep wakeup reset */
	38	ldr r2, =S5P_CHECK_SLEEP
	39	cmp r1, r2
	40	beq wakeup_reset
	41
	42	/*
	43	* If U-boot is already running in RAM, no need to relocate U-Boot.
	44	* Memory controller must be configured before relocating U-Boot
	45	* in ram.
	46	*/
	47	ldr r0, =0x0ffffff /* r0 <- Mask Bits*/
	48	bic r1, pc, r0 /* pc <- current addr of code */
	49	/* r1 <- unmasked bits of pc */
	50	ldr r2, _TEXT_BASE /* r2 <- original base addr in ram */
	51	bic r2, r2, r0 /* r2 <- unmasked bits of r2*/
	52	cmp r1, r2 /* compare r1, r2 */
	53	beq 1f /* r0 == r1 then skip sdram init */
	54
	55	/* init system clock */
	56	bl system_clock_init
	57
	58	/* Memory initialize */
	59	bl mem_ctrl_init
	60
	61	1:
b5f9756f	62	bl arch_cpu_init
0aee53ba CK	63	bl tzpc_init
	64	ldmia r13!, {ip,pc}
	65
	66	wakeup_reset:
	67	bl system_clock_init
	68	bl mem_ctrl_init
b5f9756f	69	bl arch_cpu_init
0aee53ba CK	70	bl tzpc_init
	71
	72	exit_wakeup:
	73	/* Load return address and jump to kernel */
	74	ldr r0, =(EXYNOS5_POWER_BASE + INFORM0_OFFSET)
	75
	76	/* r1 = physical address of exynos5_cpu_resume function*/
	77	ldr r1, [r0]
	78
	79	/* Jump to kernel */
	80	mov pc, r1
	81	nop
	82	nop