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Commit | Line | Data |
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c609719b WD |
1 | /* |
2 | * (C) Copyright 2000 | |
3 | * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
c609719b WD |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <mpc824x.h> | |
10 | #include <pci.h> | |
19403633 | 11 | #include <netdev.h> |
c609719b WD |
12 | |
13 | int checkboard (void) | |
14 | { | |
15 | /*TODO: Check processor type */ | |
16 | ||
17 | puts ( "Board: Sandpoint " | |
18 | #ifdef CONFIG_MPC8240 | |
19 | "8240" | |
20 | #endif | |
21 | #ifdef CONFIG_MPC8245 | |
22 | "8245" | |
23 | #endif | |
24 | " Unity ##Test not implemented yet##\n"); | |
25 | return 0; | |
26 | } | |
27 | ||
53677ef1 | 28 | #if 0 /* NOT USED */ |
c609719b WD |
29 | int checkflash (void) |
30 | { | |
31 | /* TODO: XXX XXX XXX */ | |
32 | printf ("## Test not implemented yet ##\n"); | |
33 | ||
34 | return (0); | |
35 | } | |
36 | #endif | |
37 | ||
9973e3c6 | 38 | phys_size_t initdram (int board_type) |
c609719b | 39 | { |
c83bf6a2 WD |
40 | long size; |
41 | long new_bank0_end; | |
42 | long mear1; | |
43 | long emear1; | |
c609719b | 44 | |
6d0f6bcf | 45 | size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE); |
c609719b | 46 | |
c83bf6a2 WD |
47 | new_bank0_end = size - 1; |
48 | mear1 = mpc824x_mpc107_getreg(MEAR1); | |
49 | emear1 = mpc824x_mpc107_getreg(EMEAR1); | |
50 | mear1 = (mear1 & 0xFFFFFF00) | | |
51 | ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT); | |
52 | emear1 = (emear1 & 0xFFFFFF00) | | |
53 | ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT); | |
54 | mpc824x_mpc107_setreg(MEAR1, mear1); | |
55 | mpc824x_mpc107_setreg(EMEAR1, emear1); | |
c609719b | 56 | |
c83bf6a2 | 57 | return (size); |
c609719b WD |
58 | } |
59 | ||
60 | /* | |
61 | * Initialize PCI Devices, report devices found. | |
62 | */ | |
63 | #ifndef CONFIG_PCI_PNP | |
64 | static struct pci_config_table pci_sandpoint_config_table[] = { | |
65 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID, | |
66 | pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, | |
67 | PCI_ENET0_MEMADDR, | |
68 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, | |
69 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID, | |
70 | pci_cfgfunc_config_device, { PCI_ENET1_IOADDR, | |
71 | PCI_ENET1_MEMADDR, | |
72 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, | |
73 | { } | |
74 | }; | |
75 | #endif | |
76 | ||
77 | struct pci_controller hose = { | |
78 | #ifndef CONFIG_PCI_PNP | |
79 | config_table: pci_sandpoint_config_table, | |
80 | #endif | |
81 | }; | |
82 | ||
ad10dd9a | 83 | void pci_init_board(void) |
c609719b WD |
84 | { |
85 | pci_mpc824x_init(&hose); | |
86 | } | |
19403633 BW |
87 | |
88 | int board_eth_init(bd_t *bis) | |
89 | { | |
90 | return pci_eth_init(bis); | |
91 | } |