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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / sbc405 / strataflash.c
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652a10c0
WD		 1/*
2 * (C) Copyright 2002
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/processor.h>
26
27#undef DEBUG_FLASH
28/*
29 * This file implements a Common Flash Interface (CFI) driver for ppcboot.
30 * The width of the port and the width of the chips are determined at initialization.
31 * These widths are used to calculate the address for access CFI data structures.
32 * It has been tested on an Intel Strataflash implementation.
33 *
34 * References
35 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
36 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
37 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
38 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
39 *
40 * TODO
41 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
42 * Add support for other command sets Use the PRI and ALT to determine command set
43 * Verify erase and program timeouts.
44 */
45
46#define FLASH_CMD_CFI 0x98
47#define FLASH_CMD_READ_ID 0x90
48#define FLASH_CMD_RESET 0xff
49#define FLASH_CMD_BLOCK_ERASE 0x20
50#define FLASH_CMD_ERASE_CONFIRM 0xD0
51#define FLASH_CMD_WRITE 0x40
52#define FLASH_CMD_PROTECT 0x60
53#define FLASH_CMD_PROTECT_SET 0x01
54#define FLASH_CMD_PROTECT_CLEAR 0xD0
55#define FLASH_CMD_CLEAR_STATUS 0x50
56#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
57#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
58
59#define FLASH_STATUS_DONE 0x80
60#define FLASH_STATUS_ESS 0x40
61#define FLASH_STATUS_ECLBS 0x20
62#define FLASH_STATUS_PSLBS 0x10
63#define FLASH_STATUS_VPENS 0x08
64#define FLASH_STATUS_PSS 0x04
65#define FLASH_STATUS_DPS 0x02
66#define FLASH_STATUS_R 0x01
67#define FLASH_STATUS_PROTECT 0x01
68
69#define FLASH_OFFSET_CFI 0x55
70#define FLASH_OFFSET_CFI_RESP 0x10
71#define FLASH_OFFSET_WTOUT 0x1F
72#define FLASH_OFFSET_WBTOUT 0x20
73#define FLASH_OFFSET_ETOUT 0x21
74#define FLASH_OFFSET_CETOUT 0x22
75#define FLASH_OFFSET_WMAX_TOUT 0x23
76#define FLASH_OFFSET_WBMAX_TOUT 0x24
77#define FLASH_OFFSET_EMAX_TOUT 0x25
78#define FLASH_OFFSET_CEMAX_TOUT 0x26
79#define FLASH_OFFSET_SIZE 0x27
80#define FLASH_OFFSET_INTERFACE 0x28
81#define FLASH_OFFSET_BUFFER_SIZE 0x2A
82#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
83#define FLASH_OFFSET_ERASE_REGIONS 0x2D
84#define FLASH_OFFSET_PROTECT 0x02
85#define FLASH_OFFSET_USER_PROTECTION 0x85
86#define FLASH_OFFSET_INTEL_PROTECTION 0x81
87
88
89#define FLASH_MAN_CFI 0x01000000
90
91
92typedef union {
93 unsigned char c;
94 unsigned short w;
95 unsigned long l;
96} cfiword_t;
97
98typedef union {
99 unsigned char * cp;
100 unsigned short *wp;
101 unsigned long *lp;
102} cfiptr_t;
103
104#define NUM_ERASE_REGIONS 4
105
6d0f6bcf 106flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
652a10c0
WD		 107
108
109/*-----------------------------------------------------------------------
110 * Functions
111 */
112
113
114static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
115static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
116static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
117static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
118static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
119static int flash_detect_cfi(flash_info_t * info);
120static ulong flash_get_size (ulong base, int banknum);
121static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
122static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
6d0f6bcf 123#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
652a10c0
WD		 124static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
125#endif
126/*-----------------------------------------------------------------------
127 * create an address based on the offset and the port width
128 */
129inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
130{
131 return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
132}
133/*-----------------------------------------------------------------------
134 * read a character at a port width address
135 */
136inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
137{
138 uchar *cp;
139 cp = flash_make_addr(info, 0, offset);
140 return (cp[info->portwidth - 1]);
141}
142
143/*-----------------------------------------------------------------------
144 * read a short word by swapping for ppc format.
145 */
146ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
147{
148 uchar * addr;
149
150 addr = flash_make_addr(info, sect, offset);
151 return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
152
153}
154
155/*-----------------------------------------------------------------------
156 * read a long word by picking the least significant byte of each maiximum
157 * port size word. Swap for ppc format.
158 */
159ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
160{
161 uchar * addr;
162
163 addr = flash_make_addr(info, sect, offset);
164 return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
165 (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
166
167}
168
169/*-----------------------------------------------------------------------
170 */
171unsigned long flash_init (void)
172{
173 unsigned long size;
174 int i;
175 unsigned long address;
176
177
178 /* The flash is positioned back to back, with the demultiplexing of the chip
179 * based on the A24 address line.
180 *
181 */
182
6d0f6bcf 183 address = CONFIG_SYS_FLASH_BASE;
652a10c0
WD		 184 size = 0;
185
186 /* Init: no FLASHes known */
6d0f6bcf 187 for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
652a10c0
WD		 188 flash_info[i].flash_id = FLASH_UNKNOWN;
189 size += flash_info[i].size = flash_get_size(address, i);
6d0f6bcf 190 address += CONFIG_SYS_FLASH_INCREMENT;
652a10c0
WD		 191 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
192 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
193 flash_info[0].size, flash_info[i].size<<20);
194 }
195 }
196
197#if 0 /* test-only */
198 /* Monitor protection ON by default */
6d0f6bcf
JCPV		 199#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
200 for(i=0; flash_info[0].start[i] < CONFIG_SYS_MONITOR_BASE+CONFIG_SYS_MONITOR_LEN-1; i++)
652a10c0
WD		 201 (void)flash_real_protect(&flash_info[0], i, 1);
202#endif
203#else
204 /* monitor protection ON by default */
205 flash_protect (FLAG_PROTECT_SET,
6d0f6bcf 206 - CONFIG_SYS_MONITOR_LEN,
652a10c0
WD		 207 - 1, &flash_info[1]);
208#endif
209
210 return (size);
211}
212
213/*-----------------------------------------------------------------------
214 */
215int flash_erase (flash_info_t *info, int s_first, int s_last)
216{
217 int rcode = 0;
218 int prot;
219 int sect;
220
221 if( info->flash_id != FLASH_MAN_CFI) {
222 printf ("Can't erase unknown flash type - aborted\n");
223 return 1;
224 }
225 if ((s_first < 0) || (s_first > s_last)) {
226 printf ("- no sectors to erase\n");
227 return 1;
228 }
229
230 prot = 0;
231 for (sect=s_first; sect<=s_last; ++sect) {
232 if (info->protect[sect]) {
233 prot++;
234 }
235 }
236 if (prot) {
237 printf ("- Warning: %d protected sectors will not be erased!\n",
238 prot);
239 } else {
240 printf ("\n");
241 }
242
243
244 for (sect = s_first; sect<=s_last; sect++) {
245 if (info->protect[sect] == 0) { /* not protected */
246 flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
247 flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
248 flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
249
250 if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
251 rcode = 1;
252 } else
253 printf(".");
254 }
255 }
256 printf (" done\n");
257 return rcode;
258}
259
260/*-----------------------------------------------------------------------
261 */
262void flash_print_info (flash_info_t *info)
263{
264 int i;
265
266 if (info->flash_id != FLASH_MAN_CFI) {
267 printf ("missing or unknown FLASH type\n");
268 return;
269 }
270
271 printf("CFI conformant FLASH (%d x %d)",
272 (info->portwidth << 3 ), (info->chipwidth << 3 ));
273 printf (" Size: %ld MB in %d Sectors\n",
274 info->size >> 20, info->sector_count);
275 printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
276 info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
277
278 printf (" Sector Start Addresses:");
279 for (i=0; i<info->sector_count; ++i) {
6d0f6bcf 280#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
652a10c0
WD		 281 int k;
282 int size;
283 int erased;
284 volatile unsigned long *flash;
285
286 /*
287 * Check if whole sector is erased
288 */
289 if (i != (info->sector_count-1))
290 size = info->start[i+1] - info->start[i];
291 else
292 size = info->start[0] + info->size - info->start[i];
293 erased = 1;
294 flash = (volatile unsigned long *)info->start[i];
295 size = size >> 2; /* divide by 4 for longword access */
296 for (k=0; k<size; k++)
297 {
298 if (*flash++ != 0xffffffff)
299 {
300 erased = 0;
301 break;
302 }
303 }
304
305 if ((i % 5) == 0)
306 printf ("\n ");
307 /* print empty and read-only info */
308 printf (" %08lX%s%s",
309 info->start[i],
310 erased ? " E" : " ",
311 info->protect[i] ? "RO " : " ");
312#else
313 if ((i % 5) == 0)
314 printf ("\n ");
315 printf (" %08lX%s",
316 info->start[i],
317 info->protect[i] ? " (RO)" : " ");
318#endif
319 }
320 printf ("\n");
321 return;
322}
323
324/*-----------------------------------------------------------------------
325 * Copy memory to flash, returns:
326 * 0 - OK
327 * 1 - write timeout
328 * 2 - Flash not erased
329 */
330int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
331{
332 ulong wp;
333 ulong cp;
334 int aln;
335 cfiword_t cword;
336 int i, rc;
337
338 /* get lower aligned address */
339 wp = (addr & ~(info->portwidth - 1));
340
341 /* handle unaligned start */
342 if((aln = addr - wp) != 0) {
343 cword.l = 0;
344 cp = wp;
345 for(i=0;i<aln; ++i, ++cp)
346 flash_add_byte(info, &cword, (*(uchar *)cp));
347
348 for(; (i< info->portwidth) && (cnt > 0) ; i++) {
349 flash_add_byte(info, &cword, *src++);
350 cnt--;
351 cp++;
352 }
353 for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
354 flash_add_byte(info, &cword, (*(uchar *)cp));
355 if((rc = flash_write_cfiword(info, wp, cword)) != 0)
356 return rc;
357 wp = cp;
358 }
359
6d0f6bcf 360#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
652a10c0
WD		 361 while(cnt >= info->portwidth) {
362 i = info->buffer_size > cnt? cnt: info->buffer_size;
363 if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
364 return rc;
365 wp += i;
366 src += i;
367 cnt -=i;
368 }
369#else
370 /* handle the aligned part */
371 while(cnt >= info->portwidth) {
372 cword.l = 0;
373 for(i = 0; i < info->portwidth; i++) {
374 flash_add_byte(info, &cword, *src++);
375 }
376 if((rc = flash_write_cfiword(info, wp, cword)) != 0)
377 return rc;
378 wp += info->portwidth;
379 cnt -= info->portwidth;
380 }
6d0f6bcf 381#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
652a10c0
WD		 382 if (cnt == 0) {
383 return (0);
384 }
385
386 /*
387 * handle unaligned tail bytes
388 */
389 cword.l = 0;
390 for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
391 flash_add_byte(info, &cword, *src++);
392 --cnt;
393 }
394 for (; i<info->portwidth; ++i, ++cp) {
395 flash_add_byte(info, & cword, (*(uchar *)cp));
396 }
397
398 return flash_write_cfiword(info, wp, cword);
399}
400
401/*-----------------------------------------------------------------------
402 */
403int flash_real_protect(flash_info_t *info, long sector, int prot)
404{
405 int retcode = 0;
406
407 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
408 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
409 if(prot)
410 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
411 else
412 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
413
414 if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
415 prot?"protect":"unprotect")) == 0) {
416
417 info->protect[sector] = prot;
418 /* Intel's unprotect unprotects all locking */
419 if(prot == 0) {
420 int i;
421 for(i = 0 ; i<info->sector_count; i++) {
422 if(info->protect[i])
423 flash_real_protect(info, i, 1);
424 }
425 }
426 }
427
428 return retcode;
429}
430/*-----------------------------------------------------------------------
431 * wait for XSR.7 to be set. Time out with an error if it does not.
432 * This routine does not set the flash to read-array mode.
433 */
434static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
435{
436 ulong start;
437
438 /* Wait for command completion */
439 start = get_timer (0);
440 while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
441 if (get_timer(start) > info->erase_blk_tout) {
442 printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
443 flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
444 return ERR_TIMOUT;
445 }
446 }
447 return ERR_OK;
448}
449/*-----------------------------------------------------------------------
450 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
451 * This routine sets the flash to read-array mode.
452 */
453static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
454{
455 int retcode;
456 retcode = flash_status_check(info, sector, tout, prompt);
457 if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
458 retcode = ERR_INVAL;
459 printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
460 if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
461 printf("Command Sequence Error.\n");
462 } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
463 printf("Block Erase Error.\n");
464 retcode = ERR_NOT_ERASED;
465 } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
466 printf("Locking Error\n");
467 }
468 if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
469 printf("Block locked.\n");
470 retcode = ERR_PROTECTED;
471 }
472 if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
473 printf("Vpp Low Error.\n");
474 }
475 flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
476 return retcode;
477}
478/*-----------------------------------------------------------------------
479 */
480static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
481{
482 switch(info->portwidth) {
483 case FLASH_CFI_8BIT:
484 cword->c = c;
485 break;
486 case FLASH_CFI_16BIT:
487 cword->w = (cword->w << 8) | c;
488 break;
489 case FLASH_CFI_32BIT:
490 cword->l = (cword->l << 8) | c;
491 }
492}
493
494
495/*-----------------------------------------------------------------------
496 * make a proper sized command based on the port and chip widths
497 */
498static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
499{
500 int i;
501 uchar *cp = (uchar *)cmdbuf;
502 for(i=0; i< info->portwidth; i++)
503 *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
504}
505
506/*
507 * Write a proper sized command to the correct address
508 */
509static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
510{
511
512 volatile cfiptr_t addr;
513 cfiword_t cword;
514 addr.cp = flash_make_addr(info, sect, offset);
515 flash_make_cmd(info, cmd, &cword);
516 switch(info->portwidth) {
517 case FLASH_CFI_8BIT:
518 *addr.cp = cword.c;
519 break;
520 case FLASH_CFI_16BIT:
521 *addr.wp = cword.w;
522 break;
523 case FLASH_CFI_32BIT:
524 *addr.lp = cword.l;
525 break;
526 }
527}
528
529/*-----------------------------------------------------------------------
530 */
531static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
532{
533 cfiptr_t cptr;
534 cfiword_t cword;
535 int retval;
536 cptr.cp = flash_make_addr(info, sect, offset);
537 flash_make_cmd(info, cmd, &cword);
538 switch(info->portwidth) {
539 case FLASH_CFI_8BIT:
540 retval = (cptr.cp[0] == cword.c);
541 break;
542 case FLASH_CFI_16BIT:
543 retval = (cptr.wp[0] == cword.w);
544 break;
545 case FLASH_CFI_32BIT:
546 retval = (cptr.lp[0] == cword.l);
547 break;
548 default:
549 retval = 0;
550 break;
551 }
552 return retval;
553}
554/*-----------------------------------------------------------------------
555 */
556static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
557{
558 cfiptr_t cptr;
559 cfiword_t cword;
560 int retval;
561 cptr.cp = flash_make_addr(info, sect, offset);
562 flash_make_cmd(info, cmd, &cword);
563 switch(info->portwidth) {
564 case FLASH_CFI_8BIT:
565 retval = ((cptr.cp[0] & cword.c) == cword.c);
566 break;
567 case FLASH_CFI_16BIT:
568 retval = ((cptr.wp[0] & cword.w) == cword.w);
569 break;
570 case FLASH_CFI_32BIT:
571 retval = ((cptr.lp[0] & cword.l) == cword.l);
572 break;
573 default:
574 retval = 0;
575 break;
576 }
577 return retval;
578}
579
580/*-----------------------------------------------------------------------
581 * detect if flash is compatible with the Common Flash Interface (CFI)
582 * http://www.jedec.org/download/search/jesd68.pdf
583 *
584*/
585static int flash_detect_cfi(flash_info_t * info)
586{
587
588 for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
589 info->portwidth <<= 1) {
590 for(info->chipwidth =FLASH_CFI_BY8;
591 info->chipwidth <= info->portwidth;
592 info->chipwidth <<= 1) {
593 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
594 flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
595 if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
596 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
597 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
598 return 1;
599 }
600 }
601 return 0;
602}
603/*
604 * The following code cannot be run from FLASH!
605 *
606 */
607static ulong flash_get_size (ulong base, int banknum)
608{
609 flash_info_t * info = &flash_info[banknum];
610 int i, j;
611 int sect_cnt;
612 unsigned long sector;
613 unsigned long tmp;
614 int size_ratio;
615 uchar num_erase_regions;
616 int erase_region_size;
617 int erase_region_count;
618
619 info->start[0] = base;
620
621 if(flash_detect_cfi(info)){
622#ifdef DEBUG_FLASH
623 printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
624#endif
625 size_ratio = info->portwidth / info->chipwidth;
626 num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
627#ifdef DEBUG_FLASH
628 printf("found %d erase regions\n", num_erase_regions);
629#endif
630 sect_cnt = 0;
631 sector = base;
632 for(i = 0 ; i < num_erase_regions; i++) {
633 if(i > NUM_ERASE_REGIONS) {
634 printf("%d erase regions found, only %d used\n",
635 num_erase_regions, NUM_ERASE_REGIONS);
636 break;
637 }
638 tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
639 erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
640 tmp >>= 16;
641 erase_region_count = (tmp & 0xffff) +1;
642 for(j = 0; j< erase_region_count; j++) {
643 info->start[sect_cnt] = sector;
644 sector += (erase_region_size * size_ratio);
645 info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
646 sect_cnt++;
647 }
648 }
649
650 info->sector_count = sect_cnt;
651 /* multiply the size by the number of chips */
652 info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
653 info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
654 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
655 info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
656 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
657 info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
658 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
659 info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
660 info->flash_id = FLASH_MAN_CFI;
661 }
662
663 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
664 return(info->size);
665}
666
667
668/*-----------------------------------------------------------------------
669 */
670static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
671{
672
673 cfiptr_t ctladdr;
674 cfiptr_t cptr;
675 int flag;
676
677 ctladdr.cp = flash_make_addr(info, 0, 0);
678 cptr.cp = (uchar *)dest;
679
680
681 /* Check if Flash is (sufficiently) erased */
682 switch(info->portwidth) {
683 case FLASH_CFI_8BIT:
684 flag = ((cptr.cp[0] & cword.c) == cword.c);
685 break;
686 case FLASH_CFI_16BIT:
687 flag = ((cptr.wp[0] & cword.w) == cword.w);
688 break;
689 case FLASH_CFI_32BIT:
690 flag = ((cptr.lp[0] & cword.l) == cword.l);
691 break;
692 default:
693 return 2;
694 }
695 if(!flag)
696 return 2;
697
698 /* Disable interrupts which might cause a timeout here */
699 flag = disable_interrupts();
700
701 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
702 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
703
704 switch(info->portwidth) {
705 case FLASH_CFI_8BIT:
706 cptr.cp[0] = cword.c;
707 break;
708 case FLASH_CFI_16BIT:
709 cptr.wp[0] = cword.w;
710 break;
711 case FLASH_CFI_32BIT:
712 cptr.lp[0] = cword.l;
713 break;
714 }
715
716 /* re-enable interrupts if necessary */
717 if(flag)
718 enable_interrupts();
719
720 return flash_full_status_check(info, 0, info->write_tout, "write");
721}
722
6d0f6bcf 723#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
652a10c0
WD		 724
725/* loop through the sectors from the highest address
726 * when the passed address is greater or equal to the sector address
727 * we have a match
728 */
729static int find_sector(flash_info_t *info, ulong addr)
730{
731 int sector;
732 for(sector = info->sector_count - 1; sector >= 0; sector--) {
733 if(addr >= info->start[sector])
734 break;
735 }
736 return sector;
737}
738
739static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
740{
741
742 int sector;
743 int cnt;
744 int retcode;
745 volatile cfiptr_t src;
746 volatile cfiptr_t dst;
747
748 src.cp = cp;
749 dst.cp = (uchar *)dest;
750 sector = find_sector(info, dest);
751 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
752 flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
753 if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
754 "write to buffer")) == ERR_OK) {
755 switch(info->portwidth) {
756 case FLASH_CFI_8BIT:
757 cnt = len;
758 break;
759 case FLASH_CFI_16BIT:
760 cnt = len >> 1;
761 break;
762 case FLASH_CFI_32BIT:
763 cnt = len >> 2;
764 break;
765 default:
766 return ERR_INVAL;
767 break;
768 }
769 flash_write_cmd(info, sector, 0, (uchar)cnt-1);
770 while(cnt-- > 0) {
771 switch(info->portwidth) {
772 case FLASH_CFI_8BIT:
773 *dst.cp++ = *src.cp++;
774 break;
775 case FLASH_CFI_16BIT:
776 *dst.wp++ = *src.wp++;
777 break;
778 case FLASH_CFI_32BIT:
779 *dst.lp++ = *src.lp++;
780 break;
781 default:
782 return ERR_INVAL;
783 break;
784 }
785 }
786 flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
787 retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
788 "buffer write");
789 }
790 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
791 return retcode;
792}
6d0f6bcf 793#endif /* CONFIG_SYS_USE_FLASH_BUFFER_WRITE */
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