projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| f11033e7 WD |
1 | /* |
| 2 | * (C) Copyright 2007 | |
| 3 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. | |
| 4 | * | |
| 5 | * See file CREDITS for list of people who contributed to this | |
| 6 | * project. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License as | |
| 10 | * published by the Free Software Foundation; either version 2 of | |
| 11 | * the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 21 | * MA 02111-1307 USA | |
| 22 | */ | |
| 23 | ||
| 24 | #include <common.h> | |
| 25 | ||
| ab3abcba | 26 | #if defined(CONFIG_CMD_NAND) |
| f11033e7 WD |
27 | |
| 28 | #include <nand.h> | |
| 29 | #include <asm/processor.h> | |
| 30 | ||
| 31 | #define readb(addr) *(volatile u_char *)(addr) | |
| 32 | #define readl(addr) *(volatile u_long *)(addr) | |
| 33 | #define writeb(d,addr) *(volatile u_char *)(addr) = (d) | |
| 34 | ||
| 35 | #define SC3_NAND_ALE 29 /* GPIO PIN 3 */ | |
| 36 | #define SC3_NAND_CLE 30 /* GPIO PIN 2 */ | |
| 37 | #define SC3_NAND_CE 27 /* GPIO PIN 5 */ | |
| 38 | ||
| 39 | static void *sc3_io_base; | |
| 40 | static void *sc3_control_base = (void *)0xEF600700; | |
| 41 | ||
| cfa460ad | 42 | static void sc3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
| f11033e7 | 43 | { |
| cfa460ad WJ |
44 | struct nand_chip *this = mtd->priv; |
| 45 | if (ctrl & NAND_CTRL_CHANGE) { | |
| 46 | if ( ctrl & NAND_CLE ) | |
| 47 | set_bit (SC3_NAND_CLE, sc3_control_base); | |
| 48 | else | |
| 49 | clear_bit (SC3_NAND_CLE, sc3_control_base); | |
| 50 | if ( ctrl & NAND_ALE ) | |
| 51 | set_bit (SC3_NAND_ALE, sc3_control_base); | |
| 52 | else | |
| 53 | clear_bit (SC3_NAND_ALE, sc3_control_base); | |
| 54 | if ( ctrl & NAND_NCE ) | |
| 55 | set_bit (SC3_NAND_CE, sc3_control_base); | |
| 56 | else | |
| 57 | clear_bit (SC3_NAND_CE, sc3_control_base); | |
| f11033e7 | 58 | } |
| cfa460ad WJ |
59 | |
| 60 | if (cmd != NAND_CMD_NONE) | |
| 61 | writeb(cmd, this->IO_ADDR_W); | |
| f11033e7 WD |
62 | } |
| 63 | ||
| 64 | static int sc3_nand_dev_ready(struct mtd_info *mtd) | |
| 65 | { | |
| 66 | if (!(readl(sc3_control_base + 0x1C) & 0x4000)) | |
| 67 | return 0; | |
| 68 | return 1; | |
| 69 | } | |
| 70 | ||
| 71 | static void sc3_select_chip(struct mtd_info *mtd, int chip) | |
| 72 | { | |
| 73 | clear_bit (SC3_NAND_CE, sc3_control_base); | |
| 74 | } | |
| 75 | ||
| 76 | int board_nand_init(struct nand_chip *nand) | |
| 77 | { | |
| cfa460ad | 78 | nand->ecc.mode = NAND_ECC_SOFT; |
| f11033e7 WD |
79 | |
| 80 | sc3_io_base = (void *) CFG_NAND_BASE; | |
| 81 | /* Set address of NAND IO lines (Using Linear Data Access Region) */ | |
| 82 | nand->IO_ADDR_R = (void __iomem *) sc3_io_base; | |
| 83 | nand->IO_ADDR_W = (void __iomem *) sc3_io_base; | |
| 84 | /* Reference hardware control function */ | |
| cfa460ad | 85 | nand->cmd_ctrl = sc3_nand_hwcontrol; |
| f11033e7 WD |
86 | nand->dev_ready = sc3_nand_dev_ready; |
| 87 | nand->select_chip = sc3_select_chip; | |
| 88 | return 0; | |
| 89 | } | |
| 90 | #endif |