[people/ms/u-boot.git] / board / schulercontrol / sc_sps_1 / spl_boot.c

/*
 * SchulerControl GmbH, SC_SPS_1 module setup
 *
 * Copyright (C) 2012 Marek Vasut <marex@denx.de>
 * on behalf of DENX Software Engineering GmbH
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/iomux-mx28.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>

#define	MUX_CONFIG_LED	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
#define	MUX_CONFIG_SSP0	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
#define	MUX_CONFIG_SSP2	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
#define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
#define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)

const iomux_cfg_t iomux_setup[] = {
	/* -- Strick 3 -- */

	/* FEC Ethernet */
	MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,

	MX28_PAD_ENET0_TX_CLK__GPIO_4_5,	/* ENET INT */

	MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
	MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
	MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,

	/* -- Strick 4 -- */

	/* EMI */
	MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
	MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
	MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
	MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
	MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,

	MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,

	MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
	MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,

	MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
	MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,

	MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
	MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,

	/* -- Strick 5 -- */

	/* MMC0 */
	MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
	MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
	MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
	MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
	MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
	MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
		(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
	MX28_PAD_SSP0_SCK__SSP0_SCK |
		(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),

	/* SPI2 (for flash) */
	MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
	MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
	MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
	MX28_PAD_SSP2_SS0__SSP2_D3 |
		(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),

	/* -- Strick 6 -- */

	/* I2C */
	MX28_PAD_I2C0_SCL__I2C0_SCL,
	MX28_PAD_I2C0_SDA__I2C0_SDA,

	/* AUART0 */
	MX28_PAD_AUART0_TX__AUART0_TX,
	MX28_PAD_AUART0_RX__AUART0_RX,

	/* MEGA interface */

	/* Debug UART */
	MX28_PAD_PWM0__DUART_RX,
	MX28_PAD_PWM1__DUART_TX,

	/* LED */
	MX28_PAD_GPMI_D00__GPIO_0_0 | MUX_CONFIG_LED,
	MX28_PAD_GPMI_D03__GPIO_0_3 | MUX_CONFIG_LED,
	MX28_PAD_GPMI_D06__GPIO_0_6 | MUX_CONFIG_LED,
};

void board_init_ll(void)
{
	mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
}

void mxs_adjust_memory_params(uint32_t *dram_vals)
{
	dram_vals[0x74 >> 2] = 0x0f02010a;
}
Commit	Line	Data
4e3349b6 MV	1	/*
	2	* SchulerControl GmbH, SC_SPS_1 module setup
	3	*
	4	* Copyright (C) 2012 Marek Vasut <marex@denx.de>
	5	* on behalf of DENX Software Engineering GmbH
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
4e3349b6 MV	8	*/
	9
	10	#include <common.h>
	11	#include <config.h>
	12	#include <asm/io.h>
	13	#include <asm/arch/iomux-mx28.h>
	14	#include <asm/arch/imx-regs.h>
	15	#include <asm/arch/sys_proto.h>
	16
	17	#define MUX_CONFIG_LED (MXS_PAD_3V3 \| MXS_PAD_4MA \| MXS_PAD_NOPULL)
	18	#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 \| MXS_PAD_12MA \| MXS_PAD_PULLUP)
	19	#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 \| MXS_PAD_4MA \| MXS_PAD_PULLUP)
	20	#define MUX_CONFIG_ENET (MXS_PAD_3V3 \| MXS_PAD_12MA \| MXS_PAD_NOPULL)
	21	#define MUX_CONFIG_EMI (MXS_PAD_3V3 \| MXS_PAD_12MA \| MXS_PAD_NOPULL)
	22
	23	const iomux_cfg_t iomux_setup[] = {
	24	/* -- Strick 3 -- */
	25
	26	/* FEC Ethernet */
	27	MX28_PAD_ENET0_MDC__ENET0_MDC \| MUX_CONFIG_ENET,
	28	MX28_PAD_ENET0_MDIO__ENET0_MDIO \| MUX_CONFIG_ENET,
	29	MX28_PAD_ENET0_RX_EN__ENET0_RX_EN \| MUX_CONFIG_ENET,
	30	MX28_PAD_ENET0_RXD0__ENET0_RXD0 \| MUX_CONFIG_ENET,
	31	MX28_PAD_ENET0_RXD1__ENET0_RXD1 \| MUX_CONFIG_ENET,
	32	MX28_PAD_ENET0_TX_EN__ENET0_TX_EN \| MUX_CONFIG_ENET,
	33	MX28_PAD_ENET0_TXD0__ENET0_TXD0 \| MUX_CONFIG_ENET,
	34	MX28_PAD_ENET0_TXD1__ENET0_TXD1 \| MUX_CONFIG_ENET,
	35	MX28_PAD_ENET0_RXD3__ENET1_RXD1 \| MUX_CONFIG_ENET,
	36	MX28_PAD_ENET0_RXD2__ENET1_RXD0 \| MUX_CONFIG_ENET,
	37	MX28_PAD_ENET0_TXD2__ENET1_TXD0 \| MUX_CONFIG_ENET,
	38	MX28_PAD_ENET0_TXD3__ENET1_TXD1 \| MUX_CONFIG_ENET,
	39
	40	MX28_PAD_ENET0_TX_CLK__GPIO_4_5, /* ENET INT */
	41
	42	MX28_PAD_ENET0_COL__ENET1_TX_EN \| MUX_CONFIG_ENET,
	43	MX28_PAD_ENET0_CRS__ENET1_RX_EN \| MUX_CONFIG_ENET,
	44	MX28_PAD_ENET_CLK__CLKCTRL_ENET \| MUX_CONFIG_ENET,
	45
	46	/* -- Strick 4 -- */
	47
	48	/* EMI */
	49	MX28_PAD_EMI_ODT0__EMI_ODT0 \| MUX_CONFIG_EMI,
	50	MX28_PAD_EMI_CASN__EMI_CASN \| MUX_CONFIG_EMI,
	51	MX28_PAD_EMI_RASN__EMI_RASN \| MUX_CONFIG_EMI,
	52	MX28_PAD_EMI_WEN__EMI_WEN \| MUX_CONFIG_EMI,
	53	MX28_PAD_EMI_CE0N__EMI_CE0N \| MUX_CONFIG_EMI,
	54	MX28_PAD_EMI_BA0__EMI_BA0 \| MUX_CONFIG_EMI,
	55	MX28_PAD_EMI_BA1__EMI_BA1 \| MUX_CONFIG_EMI,
	56	MX28_PAD_EMI_BA2__EMI_BA2 \| MUX_CONFIG_EMI,
	57	MX28_PAD_EMI_A00__EMI_ADDR0 \| MUX_CONFIG_EMI,
	58	MX28_PAD_EMI_A01__EMI_ADDR1 \| MUX_CONFIG_EMI,
	59	MX28_PAD_EMI_A02__EMI_ADDR2 \| MUX_CONFIG_EMI,
	60	MX28_PAD_EMI_A03__EMI_ADDR3 \| MUX_CONFIG_EMI,
	61	MX28_PAD_EMI_A04__EMI_ADDR4 \| MUX_CONFIG_EMI,
	62	MX28_PAD_EMI_A05__EMI_ADDR5 \| MUX_CONFIG_EMI,
	63	MX28_PAD_EMI_A06__EMI_ADDR6 \| MUX_CONFIG_EMI,
	64	MX28_PAD_EMI_A07__EMI_ADDR7 \| MUX_CONFIG_EMI,
	65	MX28_PAD_EMI_A08__EMI_ADDR8 \| MUX_CONFIG_EMI,
	66	MX28_PAD_EMI_A09__EMI_ADDR9 \| MUX_CONFIG_EMI,
	67	MX28_PAD_EMI_A10__EMI_ADDR10 \| MUX_CONFIG_EMI,
	68	MX28_PAD_EMI_A11__EMI_ADDR11 \| MUX_CONFIG_EMI,
	69	MX28_PAD_EMI_A12__EMI_ADDR12 \| MUX_CONFIG_EMI,
	70
	71	MX28_PAD_EMI_DQM0__EMI_DQM0 \| MUX_CONFIG_EMI,
72	MX28_PAD_EMI_DQM1__EMI_DQM1 \| MUX_CONFIG_EMI,
73	MX28_PAD_EMI_DQS0__EMI_DQS0 \| MUX_CONFIG_EMI,
74	MX28_PAD_EMI_DQS1__EMI_DQS1 \| MUX_CONFIG_EMI,
75
76	MX28_PAD_EMI_D00__EMI_DATA0 \| MUX_CONFIG_EMI,
77	MX28_PAD_EMI_D01__EMI_DATA1 \| MUX_CONFIG_EMI,
78	MX28_PAD_EMI_D02__EMI_DATA2 \| MUX_CONFIG_EMI,
79	MX28_PAD_EMI_D03__EMI_DATA3 \| MUX_CONFIG_EMI,
80	MX28_PAD_EMI_D04__EMI_DATA4 \| MUX_CONFIG_EMI,
81	MX28_PAD_EMI_D05__EMI_DATA5 \| MUX_CONFIG_EMI,
82	MX28_PAD_EMI_D06__EMI_DATA6 \| MUX_CONFIG_EMI,
83	MX28_PAD_EMI_D07__EMI_DATA7 \| MUX_CONFIG_EMI,
84	MX28_PAD_EMI_D08__EMI_DATA8 \| MUX_CONFIG_EMI,
85	MX28_PAD_EMI_D09__EMI_DATA9 \| MUX_CONFIG_EMI,
86	MX28_PAD_EMI_D10__EMI_DATA10 \| MUX_CONFIG_EMI,
87	MX28_PAD_EMI_D11__EMI_DATA11 \| MUX_CONFIG_EMI,
88	MX28_PAD_EMI_D12__EMI_DATA12 \| MUX_CONFIG_EMI,
89	MX28_PAD_EMI_D13__EMI_DATA13 \| MUX_CONFIG_EMI,
90	MX28_PAD_EMI_D14__EMI_DATA14 \| MUX_CONFIG_EMI,
91	MX28_PAD_EMI_D15__EMI_DATA15 \| MUX_CONFIG_EMI,
92
93	MX28_PAD_EMI_CKE__EMI_CKE \| MUX_CONFIG_EMI,
94	MX28_PAD_EMI_CLK__EMI_CLK \| MUX_CONFIG_EMI,
95
96	MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN \| MUX_CONFIG_EMI,
97	MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK \| MUX_CONFIG_EMI,
98
99	/* -- Strick 5 -- */
100
101	/* MMC0 */
102	MX28_PAD_SSP0_DATA0__SSP0_D0 \| MUX_CONFIG_SSP0,
103	MX28_PAD_SSP0_DATA1__SSP0_D1 \| MUX_CONFIG_SSP0,
104	MX28_PAD_SSP0_DATA2__SSP0_D2 \| MUX_CONFIG_SSP0,
105	MX28_PAD_SSP0_DATA3__SSP0_D3 \| MUX_CONFIG_SSP0,
106	MX28_PAD_SSP0_CMD__SSP0_CMD \| MUX_CONFIG_SSP0,
107	MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT \|
108	(MXS_PAD_3V3 \| MXS_PAD_12MA \| MXS_PAD_NOPULL),
109	MX28_PAD_SSP0_SCK__SSP0_SCK \|
110	(MXS_PAD_3V3 \| MXS_PAD_12MA \| MXS_PAD_NOPULL),
111
112	/* SPI2 (for flash) */
113	MX28_PAD_SSP2_SCK__SSP2_SCK \| MUX_CONFIG_SSP2,
114	MX28_PAD_SSP2_MOSI__SSP2_CMD \| MUX_CONFIG_SSP2,
115	MX28_PAD_SSP2_MISO__SSP2_D0 \| MUX_CONFIG_SSP2,
116	MX28_PAD_SSP2_SS0__SSP2_D3 \|
117	(MXS_PAD_3V3 \| MXS_PAD_8MA \| MXS_PAD_PULLUP),
118
119	/* -- Strick 6 -- */
120
121	/* I2C */
122	MX28_PAD_I2C0_SCL__I2C0_SCL,
123	MX28_PAD_I2C0_SDA__I2C0_SDA,
124
125	/* AUART0 */
126	MX28_PAD_AUART0_TX__AUART0_TX,
127	MX28_PAD_AUART0_RX__AUART0_RX,
128
129	/* MEGA interface */
130
131	/* Debug UART */
132	MX28_PAD_PWM0__DUART_RX,
133	MX28_PAD_PWM1__DUART_TX,
134
135	/* LED */
136	MX28_PAD_GPMI_D00__GPIO_0_0 \| MUX_CONFIG_LED,
137	MX28_PAD_GPMI_D03__GPIO_0_3 \| MUX_CONFIG_LED,
138	MX28_PAD_GPMI_D06__GPIO_0_6 \| MUX_CONFIG_LED,
139	};
140
141	void board_init_ll(void)
142	{
38d4a604	143	mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
4e3349b6 MV	144	}
4e3349b6 MV	145
38d4a604	146	void mxs_adjust_memory_params(uint32_t *dram_vals)
4e3349b6 MV	147	{
	148	dram_vals[0x74 >> 2] = 0x0f02010a;
	149	}