[people/ms/u-boot.git] / board / syteco / zmx25 / zmx25.c

/*
 * (c) 2011 Graf-Syteco, Matthias Weisser
 * <weisserm@arcor.de>
 *
 * Based on tx25.c:
 * (C) Copyright 2009 DENX Software Engineering
 * Author: John Rigby <jrigby@gmail.com>
 *
 * Based on imx27lite.c:
 *   Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
 *   Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
 * And:
 *   RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux-mx25.h>

DECLARE_GLOBAL_DATA_PTR;

int board_init()
{
	static const iomux_v3_cfg_t sdhc1_pads[] = {
		NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
	};

	static const iomux_v3_cfg_t dig_out_pads[] = {
		MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */
		MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */
		NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */
		NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */
	};

	static const iomux_v3_cfg_t led_pads[] = {
		MX25_PAD_CSI_D9__GPIO_4_21,
		MX25_PAD_CSI_D4__GPIO_1_29,
	};

	static const iomux_v3_cfg_t can_pads[] = {
		NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL),
	};

	static const iomux_v3_cfg_t i2c3_pads[] = {
		MX25_PAD_CSPI1_SS1__I2C3_DAT,
		MX25_PAD_GPIO_E__I2C3_CLK,
	};

	icache_enable();

	/* Setup of core voltage selection pin to run at 1.4V */
	imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */
	gpio_direction_output(IMX_GPIO_NR(3, 15), 1);

	/* Setup of SD card pins*/
	imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));

	/* Setup of digital output for USB power and OC */
	imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */
	gpio_direction_output(IMX_GPIO_NR(1, 28), 1);

	imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */
	gpio_direction_input(IMX_GPIO_NR(1, 18));

	/* Setup of digital output control pins */
	imx_iomux_v3_setup_multiple_pads(dig_out_pads,
						ARRAY_SIZE(dig_out_pads));

	/* Switch both output drivers off */
	gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
	gpio_direction_output(IMX_GPIO_NR(1, 6), 0);

	/* Setup of key input pin */
	imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0));
	gpio_direction_input(IMX_GPIO_NR(2, 29));

	/* Setup of status LED outputs */
	imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads));

	/* Switch both LEDs off */
	gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
	gpio_direction_output(IMX_GPIO_NR(1, 29), 0);

	/* Setup of CAN1 and CAN2 signals */
	imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads));

	/* Setup of I2C3 signals */
	imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));

	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;

	return 0;
}

int board_late_init(void)
{
	const char *e;

#ifdef CONFIG_FEC_MXC
/*
 * FIXME: need to revisit this
 * The original code enabled PUE and 100-k pull-down without PKE, so the right
 * value here is likely:
 *	0 for no pull
 * or:
 *	PAD_CTL_PUS_100K_DOWN for 100-k pull-down
 */
#define FEC_OUT_PAD_CTRL	0

	static const iomux_v3_cfg_t fec_pads[] = {
		MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
		MX25_PAD_FEC_RX_DV__FEC_RX_DV,
		MX25_PAD_FEC_RDATA0__FEC_RDATA0,
		NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
		NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
		MX25_PAD_FEC_MDIO__FEC_MDIO,
		MX25_PAD_FEC_RDATA1__FEC_RDATA1,
		NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),

		MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */
		MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */
	};

	imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));

	/* assert PHY reset (low) */
	gpio_direction_output(IMX_GPIO_NR(3, 16), 0);

	udelay(5000);

	/* deassert PHY reset */
	gpio_set_value(IMX_GPIO_NR(3, 16), 1);

	udelay(5000);
#endif

	e = env_get("gs_base_board");
	if (e != NULL) {
		if (strcmp(e, "G283") == 0) {
			int key = gpio_get_value(IMX_GPIO_NR(2, 29));

			if (key) {
				/* Switch on both LEDs to inidcate boot mode */
				gpio_set_value(IMX_GPIO_NR(1, 29), 0);
				gpio_set_value(IMX_GPIO_NR(4, 21), 0);

				env_set("preboot", "run gs_slow_boot");
			} else
				env_set("preboot", "run gs_fast_boot");
		}
	}

	return 0;
}

int dram_init(void)
{
	/* dram_init must store complete ramsize in gd->ram_size */
	gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
				PHYS_SDRAM_SIZE);
	return 0;
}
Commit	Line	Data
39f0023e MW	1	/*
	2	* (c) 2011 Graf-Syteco, Matthias Weisser
	3	* <weisserm@arcor.de>
	4	*
	5	* Based on tx25.c:
	6	* (C) Copyright 2009 DENX Software Engineering
	7	* Author: John Rigby <jrigby@gmail.com>
	8	*
	9	* Based on imx27lite.c:
	10	* Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
	11	* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
	12	* And:
	13	* RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
	14	*
1a459660	15	* SPDX-License-Identifier: GPL-2.0+
39f0023e MW	16	*/
39f0023e MW	17	#include <common.h>
7caa655f	18	#include <asm/gpio.h>
39f0023e MW	19	#include <asm/io.h>
39f0023e MW	20	#include <asm/arch/imx-regs.h>
b597ff6b	21	#include <asm/arch/iomux-mx25.h>
39f0023e MW	22
	23	DECLARE_GLOBAL_DATA_PTR;
	24
	25	int board_init()
	26	{
b597ff6b BT	27	static const iomux_v3_cfg_t sdhc1_pads[] = {
	28	NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
	29	NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
	30	NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
	31	NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
	32	NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
	33	NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
	34	};
	35
	36	static const iomux_v3_cfg_t dig_out_pads[] = {
	37	MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */
	38	MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */
	39	NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */
	40	NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */
	41	};
	42
	43	static const iomux_v3_cfg_t led_pads[] = {
	44	MX25_PAD_CSI_D9__GPIO_4_21,
	45	MX25_PAD_CSI_D4__GPIO_1_29,
	46	};
	47
	48	static const iomux_v3_cfg_t can_pads[] = {
	49	NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL),
	50	NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL),
	51	NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL),
	52	NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL),
	53	};
	54
	55	static const iomux_v3_cfg_t i2c3_pads[] = {
	56	MX25_PAD_CSPI1_SS1__I2C3_DAT,
	57	MX25_PAD_GPIO_E__I2C3_CLK,
	58	};
39f0023e MW	59
	60	icache_enable();
	61
b597ff6b BT	62	/* Setup of core voltage selection pin to run at 1.4V */
b597ff6b BT	63	imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */
5fecb36c	64	gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
39f0023e	65
b597ff6b BT	66	/* Setup of SD card pins*/
b597ff6b BT	67	imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
39f0023e MW	68
39f0023e MW	69	/* Setup of digital output for USB power and OC */
b597ff6b	70	imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */
5fecb36c	71	gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
39f0023e	72
b597ff6b	73	imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */
5fecb36c	74	gpio_direction_input(IMX_GPIO_NR(1, 18));
39f0023e MW	75
39f0023e MW	76	/* Setup of digital output control pins */
b597ff6b BT	77	imx_iomux_v3_setup_multiple_pads(dig_out_pads,
b597ff6b BT	78	ARRAY_SIZE(dig_out_pads));
39f0023e MW	79
39f0023e MW	80	/* Switch both output drivers off */
5fecb36c SB	81	gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
5fecb36c SB	82	gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
39f0023e	83
b597ff6b BT	84	/* Setup of key input pin */
b597ff6b BT	85	imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0));
5fecb36c	86	gpio_direction_input(IMX_GPIO_NR(2, 29));
39f0023e MW	87
39f0023e MW	88	/* Setup of status LED outputs */
b597ff6b	89	imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads));
39f0023e MW	90
39f0023e MW	91	/* Switch both LEDs off */
5fecb36c SB	92	gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
5fecb36c SB	93	gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
39f0023e MW	94
39f0023e MW	95	/* Setup of CAN1 and CAN2 signals */
b597ff6b	96	imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads));
39f0023e MW	97
39f0023e MW	98	/* Setup of I2C3 signals */
b597ff6b	99	imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
39f0023e	100
39f0023e MW	101	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
	102
	103	return 0;
	104	}
	105
	106	int board_late_init(void)
	107	{
	108	const char *e;
	109
	110	#ifdef CONFIG_FEC_MXC
b597ff6b BT	111	/*
	112	* FIXME: need to revisit this
	113	* The original code enabled PUE and 100-k pull-down without PKE, so the right
	114	* value here is likely:
	115	* 0 for no pull
	116	* or:
	117	* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
	118	*/
	119	#define FEC_OUT_PAD_CTRL 0
	120
	121	static const iomux_v3_cfg_t fec_pads[] = {
	122	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
	123	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
	124	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
	125	NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
	126	NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
	127	NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
	128	MX25_PAD_FEC_MDIO__FEC_MDIO,
	129	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
	130	NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
	131
	132	MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */
	133	MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */
	134	};
	135
	136	imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
39f0023e MW	137
39f0023e MW	138	/* assert PHY reset (low) */
5fecb36c	139	gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
39f0023e MW	140
	141	udelay(5000);
	142
	143	/* deassert PHY reset */
5fecb36c	144	gpio_set_value(IMX_GPIO_NR(3, 16), 1);
39f0023e MW	145
	146	udelay(5000);
	147	#endif
	148
00caae6d	149	e = env_get("gs_base_board");
39f0023e MW	150	if (e != NULL) {
39f0023e MW	151	if (strcmp(e, "G283") == 0) {
5fecb36c	152	int key = gpio_get_value(IMX_GPIO_NR(2, 29));
39f0023e MW	153
	154	if (key) {
	155	/* Switch on both LEDs to inidcate boot mode */
5fecb36c SB	156	gpio_set_value(IMX_GPIO_NR(1, 29), 0);
5fecb36c SB	157	gpio_set_value(IMX_GPIO_NR(4, 21), 0);
39f0023e	158
382bee57	159	env_set("preboot", "run gs_slow_boot");
39f0023e	160	} else
382bee57	161	env_set("preboot", "run gs_fast_boot");
39f0023e MW	162	}
	163	}
	164
	165	return 0;
	166	}
	167
	168	int dram_init(void)
	169	{
	170	/* dram_init must store complete ramsize in gd->ram_size */
	171	gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
	172	PHYS_SDRAM_SIZE);
	173	return 0;
	174	}