]>
Commit | Line | Data |
---|---|---|
92e30c07 SB |
1 | /* |
2 | * Copyright (C) 2011 | |
3 | * Stefano Babic, DENX Software Engineering, sbabic@denx.de. | |
4 | * | |
5 | * Copyright (C) 2009 TechNexion Ltd. | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
92e30c07 SB |
8 | */ |
9 | ||
10 | #include <common.h> | |
11 | #include <netdev.h> | |
12 | #include <asm/io.h> | |
13 | #include <asm/arch/mem.h> | |
14 | #include <asm/arch/mux.h> | |
15 | #include <asm/arch/sys_proto.h> | |
16 | #include <asm/omap_gpio.h> | |
17 | #include <asm/arch/mmc_host_def.h> | |
18 | #include <i2c.h> | |
522a4aef JH |
19 | #include <spl.h> |
20 | #include <mmc.h> | |
92e30c07 | 21 | #include <asm/gpio.h> |
8c589d6f SB |
22 | #ifdef CONFIG_USB_EHCI |
23 | #include <usb.h> | |
24 | #include <asm/ehci-omap.h> | |
25 | #endif | |
92e30c07 SB |
26 | #include "twister.h" |
27 | ||
28 | DECLARE_GLOBAL_DATA_PTR; | |
29 | ||
30 | /* Timing definitions for Ethernet Controller */ | |
31 | static const u32 gpmc_smc911[] = { | |
32 | NET_GPMC_CONFIG1, | |
33 | NET_GPMC_CONFIG2, | |
34 | NET_GPMC_CONFIG3, | |
35 | NET_GPMC_CONFIG4, | |
36 | NET_GPMC_CONFIG5, | |
37 | NET_GPMC_CONFIG6, | |
38 | }; | |
39 | ||
40 | static const u32 gpmc_XR16L2751[] = { | |
41 | XR16L2751_GPMC_CONFIG1, | |
42 | XR16L2751_GPMC_CONFIG2, | |
43 | XR16L2751_GPMC_CONFIG3, | |
44 | XR16L2751_GPMC_CONFIG4, | |
45 | XR16L2751_GPMC_CONFIG5, | |
46 | XR16L2751_GPMC_CONFIG6, | |
47 | }; | |
48 | ||
8c589d6f SB |
49 | #ifdef CONFIG_USB_EHCI |
50 | static struct omap_usbhs_board_data usbhs_bdata = { | |
51 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, | |
52 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
53 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
54 | }; | |
55 | ||
127efc4f TK |
56 | int ehci_hcd_init(int index, enum usb_init_type init, |
57 | struct ehci_hccr **hccr, struct ehci_hcor **hcor) | |
8c589d6f | 58 | { |
16297cfb | 59 | return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); |
8c589d6f SB |
60 | } |
61 | ||
676ae068 | 62 | int ehci_hcd_stop(int index) |
8c589d6f SB |
63 | { |
64 | return omap_ehci_hcd_stop(); | |
65 | } | |
66 | #endif | |
67 | ||
92e30c07 SB |
68 | int board_init(void) |
69 | { | |
70 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ | |
71 | ||
72 | /* boot param addr */ | |
73 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); | |
74 | ||
75 | /* Chip select 1 and 3 are used for XR16L2751 UART controller */ | |
76 | enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1], | |
77 | XR16L2751_UART1_BASE, GPMC_SIZE_16M); | |
78 | ||
79 | enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3], | |
80 | XR16L2751_UART2_BASE, GPMC_SIZE_16M); | |
81 | ||
82 | gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET"); | |
83 | gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1); | |
84 | ||
85 | return 0; | |
86 | } | |
87 | ||
31f5b651 | 88 | #ifndef CONFIG_SPL_BUILD |
92e30c07 SB |
89 | int misc_init_r(void) |
90 | { | |
0b26b875 | 91 | char *eth_addr; |
31f5b651 SB |
92 | struct tam3517_module_info info; |
93 | int ret; | |
0b26b875 | 94 | |
679f82c3 | 95 | omap_die_id_display(); |
92e30c07 | 96 | |
0b26b875 SB |
97 | eth_addr = getenv("ethaddr"); |
98 | if (eth_addr) | |
99 | return 0; | |
100 | ||
31f5b651 SB |
101 | TAM3517_READ_EEPROM(&info, ret); |
102 | if (!ret) | |
103 | TAM3517_READ_MAC_FROM_EEPROM(&info); | |
0b26b875 | 104 | |
92e30c07 SB |
105 | return 0; |
106 | } | |
31f5b651 | 107 | #endif |
92e30c07 SB |
108 | |
109 | /* | |
110 | * Routine: set_muxconf_regs | |
111 | * Description: Setting up the configuration Mux registers specific to the | |
112 | * hardware. Many pins need to be moved from protect to primary | |
113 | * mode. | |
114 | */ | |
115 | void set_muxconf_regs(void) | |
116 | { | |
117 | MUX_TWISTER(); | |
118 | } | |
119 | ||
120 | int board_eth_init(bd_t *bis) | |
121 | { | |
122 | davinci_emac_initialize(); | |
123 | ||
124 | /* init cs for extern lan */ | |
125 | enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], | |
126 | CONFIG_SMC911X_BASE, GPMC_SIZE_16M); | |
127 | if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0) | |
128 | printf("\nError initializing SMC911x controlleri\n"); | |
129 | ||
130 | return 0; | |
131 | } | |
132 | ||
133 | #if defined(CONFIG_OMAP_HSMMC) && \ | |
134 | !defined(CONFIG_SPL_BUILD) | |
135 | int board_mmc_init(bd_t *bis) | |
136 | { | |
e3913f56 | 137 | return omap_mmc_init(0, 0, 0, -1, -1); |
92e30c07 SB |
138 | } |
139 | #endif | |
84c21fb1 SB |
140 | |
141 | #ifdef CONFIG_SPL_OS_BOOT | |
142 | /* | |
143 | * Do board specific preperation before SPL | |
144 | * Linux boot | |
145 | */ | |
146 | void spl_board_prepare_for_linux(void) | |
147 | { | |
148 | /* init cs for extern lan */ | |
149 | enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], | |
150 | CONFIG_SMC911X_BASE, GPMC_SIZE_16M); | |
151 | } | |
152 | int spl_start_uboot(void) | |
153 | { | |
154 | int val = 0; | |
30372965 SB |
155 | if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) { |
156 | gpio_direction_input(SPL_OS_BOOT_KEY); | |
157 | val = gpio_get_value(SPL_OS_BOOT_KEY); | |
158 | gpio_free(SPL_OS_BOOT_KEY); | |
84c21fb1 SB |
159 | } |
160 | return val; | |
161 | } | |
162 | #endif |