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1 | /* |
2 | * Copyright (C) 2011 | |
3 | * Stefano Babic, DENX Software Engineering, sbabic@denx.de. | |
4 | * | |
5 | * Copyright (C) 2009 TechNexion Ltd. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc. | |
20 | */ | |
21 | ||
22 | #include <common.h> | |
23 | #include <netdev.h> | |
24 | #include <fpga.h> | |
25 | #include <asm/io.h> | |
26 | #include <asm/arch/mem.h> | |
27 | #include <asm/arch/mux.h> | |
28 | #include <asm/arch/sys_proto.h> | |
29 | #include <asm/omap_gpio.h> | |
30 | #include <asm/arch/mmc_host_def.h> | |
31 | #include <i2c.h> | |
32 | #include <spartan3.h> | |
33 | #include <asm/gpio.h> | |
34 | #ifdef CONFIG_USB_EHCI | |
35 | #include <usb.h> | |
36 | #include <asm/ehci-omap.h> | |
37 | #endif | |
38 | #include "mt_ventoux.h" | |
39 | ||
40 | DECLARE_GLOBAL_DATA_PTR; | |
41 | ||
42 | #ifndef CONFIG_FPGA | |
43 | #error "The Teejet mt_ventoux must have CONFIG_FPGA enabled" | |
44 | #endif | |
45 | ||
46 | #define FPGA_RESET 62 | |
47 | #define FPGA_PROG 116 | |
48 | #define FPGA_CCLK 117 | |
49 | #define FPGA_DIN 118 | |
50 | #define FPGA_INIT 119 | |
51 | #define FPGA_DONE 154 | |
52 | ||
53 | /* Timing definitions for FPGA */ | |
54 | static const u32 gpmc_fpga[] = { | |
55 | FPGA_GPMC_CONFIG1, | |
56 | FPGA_GPMC_CONFIG2, | |
57 | FPGA_GPMC_CONFIG3, | |
58 | FPGA_GPMC_CONFIG4, | |
59 | FPGA_GPMC_CONFIG5, | |
60 | FPGA_GPMC_CONFIG6, | |
61 | }; | |
62 | ||
63 | #ifdef CONFIG_USB_EHCI | |
64 | static struct omap_usbhs_board_data usbhs_bdata = { | |
65 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, | |
66 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
67 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
68 | }; | |
69 | ||
70 | int ehci_hcd_init(void) | |
71 | { | |
72 | return omap_ehci_hcd_init(&usbhs_bdata); | |
73 | } | |
74 | ||
75 | int ehci_hcd_stop(void) | |
76 | { | |
77 | return omap_ehci_hcd_stop(); | |
78 | } | |
79 | #endif | |
80 | ||
81 | ||
82 | static inline void fpga_reset(int nassert) | |
83 | { | |
84 | gpio_set_value(FPGA_RESET, !nassert); | |
85 | } | |
86 | ||
87 | int fpga_pgm_fn(int nassert, int nflush, int cookie) | |
88 | { | |
89 | debug("%s:%d: FPGA PROGRAM ", __func__, __LINE__); | |
90 | ||
91 | gpio_set_value(FPGA_PROG, !nassert); | |
92 | ||
93 | return nassert; | |
94 | } | |
95 | ||
96 | int fpga_init_fn(int cookie) | |
97 | { | |
98 | return !gpio_get_value(FPGA_INIT); | |
99 | } | |
100 | ||
101 | int fpga_done_fn(int cookie) | |
102 | { | |
103 | return gpio_get_value(FPGA_DONE); | |
104 | } | |
105 | ||
106 | int fpga_pre_config_fn(int cookie) | |
107 | { | |
108 | debug("%s:%d: FPGA pre-configuration\n", __func__, __LINE__); | |
109 | ||
110 | /* Setting GPIOs for programming Mode */ | |
111 | gpio_request(FPGA_RESET, "FPGA_RESET"); | |
112 | gpio_direction_output(FPGA_RESET, 1); | |
113 | gpio_request(FPGA_PROG, "FPGA_PROG"); | |
114 | gpio_direction_output(FPGA_PROG, 1); | |
115 | gpio_request(FPGA_CCLK, "FPGA_CCLK"); | |
116 | gpio_direction_output(FPGA_CCLK, 1); | |
117 | gpio_request(FPGA_DIN, "FPGA_DIN"); | |
118 | gpio_direction_output(FPGA_DIN, 0); | |
119 | gpio_request(FPGA_INIT, "FPGA_INIT"); | |
120 | gpio_direction_input(FPGA_INIT); | |
121 | gpio_request(FPGA_DONE, "FPGA_DONE"); | |
122 | gpio_direction_input(FPGA_DONE); | |
123 | ||
124 | /* Be sure that signal are deasserted */ | |
125 | gpio_set_value(FPGA_RESET, 1); | |
126 | gpio_set_value(FPGA_PROG, 1); | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
131 | int fpga_post_config_fn(int cookie) | |
132 | { | |
133 | debug("%s:%d: FPGA post-configuration\n", __func__, __LINE__); | |
134 | ||
135 | fpga_reset(TRUE); | |
136 | udelay(100); | |
137 | fpga_reset(FALSE); | |
138 | ||
139 | return 0; | |
140 | } | |
141 | ||
142 | /* Write program to the FPGA */ | |
143 | int fpga_wr_fn(int nassert_write, int flush, int cookie) | |
144 | { | |
145 | gpio_set_value(FPGA_DIN, nassert_write); | |
146 | ||
147 | return nassert_write; | |
148 | } | |
149 | ||
150 | int fpga_clk_fn(int assert_clk, int flush, int cookie) | |
151 | { | |
152 | gpio_set_value(FPGA_CCLK, assert_clk); | |
153 | ||
154 | return assert_clk; | |
155 | } | |
156 | ||
157 | Xilinx_Spartan3_Slave_Serial_fns mt_ventoux_fpga_fns = { | |
158 | fpga_pre_config_fn, | |
159 | fpga_pgm_fn, | |
160 | fpga_clk_fn, | |
161 | fpga_init_fn, | |
162 | fpga_done_fn, | |
163 | fpga_wr_fn, | |
164 | fpga_post_config_fn, | |
165 | }; | |
166 | ||
167 | Xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial, | |
168 | (void *)&mt_ventoux_fpga_fns, 0); | |
169 | ||
170 | /* Initialize the FPGA */ | |
171 | static void mt_ventoux_init_fpga(void) | |
172 | { | |
173 | fpga_pre_config_fn(0); | |
174 | ||
175 | /* Setting CS1 for FPGA access */ | |
176 | enable_gpmc_cs_config(gpmc_fpga, &gpmc_cfg->cs[1], | |
177 | FPGA_BASE_ADDR, GPMC_SIZE_128M); | |
178 | ||
179 | fpga_init(); | |
180 | fpga_add(fpga_xilinx, &fpga); | |
181 | } | |
182 | ||
183 | /* | |
184 | * Routine: board_init | |
185 | * Description: Early hardware init. | |
186 | */ | |
187 | int board_init(void) | |
188 | { | |
189 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ | |
190 | ||
191 | /* boot param addr */ | |
192 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); | |
193 | ||
194 | mt_ventoux_init_fpga(); | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
199 | int misc_init_r(void) | |
200 | { | |
201 | dieid_num_r(); | |
202 | ||
203 | return 0; | |
204 | } | |
205 | ||
206 | /* | |
207 | * Routine: set_muxconf_regs | |
208 | * Description: Setting up the configuration Mux registers specific to the | |
209 | * hardware. Many pins need to be moved from protect to primary | |
210 | * mode. | |
211 | */ | |
212 | void set_muxconf_regs(void) | |
213 | { | |
214 | MUX_MT_VENTOUX(); | |
215 | } | |
216 | ||
217 | /* | |
218 | * Initializes on-chip ethernet controllers. | |
219 | * to override, implement board_eth_init() | |
220 | */ | |
221 | int board_eth_init(bd_t *bis) | |
222 | { | |
223 | davinci_emac_initialize(); | |
224 | return 0; | |
225 | } | |
226 | ||
227 | #if defined(CONFIG_OMAP_HSMMC) && \ | |
228 | !defined(CONFIG_SPL_BUILD) | |
229 | int board_mmc_init(bd_t *bis) | |
230 | { | |
bbbc1ae9 | 231 | return omap_mmc_init(0, 0, 0); |
1fdabedd SB |
232 | } |
233 | #endif |