]>
Commit | Line | Data |
---|---|---|
4ec3a7f0 WD |
1 | /* |
2 | * (C) Copyright 2004 | |
3 | * Vincent Dubey, Xa SA, vincent.dubey@xa-ch.com | |
4 | * | |
5 | * (C) Copyright 2002 | |
6 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net | |
7 | * | |
8 | * (C) Copyright 2002 | |
9 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
10 | * Marius Groeger <mgroeger@sysgo.de> | |
11 | * | |
1a459660 | 12 | * SPDX-License-Identifier: GPL-2.0+ |
4ec3a7f0 WD |
13 | */ |
14 | ||
15 | #include <common.h> | |
7194ab80 | 16 | #include <netdev.h> |
4438a45f | 17 | #include <asm/arch/pxa.h> |
4ec3a7f0 | 18 | |
d87080b7 | 19 | DECLARE_GLOBAL_DATA_PTR; |
4ec3a7f0 WD |
20 | |
21 | /* | |
22 | * Miscelaneous platform dependent initialisations | |
23 | */ | |
24 | ||
25 | int board_init (void) | |
26 | { | |
1123d412 MV |
27 | /* We have RAM, disable cache */ |
28 | dcache_disable(); | |
29 | icache_disable(); | |
4ec3a7f0 WD |
30 | |
31 | /* arch number of xaeniax */ | |
32 | gd->bd->bi_arch_number = 585; | |
33 | ||
34 | /* adress of boot parameters */ | |
35 | gd->bd->bi_boot_params = 0xa0000100; | |
36 | ||
37 | return 0; | |
38 | } | |
39 | ||
40 | int board_late_init(void) | |
41 | { | |
42 | setenv("stdout", "serial"); | |
43 | setenv("stderr", "serial"); | |
44 | return 0; | |
45 | } | |
46 | ||
1123d412 MV |
47 | int dram_init(void) |
48 | { | |
f68d2a22 | 49 | pxa2xx_dram_init(); |
1123d412 MV |
50 | gd->ram_size = PHYS_SDRAM_1_SIZE; |
51 | return 0; | |
52 | } | |
4ec3a7f0 | 53 | |
1123d412 | 54 | void dram_init_banksize(void) |
4ec3a7f0 | 55 | { |
4ec3a7f0 WD |
56 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
57 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
4ec3a7f0 | 58 | } |
7194ab80 BW |
59 | |
60 | #ifdef CONFIG_CMD_NET | |
61 | int board_eth_init(bd_t *bis) | |
62 | { | |
63 | int rc = 0; | |
64 | #ifdef CONFIG_SMC91111 | |
65 | rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); | |
66 | #endif | |
67 | return rc; | |
68 | } | |
69 | #endif |