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Commit | Line | Data |
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5da6f806 PT |
1 | /* |
2 | * Copyright 2009 Extreme Engineering Solutions, Inc. | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
5da6f806 PT |
5 | */ |
6 | ||
7 | #include <common.h> | |
8 | #include <asm/processor.h> | |
5614e71b | 9 | #include <fsl_ddr_sdram.h> |
5da6f806 PT |
10 | #include <asm/mmu.h> |
11 | #include <asm/io.h> | |
12 | #include <fdt_support.h> | |
13 | #include <pca953x.h> | |
92af6549 | 14 | #include "../common/fsl_8xxx_misc.h" |
5da6f806 | 15 | |
088454cd SG |
16 | DECLARE_GLOBAL_DATA_PTR; |
17 | ||
5da6f806 PT |
18 | #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_PCI) |
19 | extern void ft_board_pci_setup(void *blob, bd_t *bd); | |
20 | #endif | |
21 | ||
5da6f806 PT |
22 | /* |
23 | * Print out which flash was booted from and if booting from the 2nd flash, | |
24 | * swap flash chip selects to maintain consistent flash numbering/addresses. | |
25 | */ | |
26 | static void flash_cs_fixup(void) | |
27 | { | |
5da6f806 PT |
28 | int flash_sel; |
29 | ||
30 | /* | |
31 | * Print boot dev and swap flash flash chip selects if booted from 2nd | |
32 | * flash. Swapping chip selects presents user with a common memory | |
33 | * map regardless of which flash was booted from. | |
34 | */ | |
35 | flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & | |
36 | CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS)); | |
eddf52b5 | 37 | printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); |
5da6f806 PT |
38 | |
39 | if (flash_sel) { | |
f51cdaf1 BB |
40 | set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); |
41 | set_lbc_or(0, CONFIG_SYS_OR1_PRELIM); | |
5da6f806 | 42 | |
f51cdaf1 BB |
43 | set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); |
44 | set_lbc_or(1, CONFIG_SYS_OR0_PRELIM); | |
5da6f806 PT |
45 | } |
46 | } | |
47 | ||
48 | int board_early_init_r(void) | |
49 | { | |
50 | /* Initialize PCA9557 devices */ | |
51 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); | |
52 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); | |
53 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR2, 0xff, 0); | |
54 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR3, 0xff, 0); | |
55 | ||
56 | flash_cs_fixup(); | |
57 | ||
58 | return 0; | |
59 | } | |
60 | ||
088454cd | 61 | int initdram(void) |
38dba0c2 BB |
62 | { |
63 | phys_size_t dram_size = fsl_ddr_sdram(); | |
64 | ||
65 | #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) | |
66 | /* Initialize and enable DDR ECC */ | |
67 | ddr_enable_ecc(dram_size); | |
68 | #endif | |
69 | ||
088454cd SG |
70 | gd->ram_size = dram_size; |
71 | ||
72 | return 0; | |
38dba0c2 BB |
73 | } |
74 | ||
5da6f806 | 75 | #if defined(CONFIG_OF_BOARD_SETUP) |
e895a4b0 | 76 | int ft_board_setup(void *blob, bd_t *bd) |
5da6f806 PT |
77 | { |
78 | #ifdef CONFIG_PCI | |
79 | ft_board_pci_setup(blob, bd); | |
80 | #endif | |
81 | ft_cpu_setup(blob, bd); | |
e895a4b0 SG |
82 | |
83 | return 0; | |
5da6f806 PT |
84 | } |
85 | #endif |