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1f4d5326 RR |
1 | /* |
2 | * (C) Copyright 2008 | |
3 | * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es | |
4 | * This work has been supported by: QTechnology http://qtec.com/ | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
1f4d5326 RR |
7 | */ |
8 | ||
9 | #include <config.h> | |
10 | #include <common.h> | |
11 | #include <asm/processor.h> | |
12 | ||
13 | ulong __get_PCI_freq(void) | |
14 | { | |
15 | return 0; | |
16 | } | |
17 | ||
18 | ulong get_PCI_freq(void) __attribute__((weak, alias("__get_PCI_freq"))); | |
19 | ||
20 | int __board_pre_init(void) | |
21 | { | |
22 | return 0; | |
23 | } | |
24 | int board_pre_init(void) __attribute__((weak, alias("__board_pre_init"))); | |
25 | ||
26 | int __checkboard(void) | |
27 | { | |
28 | puts("Xilinx PPC405 Generic Board\n"); | |
29 | return 0; | |
30 | } | |
31 | int checkboard(void) __attribute__((weak, alias("__checkboard"))); | |
32 | ||
33 | phys_size_t __initdram(int board_type) | |
34 | { | |
35 | return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR, | |
36 | CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024); | |
37 | } | |
38 | phys_size_t initdram(int) __attribute__((weak, alias("__initdram"))); | |
39 | ||
40 | void __get_sys_info(sys_info_t *sysInfo) | |
41 | { | |
42 | sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ; | |
43 | sysInfo->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ; | |
44 | sysInfo->freqPCI = 0; | |
45 | ||
46 | return; | |
47 | } | |
48 | void get_sys_info(sys_info_t *) __attribute__((weak, alias("__get_sys_info"))); |