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Commit | Line | Data |
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8bde7f77 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
8bde7f77 WD |
6 | */ |
7 | ||
8 | /* | |
9 | * Boot support | |
10 | */ | |
11 | #include <common.h> | |
12 | #include <command.h> | |
d88af4da | 13 | #include <linux/compiler.h> |
8bde7f77 | 14 | |
d87080b7 | 15 | DECLARE_GLOBAL_DATA_PTR; |
8bde7f77 | 16 | |
d88af4da MF |
17 | __maybe_unused |
18 | static void print_num(const char *name, ulong value) | |
19 | { | |
20 | printf("%-12s= 0x%08lX\n", name, value); | |
21 | } | |
8bde7f77 | 22 | |
5f3dfadc | 23 | __maybe_unused |
d88af4da MF |
24 | static void print_eth(int idx) |
25 | { | |
26 | char name[10], *val; | |
27 | if (idx) | |
28 | sprintf(name, "eth%iaddr", idx); | |
29 | else | |
30 | strcpy(name, "ethaddr"); | |
31 | val = getenv(name); | |
32 | if (!val) | |
33 | val = "(not set)"; | |
34 | printf("%-12s= %s\n", name, val); | |
35 | } | |
de2dff6f | 36 | |
05c3e68f | 37 | #ifndef CONFIG_DM_ETH |
9fc6a06a MS |
38 | __maybe_unused |
39 | static void print_eths(void) | |
40 | { | |
41 | struct eth_device *dev; | |
42 | int i = 0; | |
43 | ||
44 | do { | |
45 | dev = eth_get_dev_by_index(i); | |
46 | if (dev) { | |
47 | printf("eth%dname = %s\n", i, dev->name); | |
48 | print_eth(i); | |
49 | i++; | |
50 | } | |
51 | } while (dev); | |
52 | ||
53 | printf("current eth = %s\n", eth_get_name()); | |
54 | printf("ip_addr = %s\n", getenv("ipaddr")); | |
55 | } | |
05c3e68f | 56 | #endif |
9fc6a06a | 57 | |
d88af4da | 58 | __maybe_unused |
47708457 | 59 | static void print_lnum(const char *name, unsigned long long value) |
d88af4da MF |
60 | { |
61 | printf("%-12s= 0x%.8llX\n", name, value); | |
62 | } | |
63 | ||
64 | __maybe_unused | |
65 | static void print_mhz(const char *name, unsigned long hz) | |
66 | { | |
67 | char buf[32]; | |
68 | ||
69 | printf("%-12s= %6s MHz\n", name, strmhz(buf, hz)); | |
70 | } | |
8bde7f77 | 71 | |
171e5396 MF |
72 | |
73 | static inline void print_bi_boot_params(const bd_t *bd) | |
74 | { | |
75 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
76 | } | |
77 | ||
12feb364 MF |
78 | static inline void print_bi_mem(const bd_t *bd) |
79 | { | |
80 | #if defined(CONFIG_SH) | |
81 | print_num("mem start ", (ulong)bd->bi_memstart); | |
82 | print_lnum("mem size ", (u64)bd->bi_memsize); | |
83 | #elif defined(CONFIG_ARC) | |
84 | print_num("mem start", (ulong)bd->bi_memstart); | |
85 | print_lnum("mem size", (u64)bd->bi_memsize); | |
86 | #elif defined(CONFIG_AVR32) | |
87 | print_num("memstart", (ulong)bd->bi_dram[0].start); | |
88 | print_lnum("memsize", (u64)bd->bi_dram[0].size); | |
89 | #else | |
90 | print_num("memstart", (ulong)bd->bi_memstart); | |
91 | print_lnum("memsize", (u64)bd->bi_memsize); | |
92 | #endif | |
93 | } | |
94 | ||
c99ea790 | 95 | #if defined(CONFIG_PPC) |
e7939464 YS |
96 | void __weak board_detail(void) |
97 | { | |
98 | /* Please define boot_detail() for your platform */ | |
99 | } | |
8bde7f77 | 100 | |
5902e8f7 | 101 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 102 | { |
8bde7f77 | 103 | bd_t *bd = gd->bd; |
8bde7f77 WD |
104 | |
105 | #ifdef DEBUG | |
5902e8f7 ML |
106 | print_num("bd address", (ulong)bd); |
107 | #endif | |
12feb364 | 108 | print_bi_mem(bd); |
5902e8f7 ML |
109 | print_num("flashstart", bd->bi_flashstart); |
110 | print_num("flashsize", bd->bi_flashsize); | |
111 | print_num("flashoffset", bd->bi_flashoffset); | |
112 | print_num("sramstart", bd->bi_sramstart); | |
113 | print_num("sramsize", bd->bi_sramsize); | |
114 | #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ | |
58dac327 | 115 | defined(CONFIG_MPC8260) || defined(CONFIG_E500) |
5902e8f7 ML |
116 | print_num("immr_base", bd->bi_immr_base); |
117 | #endif | |
118 | print_num("bootflags", bd->bi_bootflags); | |
3fb85889 | 119 | #if defined(CONFIG_405EP) || \ |
5902e8f7 ML |
120 | defined(CONFIG_405GP) || \ |
121 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
122 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
123 | defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ | |
124 | defined(CONFIG_XILINX_405) | |
0c277ef9 TT |
125 | print_mhz("procfreq", bd->bi_procfreq); |
126 | print_mhz("plb_busfreq", bd->bi_plb_busfreq); | |
5902e8f7 ML |
127 | #if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \ |
128 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
129 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
130 | defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405) | |
0c277ef9 | 131 | print_mhz("pci_busfreq", bd->bi_pci_busfreq); |
8bde7f77 | 132 | #endif |
3fb85889 | 133 | #else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
9c4c5ae3 | 134 | #if defined(CONFIG_CPM2) |
0c277ef9 TT |
135 | print_mhz("vco", bd->bi_vco); |
136 | print_mhz("sccfreq", bd->bi_sccfreq); | |
137 | print_mhz("brgfreq", bd->bi_brgfreq); | |
8bde7f77 | 138 | #endif |
0c277ef9 | 139 | print_mhz("intfreq", bd->bi_intfreq); |
9c4c5ae3 | 140 | #if defined(CONFIG_CPM2) |
0c277ef9 | 141 | print_mhz("cpmfreq", bd->bi_cpmfreq); |
8bde7f77 | 142 | #endif |
0c277ef9 | 143 | print_mhz("busfreq", bd->bi_busfreq); |
3fb85889 | 144 | #endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
03f5c550 | 145 | |
34e210f5 TT |
146 | #ifdef CONFIG_ENABLE_36BIT_PHYS |
147 | #ifdef CONFIG_PHYS_64BIT | |
148 | puts("addressing = 36-bit\n"); | |
149 | #else | |
150 | puts("addressing = 32-bit\n"); | |
151 | #endif | |
152 | #endif | |
153 | ||
de2dff6f | 154 | print_eth(0); |
e2ffd59b | 155 | #if defined(CONFIG_HAS_ETH1) |
de2dff6f | 156 | print_eth(1); |
03f5c550 | 157 | #endif |
e2ffd59b | 158 | #if defined(CONFIG_HAS_ETH2) |
de2dff6f | 159 | print_eth(2); |
42d1f039 | 160 | #endif |
e2ffd59b | 161 | #if defined(CONFIG_HAS_ETH3) |
de2dff6f | 162 | print_eth(3); |
03f5c550 | 163 | #endif |
c68a05fe | 164 | #if defined(CONFIG_HAS_ETH4) |
de2dff6f | 165 | print_eth(4); |
c68a05fe | 166 | #endif |
c68a05fe | 167 | #if defined(CONFIG_HAS_ETH5) |
de2dff6f | 168 | print_eth(5); |
c68a05fe | 169 | #endif |
170 | ||
50a47d05 | 171 | printf("IP addr = %s\n", getenv("ipaddr")); |
8e261575 | 172 | printf("baudrate = %6u bps\n", gd->baudrate); |
5902e8f7 | 173 | print_num("relocaddr", gd->relocaddr); |
e7939464 | 174 | board_detail(); |
8bde7f77 WD |
175 | return 0; |
176 | } | |
177 | ||
c99ea790 | 178 | #elif defined(CONFIG_NIOS2) |
5c952cf0 | 179 | |
5902e8f7 | 180 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
5c952cf0 | 181 | { |
744b57b8 | 182 | int i; |
5c952cf0 WD |
183 | bd_t *bd = gd->bd; |
184 | ||
744b57b8 TC |
185 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { |
186 | print_num("DRAM bank", i); | |
187 | print_num("-> start", bd->bi_dram[i].start); | |
188 | print_num("-> size", bd->bi_dram[i].size); | |
189 | } | |
190 | ||
5902e8f7 ML |
191 | print_num("flash start", (ulong)bd->bi_flashstart); |
192 | print_num("flash size", (ulong)bd->bi_flashsize); | |
193 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
5c952cf0 | 194 | |
6d0f6bcf | 195 | #if defined(CONFIG_SYS_SRAM_BASE) |
5c952cf0 WD |
196 | print_num ("sram start", (ulong)bd->bi_sramstart); |
197 | print_num ("sram size", (ulong)bd->bi_sramsize); | |
198 | #endif | |
199 | ||
90253178 | 200 | #if defined(CONFIG_CMD_NET) |
de2dff6f | 201 | print_eth(0); |
50a47d05 | 202 | printf("ip_addr = %s\n", getenv("ipaddr")); |
5c952cf0 WD |
203 | #endif |
204 | ||
8e261575 | 205 | printf("baudrate = %u bps\n", gd->baudrate); |
5c952cf0 WD |
206 | |
207 | return 0; | |
208 | } | |
c99ea790 RM |
209 | |
210 | #elif defined(CONFIG_MICROBLAZE) | |
cfc67116 | 211 | |
5902e8f7 | 212 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
cfc67116 | 213 | { |
cfc67116 | 214 | bd_t *bd = gd->bd; |
e945f6dc MS |
215 | int i; |
216 | ||
217 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
218 | print_num("DRAM bank", i); | |
219 | print_num("-> start", bd->bi_dram[i].start); | |
220 | print_num("-> size", bd->bi_dram[i].size); | |
221 | } | |
222 | ||
5902e8f7 ML |
223 | print_num("flash start ", (ulong)bd->bi_flashstart); |
224 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
225 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
6d0f6bcf | 226 | #if defined(CONFIG_SYS_SRAM_BASE) |
5902e8f7 ML |
227 | print_num("sram start ", (ulong)bd->bi_sramstart); |
228 | print_num("sram size ", (ulong)bd->bi_sramsize); | |
cfc67116 | 229 | #endif |
062f078c | 230 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 231 | print_eths(); |
cfc67116 | 232 | #endif |
8e261575 | 233 | printf("baudrate = %u bps\n", gd->baudrate); |
e945f6dc MS |
234 | print_num("relocaddr", gd->relocaddr); |
235 | print_num("reloc off", gd->reloc_off); | |
de86765b MS |
236 | print_num("fdt_blob", (ulong)gd->fdt_blob); |
237 | print_num("new_fdt", (ulong)gd->new_fdt); | |
238 | print_num("fdt_size", (ulong)gd->fdt_size); | |
e945f6dc | 239 | |
cfc67116 MS |
240 | return 0; |
241 | } | |
4a551709 | 242 | |
c99ea790 RM |
243 | #elif defined(CONFIG_SPARC) |
244 | ||
54841ab5 | 245 | int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
00ab32c8 DH |
246 | { |
247 | bd_t *bd = gd->bd; | |
00ab32c8 DH |
248 | |
249 | #ifdef DEBUG | |
250 | print_num("bd address ", (ulong) bd); | |
251 | #endif | |
252 | print_num("memstart ", bd->bi_memstart); | |
b57ca3e1 | 253 | print_lnum("memsize ", bd->bi_memsize); |
00ab32c8 | 254 | print_num("flashstart ", bd->bi_flashstart); |
6d0f6bcf | 255 | print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); |
0e8d1586 | 256 | print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); |
d97f01a6 | 257 | printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, |
6d0f6bcf | 258 | CONFIG_SYS_MONITOR_LEN); |
d97f01a6 | 259 | printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE, |
6d0f6bcf | 260 | CONFIG_SYS_MALLOC_LEN); |
d97f01a6 | 261 | printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, |
6d0f6bcf | 262 | CONFIG_SYS_STACK_SIZE); |
d97f01a6 | 263 | printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET, |
6d0f6bcf | 264 | CONFIG_SYS_PROM_SIZE); |
d97f01a6 | 265 | printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, |
25ddd1fb | 266 | GENERATED_GBL_DATA_SIZE); |
00ab32c8 DH |
267 | |
268 | #if defined(CONFIG_CMD_NET) | |
de2dff6f | 269 | print_eth(0); |
50a47d05 | 270 | printf("ip_addr = %s\n", getenv("ipaddr")); |
00ab32c8 | 271 | #endif |
8e261575 | 272 | printf("baudrate = %6u bps\n", gd->baudrate); |
00ab32c8 DH |
273 | return 0; |
274 | } | |
275 | ||
c99ea790 RM |
276 | #elif defined(CONFIG_M68K) |
277 | ||
5902e8f7 | 278 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8e585f02 | 279 | { |
8e585f02 | 280 | bd_t *bd = gd->bd; |
8ae158cd | 281 | |
12feb364 | 282 | print_bi_mem(bd); |
5902e8f7 ML |
283 | print_num("flashstart", (ulong)bd->bi_flashstart); |
284 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
285 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
6d0f6bcf | 286 | #if defined(CONFIG_SYS_INIT_RAM_ADDR) |
5902e8f7 ML |
287 | print_num("sramstart", (ulong)bd->bi_sramstart); |
288 | print_num("sramsize", (ulong)bd->bi_sramsize); | |
8e585f02 | 289 | #endif |
6d0f6bcf | 290 | #if defined(CONFIG_SYS_MBAR) |
5902e8f7 | 291 | print_num("mbar", bd->bi_mbar_base); |
8e585f02 | 292 | #endif |
0c277ef9 TT |
293 | print_mhz("cpufreq", bd->bi_intfreq); |
294 | print_mhz("busfreq", bd->bi_busfreq); | |
8ae158cd | 295 | #ifdef CONFIG_PCI |
0c277ef9 | 296 | print_mhz("pcifreq", bd->bi_pcifreq); |
8ae158cd TL |
297 | #endif |
298 | #ifdef CONFIG_EXTRA_CLOCK | |
0c277ef9 TT |
299 | print_mhz("flbfreq", bd->bi_flbfreq); |
300 | print_mhz("inpfreq", bd->bi_inpfreq); | |
301 | print_mhz("vcofreq", bd->bi_vcofreq); | |
8ae158cd | 302 | #endif |
26667b7f | 303 | #if defined(CONFIG_CMD_NET) |
de2dff6f | 304 | print_eth(0); |
8e585f02 | 305 | #if defined(CONFIG_HAS_ETH1) |
de2dff6f | 306 | print_eth(1); |
8e585f02 | 307 | #endif |
8e585f02 | 308 | #if defined(CONFIG_HAS_ETH2) |
de2dff6f | 309 | print_eth(2); |
8e585f02 | 310 | #endif |
8e585f02 | 311 | #if defined(CONFIG_HAS_ETH3) |
de2dff6f | 312 | print_eth(3); |
8e585f02 TL |
313 | #endif |
314 | ||
50a47d05 | 315 | printf("ip_addr = %s\n", getenv("ipaddr")); |
26667b7f | 316 | #endif |
8e261575 | 317 | printf("baudrate = %u bps\n", gd->baudrate); |
8e585f02 TL |
318 | |
319 | return 0; | |
320 | } | |
321 | ||
8dc48d71 | 322 | #elif defined(CONFIG_BLACKFIN) |
c99ea790 | 323 | |
54841ab5 | 324 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8dc48d71 | 325 | { |
8dc48d71 MF |
326 | bd_t *bd = gd->bd; |
327 | ||
328 | printf("U-Boot = %s\n", bd->bi_r_version); | |
329 | printf("CPU = %s\n", bd->bi_cpu); | |
330 | printf("Board = %s\n", bd->bi_board_name); | |
0c277ef9 TT |
331 | print_mhz("VCO", bd->bi_vco); |
332 | print_mhz("CCLK", bd->bi_cclk); | |
333 | print_mhz("SCLK", bd->bi_sclk); | |
8dc48d71 | 334 | |
171e5396 | 335 | print_bi_boot_params(bd); |
12feb364 | 336 | print_bi_mem(bd); |
5902e8f7 ML |
337 | print_num("flashstart", (ulong)bd->bi_flashstart); |
338 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
339 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
8dc48d71 | 340 | |
de2dff6f | 341 | print_eth(0); |
50a47d05 | 342 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 343 | printf("baudrate = %u bps\n", gd->baudrate); |
8dc48d71 MF |
344 | |
345 | return 0; | |
346 | } | |
347 | ||
c99ea790 | 348 | #elif defined(CONFIG_MIPS) |
8bde7f77 | 349 | |
5902e8f7 | 350 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 351 | { |
8bde7f77 WD |
352 | bd_t *bd = gd->bd; |
353 | ||
171e5396 | 354 | print_bi_boot_params(bd); |
12feb364 | 355 | print_bi_mem(bd); |
5902e8f7 ML |
356 | print_num("flashstart", (ulong)bd->bi_flashstart); |
357 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
358 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
8bde7f77 | 359 | |
de2dff6f | 360 | print_eth(0); |
50a47d05 | 361 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 362 | printf("baudrate = %u bps\n", gd->baudrate); |
8cf7a418 TC |
363 | print_num("relocaddr", gd->relocaddr); |
364 | print_num("reloc off", gd->reloc_off); | |
8bde7f77 WD |
365 | |
366 | return 0; | |
367 | } | |
8bde7f77 | 368 | |
c99ea790 RM |
369 | #elif defined(CONFIG_AVR32) |
370 | ||
5902e8f7 | 371 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
c99ea790 RM |
372 | { |
373 | bd_t *bd = gd->bd; | |
374 | ||
171e5396 | 375 | print_bi_boot_params(bd); |
12feb364 | 376 | print_bi_mem(bd); |
5902e8f7 ML |
377 | print_num("flashstart", (ulong)bd->bi_flashstart); |
378 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
379 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
c99ea790 RM |
380 | |
381 | print_eth(0); | |
50a47d05 | 382 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 383 | printf("baudrate = %u bps\n", gd->baudrate); |
c99ea790 RM |
384 | |
385 | return 0; | |
386 | } | |
387 | ||
388 | #elif defined(CONFIG_ARM) | |
8bde7f77 | 389 | |
0e350f81 JH |
390 | static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, |
391 | char * const argv[]) | |
8bde7f77 | 392 | { |
8bde7f77 WD |
393 | int i; |
394 | bd_t *bd = gd->bd; | |
395 | ||
5902e8f7 | 396 | print_num("arch_number", bd->bi_arch_number); |
171e5396 | 397 | print_bi_boot_params(bd); |
8bde7f77 | 398 | |
5902e8f7 | 399 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { |
8bde7f77 WD |
400 | print_num("DRAM bank", i); |
401 | print_num("-> start", bd->bi_dram[i].start); | |
402 | print_num("-> size", bd->bi_dram[i].size); | |
403 | } | |
404 | ||
e8149522 | 405 | #ifdef CONFIG_SYS_MEM_RESERVE_SECURE |
e61a7534 | 406 | if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) { |
e8149522 | 407 | print_num("Secure ram", |
e61a7534 | 408 | gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK); |
e8149522 YS |
409 | } |
410 | #endif | |
ff973800 | 411 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 412 | print_eths(); |
a41dbbd9 | 413 | #endif |
8e261575 | 414 | printf("baudrate = %u bps\n", gd->baudrate); |
e47f2db5 | 415 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) |
34fd5d25 | 416 | print_num("TLB addr", gd->arch.tlb_addr); |
f1d2b313 | 417 | #endif |
5902e8f7 ML |
418 | print_num("relocaddr", gd->relocaddr); |
419 | print_num("reloc off", gd->reloc_off); | |
420 | print_num("irq_sp", gd->irq_sp); /* irq stack pointer */ | |
421 | print_num("sp start ", gd->start_addr_sp); | |
c8fcd0f2 | 422 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
5902e8f7 | 423 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 424 | #endif |
8f5d4687 HM |
425 | /* |
426 | * TODO: Currently only support for davinci SOC's is added. | |
427 | * Remove this check once all the board implement this. | |
428 | */ | |
429 | #ifdef CONFIG_CLOCKS | |
430 | printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq); | |
431 | printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq); | |
432 | printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq); | |
7bb7d672 HS |
433 | #endif |
434 | #ifdef CONFIG_BOARD_TYPES | |
435 | printf("Board Type = %ld\n", gd->board_type); | |
8f5d4687 | 436 | #endif |
7f7ddf2a SG |
437 | #ifdef CONFIG_SYS_MALLOC_F |
438 | printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr, | |
439 | CONFIG_SYS_MALLOC_F_LEN); | |
440 | #endif | |
441 | ||
8bde7f77 WD |
442 | return 0; |
443 | } | |
444 | ||
ebd0d062 NI |
445 | #elif defined(CONFIG_SH) |
446 | ||
5902e8f7 | 447 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
ebd0d062 NI |
448 | { |
449 | bd_t *bd = gd->bd; | |
12feb364 MF |
450 | |
451 | print_bi_mem(bd); | |
5902e8f7 ML |
452 | print_num("flash start ", (ulong)bd->bi_flashstart); |
453 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
454 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
ebd0d062 NI |
455 | |
456 | #if defined(CONFIG_CMD_NET) | |
457 | print_eth(0); | |
50a47d05 | 458 | printf("ip_addr = %s\n", getenv("ipaddr")); |
ebd0d062 | 459 | #endif |
8e261575 | 460 | printf("baudrate = %u bps\n", gd->baudrate); |
ebd0d062 NI |
461 | return 0; |
462 | } | |
463 | ||
a806ee6f GR |
464 | #elif defined(CONFIG_X86) |
465 | ||
5902e8f7 | 466 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
a806ee6f GR |
467 | { |
468 | int i; | |
469 | bd_t *bd = gd->bd; | |
a806ee6f | 470 | |
171e5396 | 471 | print_bi_boot_params(bd); |
5902e8f7 ML |
472 | print_num("bi_memstart", bd->bi_memstart); |
473 | print_num("bi_memsize", bd->bi_memsize); | |
474 | print_num("bi_flashstart", bd->bi_flashstart); | |
475 | print_num("bi_flashsize", bd->bi_flashsize); | |
476 | print_num("bi_flashoffset", bd->bi_flashoffset); | |
477 | print_num("bi_sramstart", bd->bi_sramstart); | |
478 | print_num("bi_sramsize", bd->bi_sramsize); | |
479 | print_num("bi_bootflags", bd->bi_bootflags); | |
0c277ef9 TT |
480 | print_mhz("cpufreq", bd->bi_intfreq); |
481 | print_mhz("busfreq", bd->bi_busfreq); | |
5902e8f7 ML |
482 | |
483 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
a806ee6f GR |
484 | print_num("DRAM bank", i); |
485 | print_num("-> start", bd->bi_dram[i].start); | |
486 | print_num("-> size", bd->bi_dram[i].size); | |
487 | } | |
488 | ||
489 | #if defined(CONFIG_CMD_NET) | |
490 | print_eth(0); | |
50a47d05 | 491 | printf("ip_addr = %s\n", getenv("ipaddr")); |
0c277ef9 | 492 | print_mhz("ethspeed", bd->bi_ethspeed); |
a806ee6f | 493 | #endif |
8e261575 | 494 | printf("baudrate = %u bps\n", gd->baudrate); |
a806ee6f GR |
495 | |
496 | return 0; | |
497 | } | |
498 | ||
6fcc3be4 SG |
499 | #elif defined(CONFIG_SANDBOX) |
500 | ||
501 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
502 | { | |
503 | int i; | |
504 | bd_t *bd = gd->bd; | |
505 | ||
171e5396 | 506 | print_bi_boot_params(bd); |
6fcc3be4 SG |
507 | |
508 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
509 | print_num("DRAM bank", i); | |
510 | print_num("-> start", bd->bi_dram[i].start); | |
511 | print_num("-> size", bd->bi_dram[i].size); | |
512 | } | |
513 | ||
514 | #if defined(CONFIG_CMD_NET) | |
515 | print_eth(0); | |
50a47d05 | 516 | printf("ip_addr = %s\n", getenv("ipaddr")); |
6fcc3be4 | 517 | #endif |
c8fcd0f2 | 518 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
6fcc3be4 | 519 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 520 | #endif |
6fcc3be4 SG |
521 | return 0; |
522 | } | |
523 | ||
64d61461 ML |
524 | #elif defined(CONFIG_NDS32) |
525 | ||
526 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
527 | { | |
528 | int i; | |
529 | bd_t *bd = gd->bd; | |
530 | ||
531 | print_num("arch_number", bd->bi_arch_number); | |
171e5396 | 532 | print_bi_boot_params(bd); |
64d61461 ML |
533 | |
534 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
535 | print_num("DRAM bank", i); | |
536 | print_num("-> start", bd->bi_dram[i].start); | |
537 | print_num("-> size", bd->bi_dram[i].size); | |
538 | } | |
539 | ||
540 | #if defined(CONFIG_CMD_NET) | |
541 | print_eth(0); | |
50a47d05 | 542 | printf("ip_addr = %s\n", getenv("ipaddr")); |
64d61461 | 543 | #endif |
8e261575 | 544 | printf("baudrate = %u bps\n", gd->baudrate); |
64d61461 ML |
545 | |
546 | return 0; | |
547 | } | |
548 | ||
2be9fdbf SK |
549 | #elif defined(CONFIG_OPENRISC) |
550 | ||
551 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
552 | { | |
553 | bd_t *bd = gd->bd; | |
554 | ||
12feb364 | 555 | print_bi_mem(bd); |
2be9fdbf SK |
556 | print_num("flash start", (ulong)bd->bi_flashstart); |
557 | print_num("flash size", (ulong)bd->bi_flashsize); | |
558 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
559 | ||
560 | #if defined(CONFIG_CMD_NET) | |
561 | print_eth(0); | |
50a47d05 | 562 | printf("ip_addr = %s\n", getenv("ipaddr")); |
2be9fdbf SK |
563 | #endif |
564 | ||
8e261575 | 565 | printf("baudrate = %u bps\n", gd->baudrate); |
2be9fdbf SK |
566 | |
567 | return 0; | |
568 | } | |
569 | ||
946f6f24 | 570 | #elif defined(CONFIG_ARC) |
bc5d5428 AB |
571 | |
572 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
573 | { | |
574 | bd_t *bd = gd->bd; | |
575 | ||
12feb364 | 576 | print_bi_mem(bd); |
bc5d5428 AB |
577 | |
578 | #if defined(CONFIG_CMD_NET) | |
579 | print_eth(0); | |
580 | printf("ip_addr = %s\n", getenv("ipaddr")); | |
581 | #endif | |
8e261575 | 582 | printf("baudrate = %d bps\n", gd->baudrate); |
bc5d5428 AB |
583 | |
584 | return 0; | |
585 | } | |
586 | ||
c99ea790 RM |
587 | #else |
588 | #error "a case for this architecture does not exist!" | |
589 | #endif | |
8bde7f77 | 590 | |
8bde7f77 WD |
591 | /* -------------------------------------------------------------------- */ |
592 | ||
0d498393 WD |
593 | U_BOOT_CMD( |
594 | bdinfo, 1, 1, do_bdinfo, | |
2fb2604d | 595 | "print Board Info structure", |
a89c33db | 596 | "" |
8bde7f77 | 597 | ); |