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Commit | Line | Data |
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8bde7f77 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
8bde7f77 WD |
6 | */ |
7 | ||
8 | /* | |
9 | * Boot support | |
10 | */ | |
11 | #include <common.h> | |
12 | #include <command.h> | |
d88af4da | 13 | #include <linux/compiler.h> |
8bde7f77 | 14 | |
d87080b7 | 15 | DECLARE_GLOBAL_DATA_PTR; |
8bde7f77 | 16 | |
d88af4da MF |
17 | __maybe_unused |
18 | static void print_num(const char *name, ulong value) | |
19 | { | |
20 | printf("%-12s= 0x%08lX\n", name, value); | |
21 | } | |
8bde7f77 | 22 | |
5f3dfadc | 23 | __maybe_unused |
d88af4da MF |
24 | static void print_eth(int idx) |
25 | { | |
26 | char name[10], *val; | |
27 | if (idx) | |
28 | sprintf(name, "eth%iaddr", idx); | |
29 | else | |
30 | strcpy(name, "ethaddr"); | |
31 | val = getenv(name); | |
32 | if (!val) | |
33 | val = "(not set)"; | |
34 | printf("%-12s= %s\n", name, val); | |
35 | } | |
de2dff6f | 36 | |
05c3e68f | 37 | #ifndef CONFIG_DM_ETH |
9fc6a06a MS |
38 | __maybe_unused |
39 | static void print_eths(void) | |
40 | { | |
41 | struct eth_device *dev; | |
42 | int i = 0; | |
43 | ||
44 | do { | |
45 | dev = eth_get_dev_by_index(i); | |
46 | if (dev) { | |
47 | printf("eth%dname = %s\n", i, dev->name); | |
48 | print_eth(i); | |
49 | i++; | |
50 | } | |
51 | } while (dev); | |
52 | ||
53 | printf("current eth = %s\n", eth_get_name()); | |
54 | printf("ip_addr = %s\n", getenv("ipaddr")); | |
55 | } | |
05c3e68f | 56 | #endif |
9fc6a06a | 57 | |
d88af4da | 58 | __maybe_unused |
47708457 | 59 | static void print_lnum(const char *name, unsigned long long value) |
d88af4da MF |
60 | { |
61 | printf("%-12s= 0x%.8llX\n", name, value); | |
62 | } | |
63 | ||
64 | __maybe_unused | |
65 | static void print_mhz(const char *name, unsigned long hz) | |
66 | { | |
67 | char buf[32]; | |
68 | ||
69 | printf("%-12s= %6s MHz\n", name, strmhz(buf, hz)); | |
70 | } | |
8bde7f77 | 71 | |
171e5396 MF |
72 | |
73 | static inline void print_bi_boot_params(const bd_t *bd) | |
74 | { | |
75 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
76 | } | |
77 | ||
12feb364 MF |
78 | static inline void print_bi_mem(const bd_t *bd) |
79 | { | |
80 | #if defined(CONFIG_SH) | |
81 | print_num("mem start ", (ulong)bd->bi_memstart); | |
82 | print_lnum("mem size ", (u64)bd->bi_memsize); | |
83 | #elif defined(CONFIG_ARC) | |
84 | print_num("mem start", (ulong)bd->bi_memstart); | |
85 | print_lnum("mem size", (u64)bd->bi_memsize); | |
86 | #elif defined(CONFIG_AVR32) | |
87 | print_num("memstart", (ulong)bd->bi_dram[0].start); | |
88 | print_lnum("memsize", (u64)bd->bi_dram[0].size); | |
89 | #else | |
90 | print_num("memstart", (ulong)bd->bi_memstart); | |
91 | print_lnum("memsize", (u64)bd->bi_memsize); | |
92 | #endif | |
93 | } | |
94 | ||
fd60e99f MF |
95 | static inline void print_bi_dram(const bd_t *bd) |
96 | { | |
97 | #ifdef CONFIG_NR_DRAM_BANKS | |
98 | int i; | |
99 | ||
100 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
101 | print_num("DRAM bank", i); | |
102 | print_num("-> start", bd->bi_dram[i].start); | |
103 | print_num("-> size", bd->bi_dram[i].size); | |
104 | } | |
105 | #endif | |
106 | } | |
107 | ||
f80e5359 MF |
108 | static inline void print_bi_flash(const bd_t *bd) |
109 | { | |
110 | #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH) | |
111 | print_num("flash start ", (ulong)bd->bi_flashstart); | |
112 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
113 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
114 | ||
115 | #elif defined(CONFIG_NIOS2) || defined(CONFIG_OPENRISC) | |
116 | print_num("flash start", (ulong)bd->bi_flashstart); | |
117 | print_num("flash size", (ulong)bd->bi_flashsize); | |
118 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
119 | #else | |
120 | print_num("flashstart", (ulong)bd->bi_flashstart); | |
121 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
122 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
123 | #endif | |
124 | } | |
125 | ||
8752e260 MF |
126 | static inline void print_eth_ip_addr(void) |
127 | { | |
128 | #if defined(CONFIG_CMD_NET) | |
129 | print_eth(0); | |
130 | #if defined(CONFIG_HAS_ETH1) | |
131 | print_eth(1); | |
132 | #endif | |
133 | #if defined(CONFIG_HAS_ETH2) | |
134 | print_eth(2); | |
135 | #endif | |
136 | #if defined(CONFIG_HAS_ETH3) | |
137 | print_eth(3); | |
138 | #endif | |
139 | #if defined(CONFIG_HAS_ETH4) | |
140 | print_eth(4); | |
141 | #endif | |
142 | #if defined(CONFIG_HAS_ETH5) | |
143 | print_eth(5); | |
144 | #endif | |
145 | printf("IP addr = %s\n", getenv("ipaddr")); | |
146 | #endif | |
147 | } | |
148 | ||
c99ea790 | 149 | #if defined(CONFIG_PPC) |
e7939464 YS |
150 | void __weak board_detail(void) |
151 | { | |
152 | /* Please define boot_detail() for your platform */ | |
153 | } | |
8bde7f77 | 154 | |
5902e8f7 | 155 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 156 | { |
8bde7f77 | 157 | bd_t *bd = gd->bd; |
8bde7f77 WD |
158 | |
159 | #ifdef DEBUG | |
5902e8f7 ML |
160 | print_num("bd address", (ulong)bd); |
161 | #endif | |
12feb364 | 162 | print_bi_mem(bd); |
f80e5359 | 163 | print_bi_flash(bd); |
5902e8f7 ML |
164 | print_num("sramstart", bd->bi_sramstart); |
165 | print_num("sramsize", bd->bi_sramsize); | |
166 | #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ | |
58dac327 | 167 | defined(CONFIG_MPC8260) || defined(CONFIG_E500) |
5902e8f7 ML |
168 | print_num("immr_base", bd->bi_immr_base); |
169 | #endif | |
170 | print_num("bootflags", bd->bi_bootflags); | |
3fb85889 | 171 | #if defined(CONFIG_405EP) || \ |
5902e8f7 ML |
172 | defined(CONFIG_405GP) || \ |
173 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
174 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
175 | defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ | |
176 | defined(CONFIG_XILINX_405) | |
0c277ef9 TT |
177 | print_mhz("procfreq", bd->bi_procfreq); |
178 | print_mhz("plb_busfreq", bd->bi_plb_busfreq); | |
5902e8f7 ML |
179 | #if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \ |
180 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
181 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
182 | defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405) | |
0c277ef9 | 183 | print_mhz("pci_busfreq", bd->bi_pci_busfreq); |
8bde7f77 | 184 | #endif |
3fb85889 | 185 | #else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
9c4c5ae3 | 186 | #if defined(CONFIG_CPM2) |
0c277ef9 TT |
187 | print_mhz("vco", bd->bi_vco); |
188 | print_mhz("sccfreq", bd->bi_sccfreq); | |
189 | print_mhz("brgfreq", bd->bi_brgfreq); | |
8bde7f77 | 190 | #endif |
0c277ef9 | 191 | print_mhz("intfreq", bd->bi_intfreq); |
9c4c5ae3 | 192 | #if defined(CONFIG_CPM2) |
0c277ef9 | 193 | print_mhz("cpmfreq", bd->bi_cpmfreq); |
8bde7f77 | 194 | #endif |
0c277ef9 | 195 | print_mhz("busfreq", bd->bi_busfreq); |
3fb85889 | 196 | #endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
03f5c550 | 197 | |
34e210f5 TT |
198 | #ifdef CONFIG_ENABLE_36BIT_PHYS |
199 | #ifdef CONFIG_PHYS_64BIT | |
200 | puts("addressing = 36-bit\n"); | |
201 | #else | |
202 | puts("addressing = 32-bit\n"); | |
203 | #endif | |
204 | #endif | |
205 | ||
8752e260 | 206 | print_eth_ip_addr(); |
8e261575 | 207 | printf("baudrate = %6u bps\n", gd->baudrate); |
5902e8f7 | 208 | print_num("relocaddr", gd->relocaddr); |
e7939464 | 209 | board_detail(); |
8bde7f77 WD |
210 | return 0; |
211 | } | |
212 | ||
c99ea790 | 213 | #elif defined(CONFIG_NIOS2) |
5c952cf0 | 214 | |
5902e8f7 | 215 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
5c952cf0 | 216 | { |
5c952cf0 WD |
217 | bd_t *bd = gd->bd; |
218 | ||
fd60e99f | 219 | print_bi_dram(bd); |
f80e5359 | 220 | print_bi_flash(bd); |
5c952cf0 | 221 | |
6d0f6bcf | 222 | #if defined(CONFIG_SYS_SRAM_BASE) |
5c952cf0 WD |
223 | print_num ("sram start", (ulong)bd->bi_sramstart); |
224 | print_num ("sram size", (ulong)bd->bi_sramsize); | |
225 | #endif | |
226 | ||
8752e260 | 227 | print_eth_ip_addr(); |
8e261575 | 228 | printf("baudrate = %u bps\n", gd->baudrate); |
5c952cf0 WD |
229 | |
230 | return 0; | |
231 | } | |
c99ea790 RM |
232 | |
233 | #elif defined(CONFIG_MICROBLAZE) | |
cfc67116 | 234 | |
5902e8f7 | 235 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
cfc67116 | 236 | { |
cfc67116 | 237 | bd_t *bd = gd->bd; |
e945f6dc | 238 | |
fd60e99f | 239 | print_bi_dram(bd); |
f80e5359 | 240 | print_bi_flash(bd); |
6d0f6bcf | 241 | #if defined(CONFIG_SYS_SRAM_BASE) |
5902e8f7 ML |
242 | print_num("sram start ", (ulong)bd->bi_sramstart); |
243 | print_num("sram size ", (ulong)bd->bi_sramsize); | |
cfc67116 | 244 | #endif |
062f078c | 245 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 246 | print_eths(); |
cfc67116 | 247 | #endif |
8e261575 | 248 | printf("baudrate = %u bps\n", gd->baudrate); |
e945f6dc MS |
249 | print_num("relocaddr", gd->relocaddr); |
250 | print_num("reloc off", gd->reloc_off); | |
de86765b MS |
251 | print_num("fdt_blob", (ulong)gd->fdt_blob); |
252 | print_num("new_fdt", (ulong)gd->new_fdt); | |
253 | print_num("fdt_size", (ulong)gd->fdt_size); | |
e945f6dc | 254 | |
cfc67116 MS |
255 | return 0; |
256 | } | |
4a551709 | 257 | |
c99ea790 RM |
258 | #elif defined(CONFIG_SPARC) |
259 | ||
54841ab5 | 260 | int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
00ab32c8 DH |
261 | { |
262 | bd_t *bd = gd->bd; | |
00ab32c8 DH |
263 | |
264 | #ifdef DEBUG | |
265 | print_num("bd address ", (ulong) bd); | |
266 | #endif | |
267 | print_num("memstart ", bd->bi_memstart); | |
b57ca3e1 | 268 | print_lnum("memsize ", bd->bi_memsize); |
00ab32c8 | 269 | print_num("flashstart ", bd->bi_flashstart); |
6d0f6bcf | 270 | print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); |
0e8d1586 | 271 | print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); |
d97f01a6 | 272 | printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, |
6d0f6bcf | 273 | CONFIG_SYS_MONITOR_LEN); |
d97f01a6 | 274 | printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE, |
6d0f6bcf | 275 | CONFIG_SYS_MALLOC_LEN); |
d97f01a6 | 276 | printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, |
6d0f6bcf | 277 | CONFIG_SYS_STACK_SIZE); |
d97f01a6 | 278 | printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET, |
6d0f6bcf | 279 | CONFIG_SYS_PROM_SIZE); |
d97f01a6 | 280 | printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, |
25ddd1fb | 281 | GENERATED_GBL_DATA_SIZE); |
00ab32c8 | 282 | |
8752e260 | 283 | print_eth_ip_addr(); |
8e261575 | 284 | printf("baudrate = %6u bps\n", gd->baudrate); |
00ab32c8 DH |
285 | return 0; |
286 | } | |
287 | ||
c99ea790 RM |
288 | #elif defined(CONFIG_M68K) |
289 | ||
5902e8f7 | 290 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8e585f02 | 291 | { |
8e585f02 | 292 | bd_t *bd = gd->bd; |
8ae158cd | 293 | |
12feb364 | 294 | print_bi_mem(bd); |
f80e5359 | 295 | print_bi_flash(bd); |
6d0f6bcf | 296 | #if defined(CONFIG_SYS_INIT_RAM_ADDR) |
5902e8f7 ML |
297 | print_num("sramstart", (ulong)bd->bi_sramstart); |
298 | print_num("sramsize", (ulong)bd->bi_sramsize); | |
8e585f02 | 299 | #endif |
6d0f6bcf | 300 | #if defined(CONFIG_SYS_MBAR) |
5902e8f7 | 301 | print_num("mbar", bd->bi_mbar_base); |
8e585f02 | 302 | #endif |
0c277ef9 TT |
303 | print_mhz("cpufreq", bd->bi_intfreq); |
304 | print_mhz("busfreq", bd->bi_busfreq); | |
8ae158cd | 305 | #ifdef CONFIG_PCI |
0c277ef9 | 306 | print_mhz("pcifreq", bd->bi_pcifreq); |
8ae158cd TL |
307 | #endif |
308 | #ifdef CONFIG_EXTRA_CLOCK | |
0c277ef9 TT |
309 | print_mhz("flbfreq", bd->bi_flbfreq); |
310 | print_mhz("inpfreq", bd->bi_inpfreq); | |
311 | print_mhz("vcofreq", bd->bi_vcofreq); | |
8ae158cd | 312 | #endif |
8752e260 | 313 | print_eth_ip_addr(); |
8e261575 | 314 | printf("baudrate = %u bps\n", gd->baudrate); |
8e585f02 TL |
315 | |
316 | return 0; | |
317 | } | |
318 | ||
8dc48d71 | 319 | #elif defined(CONFIG_BLACKFIN) |
c99ea790 | 320 | |
54841ab5 | 321 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8dc48d71 | 322 | { |
8dc48d71 MF |
323 | bd_t *bd = gd->bd; |
324 | ||
325 | printf("U-Boot = %s\n", bd->bi_r_version); | |
326 | printf("CPU = %s\n", bd->bi_cpu); | |
327 | printf("Board = %s\n", bd->bi_board_name); | |
0c277ef9 TT |
328 | print_mhz("VCO", bd->bi_vco); |
329 | print_mhz("CCLK", bd->bi_cclk); | |
330 | print_mhz("SCLK", bd->bi_sclk); | |
8dc48d71 | 331 | |
171e5396 | 332 | print_bi_boot_params(bd); |
12feb364 | 333 | print_bi_mem(bd); |
f80e5359 | 334 | print_bi_flash(bd); |
8752e260 | 335 | print_eth_ip_addr(); |
8e261575 | 336 | printf("baudrate = %u bps\n", gd->baudrate); |
8dc48d71 MF |
337 | |
338 | return 0; | |
339 | } | |
340 | ||
c99ea790 | 341 | #elif defined(CONFIG_MIPS) |
8bde7f77 | 342 | |
5902e8f7 | 343 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 344 | { |
8bde7f77 WD |
345 | bd_t *bd = gd->bd; |
346 | ||
171e5396 | 347 | print_bi_boot_params(bd); |
12feb364 | 348 | print_bi_mem(bd); |
f80e5359 | 349 | print_bi_flash(bd); |
8752e260 | 350 | print_eth_ip_addr(); |
8e261575 | 351 | printf("baudrate = %u bps\n", gd->baudrate); |
8cf7a418 TC |
352 | print_num("relocaddr", gd->relocaddr); |
353 | print_num("reloc off", gd->reloc_off); | |
8bde7f77 WD |
354 | |
355 | return 0; | |
356 | } | |
8bde7f77 | 357 | |
c99ea790 RM |
358 | #elif defined(CONFIG_AVR32) |
359 | ||
5902e8f7 | 360 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
c99ea790 RM |
361 | { |
362 | bd_t *bd = gd->bd; | |
363 | ||
171e5396 | 364 | print_bi_boot_params(bd); |
12feb364 | 365 | print_bi_mem(bd); |
f80e5359 | 366 | print_bi_flash(bd); |
8752e260 | 367 | print_eth_ip_addr(); |
8e261575 | 368 | printf("baudrate = %u bps\n", gd->baudrate); |
c99ea790 RM |
369 | |
370 | return 0; | |
371 | } | |
372 | ||
373 | #elif defined(CONFIG_ARM) | |
8bde7f77 | 374 | |
0e350f81 JH |
375 | static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, |
376 | char * const argv[]) | |
8bde7f77 | 377 | { |
8bde7f77 WD |
378 | bd_t *bd = gd->bd; |
379 | ||
5902e8f7 | 380 | print_num("arch_number", bd->bi_arch_number); |
171e5396 | 381 | print_bi_boot_params(bd); |
fd60e99f | 382 | print_bi_dram(bd); |
8bde7f77 | 383 | |
e8149522 | 384 | #ifdef CONFIG_SYS_MEM_RESERVE_SECURE |
e61a7534 | 385 | if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) { |
e8149522 | 386 | print_num("Secure ram", |
e61a7534 | 387 | gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK); |
e8149522 YS |
388 | } |
389 | #endif | |
ff973800 | 390 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 391 | print_eths(); |
a41dbbd9 | 392 | #endif |
8e261575 | 393 | printf("baudrate = %u bps\n", gd->baudrate); |
e47f2db5 | 394 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) |
34fd5d25 | 395 | print_num("TLB addr", gd->arch.tlb_addr); |
f1d2b313 | 396 | #endif |
5902e8f7 ML |
397 | print_num("relocaddr", gd->relocaddr); |
398 | print_num("reloc off", gd->reloc_off); | |
399 | print_num("irq_sp", gd->irq_sp); /* irq stack pointer */ | |
400 | print_num("sp start ", gd->start_addr_sp); | |
c8fcd0f2 | 401 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
5902e8f7 | 402 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 403 | #endif |
8f5d4687 HM |
404 | /* |
405 | * TODO: Currently only support for davinci SOC's is added. | |
406 | * Remove this check once all the board implement this. | |
407 | */ | |
408 | #ifdef CONFIG_CLOCKS | |
409 | printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq); | |
410 | printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq); | |
411 | printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq); | |
7bb7d672 HS |
412 | #endif |
413 | #ifdef CONFIG_BOARD_TYPES | |
414 | printf("Board Type = %ld\n", gd->board_type); | |
8f5d4687 | 415 | #endif |
7f7ddf2a SG |
416 | #ifdef CONFIG_SYS_MALLOC_F |
417 | printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr, | |
418 | CONFIG_SYS_MALLOC_F_LEN); | |
419 | #endif | |
420 | ||
8bde7f77 WD |
421 | return 0; |
422 | } | |
423 | ||
ebd0d062 NI |
424 | #elif defined(CONFIG_SH) |
425 | ||
5902e8f7 | 426 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
ebd0d062 NI |
427 | { |
428 | bd_t *bd = gd->bd; | |
12feb364 MF |
429 | |
430 | print_bi_mem(bd); | |
f80e5359 | 431 | print_bi_flash(bd); |
8752e260 | 432 | print_eth_ip_addr(); |
8e261575 | 433 | printf("baudrate = %u bps\n", gd->baudrate); |
ebd0d062 NI |
434 | return 0; |
435 | } | |
436 | ||
a806ee6f GR |
437 | #elif defined(CONFIG_X86) |
438 | ||
5902e8f7 | 439 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
a806ee6f | 440 | { |
a806ee6f | 441 | bd_t *bd = gd->bd; |
a806ee6f | 442 | |
171e5396 | 443 | print_bi_boot_params(bd); |
5902e8f7 ML |
444 | print_num("bi_memstart", bd->bi_memstart); |
445 | print_num("bi_memsize", bd->bi_memsize); | |
446 | print_num("bi_flashstart", bd->bi_flashstart); | |
447 | print_num("bi_flashsize", bd->bi_flashsize); | |
448 | print_num("bi_flashoffset", bd->bi_flashoffset); | |
449 | print_num("bi_sramstart", bd->bi_sramstart); | |
450 | print_num("bi_sramsize", bd->bi_sramsize); | |
451 | print_num("bi_bootflags", bd->bi_bootflags); | |
0c277ef9 TT |
452 | print_mhz("cpufreq", bd->bi_intfreq); |
453 | print_mhz("busfreq", bd->bi_busfreq); | |
5902e8f7 | 454 | |
fd60e99f | 455 | print_bi_dram(bd); |
a806ee6f GR |
456 | |
457 | #if defined(CONFIG_CMD_NET) | |
8752e260 | 458 | print_eth_ip_addr(); |
0c277ef9 | 459 | print_mhz("ethspeed", bd->bi_ethspeed); |
a806ee6f | 460 | #endif |
8e261575 | 461 | printf("baudrate = %u bps\n", gd->baudrate); |
a806ee6f GR |
462 | |
463 | return 0; | |
464 | } | |
465 | ||
6fcc3be4 SG |
466 | #elif defined(CONFIG_SANDBOX) |
467 | ||
468 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
469 | { | |
6fcc3be4 SG |
470 | bd_t *bd = gd->bd; |
471 | ||
171e5396 | 472 | print_bi_boot_params(bd); |
fd60e99f | 473 | print_bi_dram(bd); |
8752e260 | 474 | print_eth_ip_addr(); |
6fcc3be4 | 475 | |
c8fcd0f2 | 476 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
6fcc3be4 | 477 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 478 | #endif |
6fcc3be4 SG |
479 | return 0; |
480 | } | |
481 | ||
64d61461 ML |
482 | #elif defined(CONFIG_NDS32) |
483 | ||
484 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
485 | { | |
64d61461 ML |
486 | bd_t *bd = gd->bd; |
487 | ||
488 | print_num("arch_number", bd->bi_arch_number); | |
171e5396 | 489 | print_bi_boot_params(bd); |
fd60e99f | 490 | print_bi_dram(bd); |
8752e260 | 491 | print_eth_ip_addr(); |
8e261575 | 492 | printf("baudrate = %u bps\n", gd->baudrate); |
64d61461 ML |
493 | |
494 | return 0; | |
495 | } | |
496 | ||
2be9fdbf SK |
497 | #elif defined(CONFIG_OPENRISC) |
498 | ||
499 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
500 | { | |
501 | bd_t *bd = gd->bd; | |
502 | ||
12feb364 | 503 | print_bi_mem(bd); |
f80e5359 | 504 | print_bi_flash(bd); |
8752e260 | 505 | print_eth_ip_addr(); |
8e261575 | 506 | printf("baudrate = %u bps\n", gd->baudrate); |
2be9fdbf SK |
507 | |
508 | return 0; | |
509 | } | |
510 | ||
946f6f24 | 511 | #elif defined(CONFIG_ARC) |
bc5d5428 AB |
512 | |
513 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
514 | { | |
515 | bd_t *bd = gd->bd; | |
516 | ||
12feb364 | 517 | print_bi_mem(bd); |
8752e260 | 518 | print_eth_ip_addr(); |
8e261575 | 519 | printf("baudrate = %d bps\n", gd->baudrate); |
bc5d5428 AB |
520 | |
521 | return 0; | |
522 | } | |
523 | ||
c99ea790 RM |
524 | #else |
525 | #error "a case for this architecture does not exist!" | |
526 | #endif | |
8bde7f77 | 527 | |
8bde7f77 WD |
528 | /* -------------------------------------------------------------------- */ |
529 | ||
0d498393 WD |
530 | U_BOOT_CMD( |
531 | bdinfo, 1, 1, do_bdinfo, | |
2fb2604d | 532 | "print Board Info structure", |
a89c33db | 533 | "" |
8bde7f77 | 534 | ); |