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Commit | Line | Data |
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8bde7f77 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
8bde7f77 WD |
6 | */ |
7 | ||
8 | /* | |
9 | * Boot support | |
10 | */ | |
11 | #include <common.h> | |
12 | #include <command.h> | |
d88af4da | 13 | #include <linux/compiler.h> |
8bde7f77 | 14 | |
d87080b7 | 15 | DECLARE_GLOBAL_DATA_PTR; |
8bde7f77 | 16 | |
d88af4da MF |
17 | __maybe_unused |
18 | static void print_num(const char *name, ulong value) | |
19 | { | |
20 | printf("%-12s= 0x%08lX\n", name, value); | |
21 | } | |
8bde7f77 | 22 | |
5f3dfadc | 23 | __maybe_unused |
d88af4da MF |
24 | static void print_eth(int idx) |
25 | { | |
26 | char name[10], *val; | |
27 | if (idx) | |
28 | sprintf(name, "eth%iaddr", idx); | |
29 | else | |
30 | strcpy(name, "ethaddr"); | |
31 | val = getenv(name); | |
32 | if (!val) | |
33 | val = "(not set)"; | |
34 | printf("%-12s= %s\n", name, val); | |
35 | } | |
de2dff6f | 36 | |
05c3e68f | 37 | #ifndef CONFIG_DM_ETH |
9fc6a06a MS |
38 | __maybe_unused |
39 | static void print_eths(void) | |
40 | { | |
41 | struct eth_device *dev; | |
42 | int i = 0; | |
43 | ||
44 | do { | |
45 | dev = eth_get_dev_by_index(i); | |
46 | if (dev) { | |
47 | printf("eth%dname = %s\n", i, dev->name); | |
48 | print_eth(i); | |
49 | i++; | |
50 | } | |
51 | } while (dev); | |
52 | ||
53 | printf("current eth = %s\n", eth_get_name()); | |
54 | printf("ip_addr = %s\n", getenv("ipaddr")); | |
55 | } | |
05c3e68f | 56 | #endif |
9fc6a06a | 57 | |
d88af4da | 58 | __maybe_unused |
47708457 | 59 | static void print_lnum(const char *name, unsigned long long value) |
d88af4da MF |
60 | { |
61 | printf("%-12s= 0x%.8llX\n", name, value); | |
62 | } | |
63 | ||
64 | __maybe_unused | |
65 | static void print_mhz(const char *name, unsigned long hz) | |
66 | { | |
67 | char buf[32]; | |
68 | ||
69 | printf("%-12s= %6s MHz\n", name, strmhz(buf, hz)); | |
70 | } | |
8bde7f77 | 71 | |
171e5396 MF |
72 | |
73 | static inline void print_bi_boot_params(const bd_t *bd) | |
74 | { | |
75 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
76 | } | |
77 | ||
12feb364 MF |
78 | static inline void print_bi_mem(const bd_t *bd) |
79 | { | |
80 | #if defined(CONFIG_SH) | |
81 | print_num("mem start ", (ulong)bd->bi_memstart); | |
82 | print_lnum("mem size ", (u64)bd->bi_memsize); | |
83 | #elif defined(CONFIG_ARC) | |
84 | print_num("mem start", (ulong)bd->bi_memstart); | |
85 | print_lnum("mem size", (u64)bd->bi_memsize); | |
86 | #elif defined(CONFIG_AVR32) | |
87 | print_num("memstart", (ulong)bd->bi_dram[0].start); | |
88 | print_lnum("memsize", (u64)bd->bi_dram[0].size); | |
89 | #else | |
90 | print_num("memstart", (ulong)bd->bi_memstart); | |
91 | print_lnum("memsize", (u64)bd->bi_memsize); | |
92 | #endif | |
93 | } | |
94 | ||
fd60e99f MF |
95 | static inline void print_bi_dram(const bd_t *bd) |
96 | { | |
97 | #ifdef CONFIG_NR_DRAM_BANKS | |
98 | int i; | |
99 | ||
100 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
101 | print_num("DRAM bank", i); | |
102 | print_num("-> start", bd->bi_dram[i].start); | |
103 | print_num("-> size", bd->bi_dram[i].size); | |
104 | } | |
105 | #endif | |
106 | } | |
107 | ||
c99ea790 | 108 | #if defined(CONFIG_PPC) |
e7939464 YS |
109 | void __weak board_detail(void) |
110 | { | |
111 | /* Please define boot_detail() for your platform */ | |
112 | } | |
8bde7f77 | 113 | |
5902e8f7 | 114 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 115 | { |
8bde7f77 | 116 | bd_t *bd = gd->bd; |
8bde7f77 WD |
117 | |
118 | #ifdef DEBUG | |
5902e8f7 ML |
119 | print_num("bd address", (ulong)bd); |
120 | #endif | |
12feb364 | 121 | print_bi_mem(bd); |
5902e8f7 ML |
122 | print_num("flashstart", bd->bi_flashstart); |
123 | print_num("flashsize", bd->bi_flashsize); | |
124 | print_num("flashoffset", bd->bi_flashoffset); | |
125 | print_num("sramstart", bd->bi_sramstart); | |
126 | print_num("sramsize", bd->bi_sramsize); | |
127 | #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \ | |
58dac327 | 128 | defined(CONFIG_MPC8260) || defined(CONFIG_E500) |
5902e8f7 ML |
129 | print_num("immr_base", bd->bi_immr_base); |
130 | #endif | |
131 | print_num("bootflags", bd->bi_bootflags); | |
3fb85889 | 132 | #if defined(CONFIG_405EP) || \ |
5902e8f7 ML |
133 | defined(CONFIG_405GP) || \ |
134 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
135 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
136 | defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ | |
137 | defined(CONFIG_XILINX_405) | |
0c277ef9 TT |
138 | print_mhz("procfreq", bd->bi_procfreq); |
139 | print_mhz("plb_busfreq", bd->bi_plb_busfreq); | |
5902e8f7 ML |
140 | #if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \ |
141 | defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ | |
142 | defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ | |
143 | defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405) | |
0c277ef9 | 144 | print_mhz("pci_busfreq", bd->bi_pci_busfreq); |
8bde7f77 | 145 | #endif |
3fb85889 | 146 | #else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
9c4c5ae3 | 147 | #if defined(CONFIG_CPM2) |
0c277ef9 TT |
148 | print_mhz("vco", bd->bi_vco); |
149 | print_mhz("sccfreq", bd->bi_sccfreq); | |
150 | print_mhz("brgfreq", bd->bi_brgfreq); | |
8bde7f77 | 151 | #endif |
0c277ef9 | 152 | print_mhz("intfreq", bd->bi_intfreq); |
9c4c5ae3 | 153 | #if defined(CONFIG_CPM2) |
0c277ef9 | 154 | print_mhz("cpmfreq", bd->bi_cpmfreq); |
8bde7f77 | 155 | #endif |
0c277ef9 | 156 | print_mhz("busfreq", bd->bi_busfreq); |
3fb85889 | 157 | #endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ |
03f5c550 | 158 | |
34e210f5 TT |
159 | #ifdef CONFIG_ENABLE_36BIT_PHYS |
160 | #ifdef CONFIG_PHYS_64BIT | |
161 | puts("addressing = 36-bit\n"); | |
162 | #else | |
163 | puts("addressing = 32-bit\n"); | |
164 | #endif | |
165 | #endif | |
166 | ||
de2dff6f | 167 | print_eth(0); |
e2ffd59b | 168 | #if defined(CONFIG_HAS_ETH1) |
de2dff6f | 169 | print_eth(1); |
03f5c550 | 170 | #endif |
e2ffd59b | 171 | #if defined(CONFIG_HAS_ETH2) |
de2dff6f | 172 | print_eth(2); |
42d1f039 | 173 | #endif |
e2ffd59b | 174 | #if defined(CONFIG_HAS_ETH3) |
de2dff6f | 175 | print_eth(3); |
03f5c550 | 176 | #endif |
c68a05fe | 177 | #if defined(CONFIG_HAS_ETH4) |
de2dff6f | 178 | print_eth(4); |
c68a05fe | 179 | #endif |
c68a05fe | 180 | #if defined(CONFIG_HAS_ETH5) |
de2dff6f | 181 | print_eth(5); |
c68a05fe | 182 | #endif |
183 | ||
50a47d05 | 184 | printf("IP addr = %s\n", getenv("ipaddr")); |
8e261575 | 185 | printf("baudrate = %6u bps\n", gd->baudrate); |
5902e8f7 | 186 | print_num("relocaddr", gd->relocaddr); |
e7939464 | 187 | board_detail(); |
8bde7f77 WD |
188 | return 0; |
189 | } | |
190 | ||
c99ea790 | 191 | #elif defined(CONFIG_NIOS2) |
5c952cf0 | 192 | |
5902e8f7 | 193 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
5c952cf0 | 194 | { |
5c952cf0 WD |
195 | bd_t *bd = gd->bd; |
196 | ||
fd60e99f | 197 | print_bi_dram(bd); |
5902e8f7 ML |
198 | print_num("flash start", (ulong)bd->bi_flashstart); |
199 | print_num("flash size", (ulong)bd->bi_flashsize); | |
200 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
5c952cf0 | 201 | |
6d0f6bcf | 202 | #if defined(CONFIG_SYS_SRAM_BASE) |
5c952cf0 WD |
203 | print_num ("sram start", (ulong)bd->bi_sramstart); |
204 | print_num ("sram size", (ulong)bd->bi_sramsize); | |
205 | #endif | |
206 | ||
90253178 | 207 | #if defined(CONFIG_CMD_NET) |
de2dff6f | 208 | print_eth(0); |
50a47d05 | 209 | printf("ip_addr = %s\n", getenv("ipaddr")); |
5c952cf0 WD |
210 | #endif |
211 | ||
8e261575 | 212 | printf("baudrate = %u bps\n", gd->baudrate); |
5c952cf0 WD |
213 | |
214 | return 0; | |
215 | } | |
c99ea790 RM |
216 | |
217 | #elif defined(CONFIG_MICROBLAZE) | |
cfc67116 | 218 | |
5902e8f7 | 219 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
cfc67116 | 220 | { |
cfc67116 | 221 | bd_t *bd = gd->bd; |
e945f6dc | 222 | |
fd60e99f | 223 | print_bi_dram(bd); |
5902e8f7 ML |
224 | print_num("flash start ", (ulong)bd->bi_flashstart); |
225 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
226 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
6d0f6bcf | 227 | #if defined(CONFIG_SYS_SRAM_BASE) |
5902e8f7 ML |
228 | print_num("sram start ", (ulong)bd->bi_sramstart); |
229 | print_num("sram size ", (ulong)bd->bi_sramsize); | |
cfc67116 | 230 | #endif |
062f078c | 231 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 232 | print_eths(); |
cfc67116 | 233 | #endif |
8e261575 | 234 | printf("baudrate = %u bps\n", gd->baudrate); |
e945f6dc MS |
235 | print_num("relocaddr", gd->relocaddr); |
236 | print_num("reloc off", gd->reloc_off); | |
de86765b MS |
237 | print_num("fdt_blob", (ulong)gd->fdt_blob); |
238 | print_num("new_fdt", (ulong)gd->new_fdt); | |
239 | print_num("fdt_size", (ulong)gd->fdt_size); | |
e945f6dc | 240 | |
cfc67116 MS |
241 | return 0; |
242 | } | |
4a551709 | 243 | |
c99ea790 RM |
244 | #elif defined(CONFIG_SPARC) |
245 | ||
54841ab5 | 246 | int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
00ab32c8 DH |
247 | { |
248 | bd_t *bd = gd->bd; | |
00ab32c8 DH |
249 | |
250 | #ifdef DEBUG | |
251 | print_num("bd address ", (ulong) bd); | |
252 | #endif | |
253 | print_num("memstart ", bd->bi_memstart); | |
b57ca3e1 | 254 | print_lnum("memsize ", bd->bi_memsize); |
00ab32c8 | 255 | print_num("flashstart ", bd->bi_flashstart); |
6d0f6bcf | 256 | print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE); |
0e8d1586 | 257 | print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR); |
d97f01a6 | 258 | printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE, |
6d0f6bcf | 259 | CONFIG_SYS_MONITOR_LEN); |
d97f01a6 | 260 | printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE, |
6d0f6bcf | 261 | CONFIG_SYS_MALLOC_LEN); |
d97f01a6 | 262 | printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET, |
6d0f6bcf | 263 | CONFIG_SYS_STACK_SIZE); |
d97f01a6 | 264 | printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET, |
6d0f6bcf | 265 | CONFIG_SYS_PROM_SIZE); |
d97f01a6 | 266 | printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET, |
25ddd1fb | 267 | GENERATED_GBL_DATA_SIZE); |
00ab32c8 DH |
268 | |
269 | #if defined(CONFIG_CMD_NET) | |
de2dff6f | 270 | print_eth(0); |
50a47d05 | 271 | printf("ip_addr = %s\n", getenv("ipaddr")); |
00ab32c8 | 272 | #endif |
8e261575 | 273 | printf("baudrate = %6u bps\n", gd->baudrate); |
00ab32c8 DH |
274 | return 0; |
275 | } | |
276 | ||
c99ea790 RM |
277 | #elif defined(CONFIG_M68K) |
278 | ||
5902e8f7 | 279 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8e585f02 | 280 | { |
8e585f02 | 281 | bd_t *bd = gd->bd; |
8ae158cd | 282 | |
12feb364 | 283 | print_bi_mem(bd); |
5902e8f7 ML |
284 | print_num("flashstart", (ulong)bd->bi_flashstart); |
285 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
286 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
6d0f6bcf | 287 | #if defined(CONFIG_SYS_INIT_RAM_ADDR) |
5902e8f7 ML |
288 | print_num("sramstart", (ulong)bd->bi_sramstart); |
289 | print_num("sramsize", (ulong)bd->bi_sramsize); | |
8e585f02 | 290 | #endif |
6d0f6bcf | 291 | #if defined(CONFIG_SYS_MBAR) |
5902e8f7 | 292 | print_num("mbar", bd->bi_mbar_base); |
8e585f02 | 293 | #endif |
0c277ef9 TT |
294 | print_mhz("cpufreq", bd->bi_intfreq); |
295 | print_mhz("busfreq", bd->bi_busfreq); | |
8ae158cd | 296 | #ifdef CONFIG_PCI |
0c277ef9 | 297 | print_mhz("pcifreq", bd->bi_pcifreq); |
8ae158cd TL |
298 | #endif |
299 | #ifdef CONFIG_EXTRA_CLOCK | |
0c277ef9 TT |
300 | print_mhz("flbfreq", bd->bi_flbfreq); |
301 | print_mhz("inpfreq", bd->bi_inpfreq); | |
302 | print_mhz("vcofreq", bd->bi_vcofreq); | |
8ae158cd | 303 | #endif |
26667b7f | 304 | #if defined(CONFIG_CMD_NET) |
de2dff6f | 305 | print_eth(0); |
8e585f02 | 306 | #if defined(CONFIG_HAS_ETH1) |
de2dff6f | 307 | print_eth(1); |
8e585f02 | 308 | #endif |
8e585f02 | 309 | #if defined(CONFIG_HAS_ETH2) |
de2dff6f | 310 | print_eth(2); |
8e585f02 | 311 | #endif |
8e585f02 | 312 | #if defined(CONFIG_HAS_ETH3) |
de2dff6f | 313 | print_eth(3); |
8e585f02 TL |
314 | #endif |
315 | ||
50a47d05 | 316 | printf("ip_addr = %s\n", getenv("ipaddr")); |
26667b7f | 317 | #endif |
8e261575 | 318 | printf("baudrate = %u bps\n", gd->baudrate); |
8e585f02 TL |
319 | |
320 | return 0; | |
321 | } | |
322 | ||
8dc48d71 | 323 | #elif defined(CONFIG_BLACKFIN) |
c99ea790 | 324 | |
54841ab5 | 325 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8dc48d71 | 326 | { |
8dc48d71 MF |
327 | bd_t *bd = gd->bd; |
328 | ||
329 | printf("U-Boot = %s\n", bd->bi_r_version); | |
330 | printf("CPU = %s\n", bd->bi_cpu); | |
331 | printf("Board = %s\n", bd->bi_board_name); | |
0c277ef9 TT |
332 | print_mhz("VCO", bd->bi_vco); |
333 | print_mhz("CCLK", bd->bi_cclk); | |
334 | print_mhz("SCLK", bd->bi_sclk); | |
8dc48d71 | 335 | |
171e5396 | 336 | print_bi_boot_params(bd); |
12feb364 | 337 | print_bi_mem(bd); |
5902e8f7 ML |
338 | print_num("flashstart", (ulong)bd->bi_flashstart); |
339 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
340 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
8dc48d71 | 341 | |
de2dff6f | 342 | print_eth(0); |
50a47d05 | 343 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 344 | printf("baudrate = %u bps\n", gd->baudrate); |
8dc48d71 MF |
345 | |
346 | return 0; | |
347 | } | |
348 | ||
c99ea790 | 349 | #elif defined(CONFIG_MIPS) |
8bde7f77 | 350 | |
5902e8f7 | 351 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 352 | { |
8bde7f77 WD |
353 | bd_t *bd = gd->bd; |
354 | ||
171e5396 | 355 | print_bi_boot_params(bd); |
12feb364 | 356 | print_bi_mem(bd); |
5902e8f7 ML |
357 | print_num("flashstart", (ulong)bd->bi_flashstart); |
358 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
359 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
8bde7f77 | 360 | |
de2dff6f | 361 | print_eth(0); |
50a47d05 | 362 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 363 | printf("baudrate = %u bps\n", gd->baudrate); |
8cf7a418 TC |
364 | print_num("relocaddr", gd->relocaddr); |
365 | print_num("reloc off", gd->reloc_off); | |
8bde7f77 WD |
366 | |
367 | return 0; | |
368 | } | |
8bde7f77 | 369 | |
c99ea790 RM |
370 | #elif defined(CONFIG_AVR32) |
371 | ||
5902e8f7 | 372 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
c99ea790 RM |
373 | { |
374 | bd_t *bd = gd->bd; | |
375 | ||
171e5396 | 376 | print_bi_boot_params(bd); |
12feb364 | 377 | print_bi_mem(bd); |
5902e8f7 ML |
378 | print_num("flashstart", (ulong)bd->bi_flashstart); |
379 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
380 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
c99ea790 RM |
381 | |
382 | print_eth(0); | |
50a47d05 | 383 | printf("ip_addr = %s\n", getenv("ipaddr")); |
8e261575 | 384 | printf("baudrate = %u bps\n", gd->baudrate); |
c99ea790 RM |
385 | |
386 | return 0; | |
387 | } | |
388 | ||
389 | #elif defined(CONFIG_ARM) | |
8bde7f77 | 390 | |
0e350f81 JH |
391 | static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, |
392 | char * const argv[]) | |
8bde7f77 | 393 | { |
8bde7f77 WD |
394 | bd_t *bd = gd->bd; |
395 | ||
5902e8f7 | 396 | print_num("arch_number", bd->bi_arch_number); |
171e5396 | 397 | print_bi_boot_params(bd); |
fd60e99f | 398 | print_bi_dram(bd); |
8bde7f77 | 399 | |
e8149522 | 400 | #ifdef CONFIG_SYS_MEM_RESERVE_SECURE |
e61a7534 | 401 | if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) { |
e8149522 | 402 | print_num("Secure ram", |
e61a7534 | 403 | gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK); |
e8149522 YS |
404 | } |
405 | #endif | |
ff973800 | 406 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 407 | print_eths(); |
a41dbbd9 | 408 | #endif |
8e261575 | 409 | printf("baudrate = %u bps\n", gd->baudrate); |
e47f2db5 | 410 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) |
34fd5d25 | 411 | print_num("TLB addr", gd->arch.tlb_addr); |
f1d2b313 | 412 | #endif |
5902e8f7 ML |
413 | print_num("relocaddr", gd->relocaddr); |
414 | print_num("reloc off", gd->reloc_off); | |
415 | print_num("irq_sp", gd->irq_sp); /* irq stack pointer */ | |
416 | print_num("sp start ", gd->start_addr_sp); | |
c8fcd0f2 | 417 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
5902e8f7 | 418 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 419 | #endif |
8f5d4687 HM |
420 | /* |
421 | * TODO: Currently only support for davinci SOC's is added. | |
422 | * Remove this check once all the board implement this. | |
423 | */ | |
424 | #ifdef CONFIG_CLOCKS | |
425 | printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq); | |
426 | printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq); | |
427 | printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq); | |
7bb7d672 HS |
428 | #endif |
429 | #ifdef CONFIG_BOARD_TYPES | |
430 | printf("Board Type = %ld\n", gd->board_type); | |
8f5d4687 | 431 | #endif |
7f7ddf2a SG |
432 | #ifdef CONFIG_SYS_MALLOC_F |
433 | printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr, | |
434 | CONFIG_SYS_MALLOC_F_LEN); | |
435 | #endif | |
436 | ||
8bde7f77 WD |
437 | return 0; |
438 | } | |
439 | ||
ebd0d062 NI |
440 | #elif defined(CONFIG_SH) |
441 | ||
5902e8f7 | 442 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
ebd0d062 NI |
443 | { |
444 | bd_t *bd = gd->bd; | |
12feb364 MF |
445 | |
446 | print_bi_mem(bd); | |
5902e8f7 ML |
447 | print_num("flash start ", (ulong)bd->bi_flashstart); |
448 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
449 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
ebd0d062 NI |
450 | |
451 | #if defined(CONFIG_CMD_NET) | |
452 | print_eth(0); | |
50a47d05 | 453 | printf("ip_addr = %s\n", getenv("ipaddr")); |
ebd0d062 | 454 | #endif |
8e261575 | 455 | printf("baudrate = %u bps\n", gd->baudrate); |
ebd0d062 NI |
456 | return 0; |
457 | } | |
458 | ||
a806ee6f GR |
459 | #elif defined(CONFIG_X86) |
460 | ||
5902e8f7 | 461 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
a806ee6f | 462 | { |
a806ee6f | 463 | bd_t *bd = gd->bd; |
a806ee6f | 464 | |
171e5396 | 465 | print_bi_boot_params(bd); |
5902e8f7 ML |
466 | print_num("bi_memstart", bd->bi_memstart); |
467 | print_num("bi_memsize", bd->bi_memsize); | |
468 | print_num("bi_flashstart", bd->bi_flashstart); | |
469 | print_num("bi_flashsize", bd->bi_flashsize); | |
470 | print_num("bi_flashoffset", bd->bi_flashoffset); | |
471 | print_num("bi_sramstart", bd->bi_sramstart); | |
472 | print_num("bi_sramsize", bd->bi_sramsize); | |
473 | print_num("bi_bootflags", bd->bi_bootflags); | |
0c277ef9 TT |
474 | print_mhz("cpufreq", bd->bi_intfreq); |
475 | print_mhz("busfreq", bd->bi_busfreq); | |
5902e8f7 | 476 | |
fd60e99f | 477 | print_bi_dram(bd); |
a806ee6f GR |
478 | |
479 | #if defined(CONFIG_CMD_NET) | |
480 | print_eth(0); | |
50a47d05 | 481 | printf("ip_addr = %s\n", getenv("ipaddr")); |
0c277ef9 | 482 | print_mhz("ethspeed", bd->bi_ethspeed); |
a806ee6f | 483 | #endif |
8e261575 | 484 | printf("baudrate = %u bps\n", gd->baudrate); |
a806ee6f GR |
485 | |
486 | return 0; | |
487 | } | |
488 | ||
6fcc3be4 SG |
489 | #elif defined(CONFIG_SANDBOX) |
490 | ||
491 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
492 | { | |
6fcc3be4 SG |
493 | bd_t *bd = gd->bd; |
494 | ||
171e5396 | 495 | print_bi_boot_params(bd); |
fd60e99f | 496 | print_bi_dram(bd); |
6fcc3be4 SG |
497 | |
498 | #if defined(CONFIG_CMD_NET) | |
499 | print_eth(0); | |
50a47d05 | 500 | printf("ip_addr = %s\n", getenv("ipaddr")); |
6fcc3be4 | 501 | #endif |
c8fcd0f2 | 502 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
6fcc3be4 | 503 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 504 | #endif |
6fcc3be4 SG |
505 | return 0; |
506 | } | |
507 | ||
64d61461 ML |
508 | #elif defined(CONFIG_NDS32) |
509 | ||
510 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
511 | { | |
64d61461 ML |
512 | bd_t *bd = gd->bd; |
513 | ||
514 | print_num("arch_number", bd->bi_arch_number); | |
171e5396 | 515 | print_bi_boot_params(bd); |
fd60e99f | 516 | print_bi_dram(bd); |
64d61461 ML |
517 | |
518 | #if defined(CONFIG_CMD_NET) | |
519 | print_eth(0); | |
50a47d05 | 520 | printf("ip_addr = %s\n", getenv("ipaddr")); |
64d61461 | 521 | #endif |
8e261575 | 522 | printf("baudrate = %u bps\n", gd->baudrate); |
64d61461 ML |
523 | |
524 | return 0; | |
525 | } | |
526 | ||
2be9fdbf SK |
527 | #elif defined(CONFIG_OPENRISC) |
528 | ||
529 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
530 | { | |
531 | bd_t *bd = gd->bd; | |
532 | ||
12feb364 | 533 | print_bi_mem(bd); |
2be9fdbf SK |
534 | print_num("flash start", (ulong)bd->bi_flashstart); |
535 | print_num("flash size", (ulong)bd->bi_flashsize); | |
536 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
537 | ||
538 | #if defined(CONFIG_CMD_NET) | |
539 | print_eth(0); | |
50a47d05 | 540 | printf("ip_addr = %s\n", getenv("ipaddr")); |
2be9fdbf SK |
541 | #endif |
542 | ||
8e261575 | 543 | printf("baudrate = %u bps\n", gd->baudrate); |
2be9fdbf SK |
544 | |
545 | return 0; | |
546 | } | |
547 | ||
946f6f24 | 548 | #elif defined(CONFIG_ARC) |
bc5d5428 AB |
549 | |
550 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
551 | { | |
552 | bd_t *bd = gd->bd; | |
553 | ||
12feb364 | 554 | print_bi_mem(bd); |
bc5d5428 AB |
555 | |
556 | #if defined(CONFIG_CMD_NET) | |
557 | print_eth(0); | |
558 | printf("ip_addr = %s\n", getenv("ipaddr")); | |
559 | #endif | |
8e261575 | 560 | printf("baudrate = %d bps\n", gd->baudrate); |
bc5d5428 AB |
561 | |
562 | return 0; | |
563 | } | |
564 | ||
c99ea790 RM |
565 | #else |
566 | #error "a case for this architecture does not exist!" | |
567 | #endif | |
8bde7f77 | 568 | |
8bde7f77 WD |
569 | /* -------------------------------------------------------------------- */ |
570 | ||
0d498393 WD |
571 | U_BOOT_CMD( |
572 | bdinfo, 1, 1, do_bdinfo, | |
2fb2604d | 573 | "print Board Info structure", |
a89c33db | 574 | "" |
8bde7f77 | 575 | ); |