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8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Boot support
26 */
27#include <common.h>
28#include <command.h>
29
d87080b7 30DECLARE_GLOBAL_DATA_PTR;
8bde7f77 31
8bde7f77
WD
32static void print_num(const char *, ulong);
33
116095eb 34#if !(defined(CONFIG_ARM) || defined(CONFIG_M68K)) || defined(CONFIG_CMD_NET)
de2dff6f 35static void print_eth(int idx);
26e42cbd 36#endif
de2dff6f 37
a806ee6f 38#if (!defined(CONFIG_ARM) && !defined(CONFIG_X86))
b57ca3e1 39static void print_lnum(const char *, u64);
c99ea790 40#endif
8bde7f77 41
c99ea790 42#if defined(CONFIG_PPC)
8bde7f77
WD
43static void print_str(const char *, const char *);
44
5902e8f7 45int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 46{
8bde7f77
WD
47 bd_t *bd = gd->bd;
48 char buf[32];
49
50#ifdef DEBUG
5902e8f7
ML
51 print_num("bd address", (ulong)bd);
52#endif
53 print_num("memstart", bd->bi_memstart);
54 print_lnum("memsize", bd->bi_memsize);
55 print_num("flashstart", bd->bi_flashstart);
56 print_num("flashsize", bd->bi_flashsize);
57 print_num("flashoffset", bd->bi_flashoffset);
58 print_num("sramstart", bd->bi_sramstart);
59 print_num("sramsize", bd->bi_sramsize);
60#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
61 defined(CONFIG_8260) || defined(CONFIG_E500)
62 print_num("immr_base", bd->bi_immr_base);
63#endif
64 print_num("bootflags", bd->bi_bootflags);
65#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
66 defined(CONFIG_405GP) || \
67 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
68 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
69 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
70 defined(CONFIG_XILINX_405)
71 print_str("procfreq", strmhz(buf, bd->bi_procfreq));
72 print_str("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq));
73#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
74 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
75 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
76 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
77 print_str("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq));
8bde7f77 78#endif
9fea65a6 79#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 80#if defined(CONFIG_CPM2)
5902e8f7
ML
81 print_str("vco", strmhz(buf, bd->bi_vco));
82 print_str("sccfreq", strmhz(buf, bd->bi_sccfreq));
83 print_str("brgfreq", strmhz(buf, bd->bi_brgfreq));
8bde7f77 84#endif
5902e8f7 85 print_str("intfreq", strmhz(buf, bd->bi_intfreq));
9c4c5ae3 86#if defined(CONFIG_CPM2)
5902e8f7 87 print_str("cpmfreq", strmhz(buf, bd->bi_cpmfreq));
8bde7f77 88#endif
5902e8f7 89 print_str("busfreq", strmhz(buf, bd->bi_busfreq));
9fea65a6 90#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
983fda83 91#if defined(CONFIG_MPC8220)
5902e8f7
ML
92 print_str("inpfreq", strmhz(buf, bd->bi_inpfreq));
93 print_str("flbfreq", strmhz(buf, bd->bi_flbfreq));
94 print_str("pcifreq", strmhz(buf, bd->bi_pcifreq));
95 print_str("vcofreq", strmhz(buf, bd->bi_vcofreq));
96 print_str("pevfreq", strmhz(buf, bd->bi_pevfreq));
983fda83 97#endif
03f5c550 98
de2dff6f 99 print_eth(0);
e2ffd59b 100#if defined(CONFIG_HAS_ETH1)
de2dff6f 101 print_eth(1);
03f5c550 102#endif
e2ffd59b 103#if defined(CONFIG_HAS_ETH2)
de2dff6f 104 print_eth(2);
42d1f039 105#endif
e2ffd59b 106#if defined(CONFIG_HAS_ETH3)
de2dff6f 107 print_eth(3);
03f5c550 108#endif
c68a05fe 109#if defined(CONFIG_HAS_ETH4)
de2dff6f 110 print_eth(4);
c68a05fe 111#endif
c68a05fe 112#if defined(CONFIG_HAS_ETH5)
de2dff6f 113 print_eth(5);
c68a05fe 114#endif
115
8bde7f77 116#ifdef CONFIG_HERMES
5902e8f7 117 print_str("ethspeed", strmhz(buf, bd->bi_ethspeed));
8bde7f77 118#endif
5902e8f7
ML
119 printf("IP addr = %pI4\n", &bd->bi_ip_addr);
120 printf("baudrate = %6ld bps\n", bd->bi_baudrate);
121 print_num("relocaddr", gd->relocaddr);
8bde7f77
WD
122 return 0;
123}
124
c99ea790 125#elif defined(CONFIG_NIOS2)
5c952cf0 126
5902e8f7 127int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 128{
5c952cf0
WD
129 bd_t *bd = gd->bd;
130
5902e8f7
ML
131 print_num("mem start", (ulong)bd->bi_memstart);
132 print_lnum("mem size", (u64)bd->bi_memsize);
133 print_num("flash start", (ulong)bd->bi_flashstart);
134 print_num("flash size", (ulong)bd->bi_flashsize);
135 print_num("flash offset", (ulong)bd->bi_flashoffset);
5c952cf0 136
6d0f6bcf 137#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
138 print_num ("sram start", (ulong)bd->bi_sramstart);
139 print_num ("sram size", (ulong)bd->bi_sramsize);
140#endif
141
90253178 142#if defined(CONFIG_CMD_NET)
de2dff6f 143 print_eth(0);
5902e8f7 144 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
5c952cf0
WD
145#endif
146
5902e8f7 147 printf("baudrate = %ld bps\n", bd->bi_baudrate);
5c952cf0
WD
148
149 return 0;
150}
c99ea790
RM
151
152#elif defined(CONFIG_MICROBLAZE)
cfc67116 153
5902e8f7 154int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 155{
cfc67116 156 bd_t *bd = gd->bd;
5902e8f7
ML
157 print_num("mem start ", (ulong)bd->bi_memstart);
158 print_lnum("mem size ", (u64)bd->bi_memsize);
159 print_num("flash start ", (ulong)bd->bi_flashstart);
160 print_num("flash size ", (ulong)bd->bi_flashsize);
161 print_num("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 162#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
163 print_num("sram start ", (ulong)bd->bi_sramstart);
164 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 165#endif
90253178 166#if defined(CONFIG_CMD_NET)
de2dff6f 167 print_eth(0);
5902e8f7 168 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
cfc67116 169#endif
5902e8f7 170 printf("baudrate = %ld bps\n", (ulong)bd->bi_baudrate);
cfc67116
MS
171 return 0;
172}
4a551709 173
c99ea790
RM
174#elif defined(CONFIG_SPARC)
175
54841ab5 176int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
177{
178 bd_t *bd = gd->bd;
00ab32c8
DH
179
180#ifdef DEBUG
181 print_num("bd address ", (ulong) bd);
182#endif
183 print_num("memstart ", bd->bi_memstart);
b57ca3e1 184 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 185 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 186 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 187 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
6d0f6bcf
JCPV
188 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%lx (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
189 CONFIG_SYS_MONITOR_LEN);
190 printf("CONFIG_SYS_MALLOC_BASE = 0x%lx (%d)\n", CONFIG_SYS_MALLOC_BASE,
191 CONFIG_SYS_MALLOC_LEN);
192 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
193 CONFIG_SYS_STACK_SIZE);
194 printf("CONFIG_SYS_PROM_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_PROM_OFFSET,
195 CONFIG_SYS_PROM_SIZE);
196 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 197 GENERATED_GBL_DATA_SIZE);
00ab32c8
DH
198
199#if defined(CONFIG_CMD_NET)
de2dff6f 200 print_eth(0);
b6446b67 201 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
00ab32c8 202#endif
b6446b67 203 printf("baudrate = %6ld bps\n", bd->bi_baudrate);
00ab32c8
DH
204 return 0;
205}
206
c99ea790
RM
207#elif defined(CONFIG_M68K)
208
8ae158cd 209static void print_str(const char *, const char *);
8e585f02 210
5902e8f7 211int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 212{
8e585f02 213 bd_t *bd = gd->bd;
8ae158cd
TL
214 char buf[32];
215
5902e8f7
ML
216 print_num("memstart", (ulong)bd->bi_memstart);
217 print_lnum("memsize", (u64)bd->bi_memsize);
218 print_num("flashstart", (ulong)bd->bi_flashstart);
219 print_num("flashsize", (ulong)bd->bi_flashsize);
220 print_num("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 221#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
222 print_num("sramstart", (ulong)bd->bi_sramstart);
223 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 224#endif
6d0f6bcf 225#if defined(CONFIG_SYS_MBAR)
5902e8f7 226 print_num("mbar", bd->bi_mbar_base);
8e585f02 227#endif
5902e8f7
ML
228 print_str("cpufreq", strmhz(buf, bd->bi_intfreq));
229 print_str("busfreq", strmhz(buf, bd->bi_busfreq));
8ae158cd 230#ifdef CONFIG_PCI
5902e8f7 231 print_str("pcifreq", strmhz(buf, bd->bi_pcifreq));
8ae158cd
TL
232#endif
233#ifdef CONFIG_EXTRA_CLOCK
5902e8f7
ML
234 print_str("flbfreq", strmhz(buf, bd->bi_flbfreq));
235 print_str("inpfreq", strmhz(buf, bd->bi_inpfreq));
236 print_str("vcofreq", strmhz(buf, bd->bi_vcofreq));
8ae158cd 237#endif
26667b7f 238#if defined(CONFIG_CMD_NET)
de2dff6f 239 print_eth(0);
8e585f02 240#if defined(CONFIG_HAS_ETH1)
de2dff6f 241 print_eth(1);
8e585f02 242#endif
8e585f02 243#if defined(CONFIG_HAS_ETH2)
de2dff6f 244 print_eth(2);
8e585f02 245#endif
8e585f02 246#if defined(CONFIG_HAS_ETH3)
de2dff6f 247 print_eth(3);
8e585f02
TL
248#endif
249
5902e8f7 250 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
26667b7f 251#endif
5902e8f7 252 printf("baudrate = %ld bps\n", bd->bi_baudrate);
8e585f02
TL
253
254 return 0;
255}
256
8dc48d71 257#elif defined(CONFIG_BLACKFIN)
c99ea790 258
6dadc919 259static void print_str(const char *, const char *);
8dc48d71 260
54841ab5 261int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 262{
8dc48d71 263 bd_t *bd = gd->bd;
6dadc919 264 char buf[32];
8dc48d71
MF
265
266 printf("U-Boot = %s\n", bd->bi_r_version);
267 printf("CPU = %s\n", bd->bi_cpu);
268 printf("Board = %s\n", bd->bi_board_name);
5902e8f7
ML
269 print_str("VCO", strmhz(buf, bd->bi_vco));
270 print_str("CCLK", strmhz(buf, bd->bi_cclk));
271 print_str("SCLK", strmhz(buf, bd->bi_sclk));
8dc48d71 272
5902e8f7
ML
273 print_num("boot_params", (ulong)bd->bi_boot_params);
274 print_num("memstart", (ulong)bd->bi_memstart);
275 print_lnum("memsize", (u64)bd->bi_memsize);
276 print_num("flashstart", (ulong)bd->bi_flashstart);
277 print_num("flashsize", (ulong)bd->bi_flashsize);
278 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8dc48d71 279
de2dff6f 280 print_eth(0);
b6446b67
MF
281 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
282 printf("baudrate = %d bps\n", bd->bi_baudrate);
8dc48d71
MF
283
284 return 0;
285}
286
c99ea790 287#elif defined(CONFIG_MIPS)
8bde7f77 288
5902e8f7 289int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 290{
8bde7f77
WD
291 bd_t *bd = gd->bd;
292
5902e8f7
ML
293 print_num("boot_params", (ulong)bd->bi_boot_params);
294 print_num("memstart", (ulong)bd->bi_memstart);
295 print_lnum("memsize", (u64)bd->bi_memsize);
296 print_num("flashstart", (ulong)bd->bi_flashstart);
297 print_num("flashsize", (ulong)bd->bi_flashsize);
298 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8bde7f77 299
de2dff6f 300 print_eth(0);
5902e8f7
ML
301 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
302 printf("baudrate = %d bps\n", bd->bi_baudrate);
8bde7f77
WD
303
304 return 0;
305}
8bde7f77 306
c99ea790
RM
307#elif defined(CONFIG_AVR32)
308
5902e8f7 309int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790
RM
310{
311 bd_t *bd = gd->bd;
312
5902e8f7
ML
313 print_num("boot_params", (ulong)bd->bi_boot_params);
314 print_num("memstart", (ulong)bd->bi_memstart);
315 print_lnum("memsize", (u64)bd->bi_memsize);
316 print_num("flashstart", (ulong)bd->bi_flashstart);
317 print_num("flashsize", (ulong)bd->bi_flashsize);
318 print_num("flashoffset", (ulong)bd->bi_flashoffset);
c99ea790
RM
319
320 print_eth(0);
5902e8f7
ML
321 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
322 printf("baudrate = %lu bps\n", bd->bi_baudrate);
c99ea790
RM
323
324 return 0;
325}
326
327#elif defined(CONFIG_ARM)
8bde7f77 328
5902e8f7 329int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 330{
8bde7f77
WD
331 int i;
332 bd_t *bd = gd->bd;
333
5902e8f7
ML
334 print_num("arch_number", bd->bi_arch_number);
335 print_num("boot_params", (ulong)bd->bi_boot_params);
8bde7f77 336
5902e8f7 337 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
8bde7f77
WD
338 print_num("DRAM bank", i);
339 print_num("-> start", bd->bi_dram[i].start);
340 print_num("-> size", bd->bi_dram[i].size);
341 }
342
a41dbbd9 343#if defined(CONFIG_CMD_NET)
de2dff6f 344 print_eth(0);
5902e8f7 345 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
a41dbbd9 346#endif
5902e8f7 347 printf("baudrate = %d bps\n", bd->bi_baudrate);
f1d2b313 348#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
5902e8f7 349 print_num("TLB addr", gd->tlb_addr);
f1d2b313 350#endif
5902e8f7
ML
351 print_num("relocaddr", gd->relocaddr);
352 print_num("reloc off", gd->reloc_off);
353 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
354 print_num("sp start ", gd->start_addr_sp);
355 print_num("FB base ", gd->fb_base);
8bde7f77
WD
356 return 0;
357}
358
ebd0d062
NI
359#elif defined(CONFIG_SH)
360
5902e8f7 361int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
362{
363 bd_t *bd = gd->bd;
5902e8f7
ML
364 print_num("mem start ", (ulong)bd->bi_memstart);
365 print_lnum("mem size ", (u64)bd->bi_memsize);
366 print_num("flash start ", (ulong)bd->bi_flashstart);
367 print_num("flash size ", (ulong)bd->bi_flashsize);
368 print_num("flash offset ", (ulong)bd->bi_flashoffset);
ebd0d062
NI
369
370#if defined(CONFIG_CMD_NET)
371 print_eth(0);
5902e8f7 372 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
ebd0d062 373#endif
5902e8f7 374 printf("baudrate = %ld bps\n", (ulong)bd->bi_baudrate);
ebd0d062
NI
375 return 0;
376}
377
a806ee6f
GR
378#elif defined(CONFIG_X86)
379
380static void print_str(const char *, const char *);
381
5902e8f7 382int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f
GR
383{
384 int i;
385 bd_t *bd = gd->bd;
386 char buf[32];
387
5902e8f7
ML
388 print_num("boot_params", (ulong)bd->bi_boot_params);
389 print_num("bi_memstart", bd->bi_memstart);
390 print_num("bi_memsize", bd->bi_memsize);
391 print_num("bi_flashstart", bd->bi_flashstart);
392 print_num("bi_flashsize", bd->bi_flashsize);
393 print_num("bi_flashoffset", bd->bi_flashoffset);
394 print_num("bi_sramstart", bd->bi_sramstart);
395 print_num("bi_sramsize", bd->bi_sramsize);
396 print_num("bi_bootflags", bd->bi_bootflags);
397 print_str("cpufreq", strmhz(buf, bd->bi_intfreq));
398 print_str("busfreq", strmhz(buf, bd->bi_busfreq));
399
400 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
a806ee6f
GR
401 print_num("DRAM bank", i);
402 print_num("-> start", bd->bi_dram[i].start);
403 print_num("-> size", bd->bi_dram[i].size);
404 }
405
406#if defined(CONFIG_CMD_NET)
407 print_eth(0);
5902e8f7
ML
408 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
409 print_str("ethspeed", strmhz(buf, bd->bi_ethspeed));
a806ee6f 410#endif
5902e8f7 411 printf("baudrate = %d bps\n", bd->bi_baudrate);
a806ee6f
GR
412
413 return 0;
414}
415
c99ea790
RM
416#else
417 #error "a case for this architecture does not exist!"
418#endif
8bde7f77
WD
419
420static void print_num(const char *name, ulong value)
421{
5902e8f7 422 printf("%-12s= 0x%08lX\n", name, value);
8bde7f77
WD
423}
424
116095eb 425#if !(defined(CONFIG_ARM) || defined(CONFIG_M68K)) || defined(CONFIG_CMD_NET)
de2dff6f
MF
426static void print_eth(int idx)
427{
428 char name[10], *val;
429 if (idx)
430 sprintf(name, "eth%iaddr", idx);
431 else
432 strcpy(name, "ethaddr");
433 val = getenv(name);
434 if (!val)
435 val = "(not set)";
436 printf("%-12s= %s\n", name, val);
437}
26e42cbd 438#endif
de2dff6f 439
a806ee6f 440#if (!defined(CONFIG_ARM) && !defined(CONFIG_X86))
b57ca3e1
BB
441static void print_lnum(const char *name, u64 value)
442{
5902e8f7 443 printf("%-12s= 0x%.8llX\n", name, value);
b57ca3e1
BB
444}
445#endif
446
5902e8f7
ML
447#if defined(CONFIG_PPC) || \
448 defined(CONFIG_M68K) || \
449 defined(CONFIG_BLACKFIN) || \
450 defined(CONFIG_X86)
8bde7f77
WD
451static void print_str(const char *name, const char *str)
452{
5902e8f7 453 printf("%-12s= %6s MHz\n", name, str);
8bde7f77
WD
454}
455#endif /* CONFIG_PPC */
456
457
458/* -------------------------------------------------------------------- */
459
0d498393
WD
460U_BOOT_CMD(
461 bdinfo, 1, 1, do_bdinfo,
2fb2604d 462 "print Board Info structure",
a89c33db 463 ""
8bde7f77 464);