[people/ms/u-boot.git] / common / cmd_eeprom.c

/*
 * (C) Copyright 2000, 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * Support for read and write access to EEPROM like memory devices. This
 * includes regular EEPROM as well as  FRAM (ferroelectic nonvolaile RAM).
 * FRAM devices read and write data at bus speed. In particular, there is no
 * write delay. Also, there is no limit imposed on the number of bytes that can
 * be transferred with a single read or write.
 *
 * Use the following configuration options to ensure no unneeded performance
 * degradation (typical for EEPROM) is incured for FRAM memory:
 *
 * #define CONFIG_SYS_I2C_FRAM
 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
 *
 */

#include <common.h>
#include <config.h>
#include <command.h>
#include <i2c.h>

#ifndef	CONFIG_SYS_I2C_SPEED
#define	CONFIG_SYS_I2C_SPEED	50000
#endif

#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	0
#endif

#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	8
#endif

#define	EEPROM_PAGE_SIZE	(1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
#define	EEPROM_PAGE_OFFSET(x)	((x) & (EEPROM_PAGE_SIZE - 1))

/*
 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
 *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
 *
 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
 *   0x00000nxx for EEPROM address selectors and page number at n.
 */
#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \
	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \
	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
#endif
#endif

__weak int eeprom_write_enable(unsigned dev_addr, int state)
{
	return 0;
}

void eeprom_init(int bus)
{
	/* SPI EEPROM */
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	spi_init_f();
#endif

	/* I2C EEPROM */
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
#if defined(CONFIG_SYS_I2C)
	if (bus >= 0)
		i2c_set_bus_num(bus);
#endif
	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}

static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)
{
	unsigned blk_off;
	int alen;

	blk_off = offset & 0xff;	/* block offset */
#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
	addr[0] = offset >> 8;		/* block number */
	addr[1] = blk_off;		/* block offset */
	alen = 2;
#else
	addr[0] = offset >> 16;		/* block number */
	addr[1] = offset >>  8;		/* upper address octet */
	addr[2] = blk_off;		/* lower address octet */
	alen = 3;
#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */

	addr[0] |= dev_addr;		/* insert device address */

	return alen;
}

static int eeprom_len(unsigned offset, unsigned end)
{
	unsigned len = end - offset;

	/*
	 * For a FRAM device there is no limit on the number of the
	 * bytes that can be ccessed with the single read or write
	 * operation.
	 */
#if !defined(CONFIG_SYS_I2C_FRAM)
	unsigned blk_off = offset & 0xff;
	unsigned maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);

	if (maxlen > I2C_RXTX_LEN)
		maxlen = I2C_RXTX_LEN;

	if (len > maxlen)
		len = maxlen;
#endif

	return len;
}

static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
			   uchar *buffer, unsigned len, bool read)
{
	int ret = 0;

	/* SPI */
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	if (read)
		spi_read(addr, alen, buffer, len);
	else
		spi_write(addr, alen, buffer, len);
#else	/* I2C */

#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
	i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
#endif

	if (read)
		ret = i2c_read(addr[0], offset, alen - 1, buffer, len);
	else
		ret = i2c_write(addr[0], offset, alen - 1, buffer, len);

	if (ret)
		ret = 1;
#endif
	return ret;
}

static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer,
		     unsigned cnt, bool read)
{
	unsigned end = offset + cnt;
	unsigned alen, len;
	int rcode = 0;
	uchar addr[3];

	while (offset < end) {
		alen = eeprom_addr(dev_addr, offset, addr);

		len = eeprom_len(offset, end);

		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, read);

		buffer += len;
		offset += len;

		if (!read)
			udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
	}

	return rcode;
}

int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
{
	/*
	 * Read data until done or would cross a page boundary.
	 * We must write the address again when changing pages
	 * because the next page may be in a different device.
	 */
	return eeprom_rw(dev_addr, offset, buffer, cnt, 1);
}

int eeprom_write(unsigned dev_addr, unsigned offset,
		 uchar *buffer, unsigned cnt)
{
	int ret;

	eeprom_write_enable(dev_addr, 1);

	/*
	 * Write data until done or would cross a write page boundary.
	 * We must write the address again when changing pages
	 * because the address counter only increments within a page.
	 */
	ret = eeprom_rw(dev_addr, offset, buffer, cnt, 1);

	eeprom_write_enable(dev_addr, 0);
	return ret;
}

static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	const char *const fmt =
		"\nEEPROM @0x%lX %s: addr %08lx  off %04lx  count %ld ... ";
	char * const *args = &argv[2];
	int rcode;
	ulong dev_addr, addr, off, cnt;
	int bus_addr;

	switch (argc) {
#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
	case 5:
		bus_addr = -1;
		dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
		break;
#endif
	case 6:
		bus_addr = -1;
		dev_addr = simple_strtoul(*args++, NULL, 16);
		break;
	case 7:
		bus_addr = simple_strtoul(*args++, NULL, 16);
		dev_addr = simple_strtoul(*args++, NULL, 16);
		break;
	default:
		return CMD_RET_USAGE;
	}

	addr = simple_strtoul(*args++, NULL, 16);
	off = simple_strtoul(*args++, NULL, 16);
	cnt = simple_strtoul(*args++, NULL, 16);

	eeprom_init(bus_addr);

	if (strcmp(argv[1], "read") == 0) {
		printf(fmt, dev_addr, argv[1], addr, off, cnt);

		rcode = eeprom_read(dev_addr, off, (uchar *)addr, cnt);

		puts("done\n");
		return rcode;
	} else if (strcmp(argv[1], "write") == 0) {
		printf(fmt, dev_addr, argv[1], addr, off, cnt);

		rcode = eeprom_write(dev_addr, off, (uchar *)addr, cnt);

		puts("done\n");
		return rcode;
	}

	return CMD_RET_USAGE;
}

U_BOOT_CMD(
	eeprom,	7,	1,	do_eeprom,
	"EEPROM sub-system",
	"read  <bus> <devaddr> addr off cnt\n"
	"eeprom write <bus> <devaddr> addr off cnt\n"
	"       - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
)
Commit	Line	Data
3863585b WD	1	/*
	2	* (C) Copyright 2000, 2001
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
3863585b WD	6	*/
3863585b WD	7
d4f5c728	8	/*
	9	* Support for read and write access to EEPROM like memory devices. This
	10	* includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
	11	* FRAM devices read and write data at bus speed. In particular, there is no
e506a006	12	* write delay. Also, there is no limit imposed on the number of bytes that can
d4f5c728	13	* be transferred with a single read or write.
6617aae9	14	*
d4f5c728	15	* Use the following configuration options to ensure no unneeded performance
d4f5c728	16	* degradation (typical for EEPROM) is incured for FRAM memory:
6617aae9	17	*
6d0f6bcf JCPV	18	* #define CONFIG_SYS_I2C_FRAM
6d0f6bcf JCPV	19	* #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
d4f5c728	20	*
	21	*/
	22
3863585b WD	23	#include <common.h>
	24	#include <config.h>
	25	#include <command.h>
	26	#include <i2c.h>
	27
4f296d09 MV	28	#ifndef CONFIG_SYS_I2C_SPEED
4f296d09 MV	29	#define CONFIG_SYS_I2C_SPEED 50000
98f4a3df	30	#endif
3863585b	31
d738746c MV	32	#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
	33	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 0
	34	#endif
	35
6717e3c8 MV	36	#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
	37	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 8
	38	#endif
	39
	40	#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
	41	#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
	42
4f296d09	43	/*
6d0f6bcf	44	* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
3863585b WD	45	* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
3863585b WD	46	*
6d0f6bcf	47	* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
3863585b WD	48	* 0x00000nxx for EEPROM address selectors and page number at n.
3863585b WD	49	*/
548738b4	50	#if !defined(CONFIG_SPI) \|\| defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
4f296d09	51	#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) \|\| \
d4e69e61 MV	52	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) \|\| \
d4e69e61 MV	53	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
6d0f6bcf	54	#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
3863585b WD	55	#endif
	56	#endif
	57
52cd47c9 MV	58	__weak int eeprom_write_enable(unsigned dev_addr, int state)
	59	{
	60	return 0;
	61	}
4f296d09	62
354e3ed7	63	void eeprom_init(int bus)
4f296d09 MV	64	{
	65	/* SPI EEPROM */
	66	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
8eee40a6	67	spi_init_f();
4f296d09 MV	68	#endif
	69
	70	/* I2C EEPROM */
	71	#if defined(CONFIG_HARD_I2C) \|\| defined(CONFIG_SYS_I2C_SOFT)
354e3ed7 MV	72	#if defined(CONFIG_SYS_I2C)
	73	if (bus >= 0)
	74	i2c_set_bus_num(bus);
	75	#endif
4f296d09 MV	76	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
	77	#endif
	78	}
	79
02c321cf MV	80	static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)
	81	{
	82	unsigned blk_off;
	83	int alen;
	84
	85	blk_off = offset & 0xff; /* block offset */
	86	#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
	87	addr[0] = offset >> 8; /* block number */
	88	addr[1] = blk_off; /* block offset */
	89	alen = 2;
	90	#else
	91	addr[0] = offset >> 16; /* block number */
	92	addr[1] = offset >> 8; /* upper address octet */
	93	addr[2] = blk_off; /* lower address octet */
	94	alen = 3;
	95	#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
	96
	97	addr[0] \|= dev_addr; /* insert device address */
	98
	99	return alen;
	100	}
	101
39b6f98b MV	102	static int eeprom_len(unsigned offset, unsigned end)
	103	{
	104	unsigned len = end - offset;
	105
	106	/*
	107	* For a FRAM device there is no limit on the number of the
	108	* bytes that can be ccessed with the single read or write
	109	* operation.
	110	*/
	111	#if !defined(CONFIG_SYS_I2C_FRAM)
	112	unsigned blk_off = offset & 0xff;
	113	unsigned maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
	114
	115	if (maxlen > I2C_RXTX_LEN)
	116	maxlen = I2C_RXTX_LEN;
	117
	118	if (len > maxlen)
	119	len = maxlen;
	120	#endif
	121
	122	return len;
	123	}
	124
9132088b MV	125	static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
	126	uchar *buffer, unsigned len, bool read)
	127	{
	128	int ret = 0;
	129
	130	/* SPI */
	131	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	132	if (read)
	133	spi_read(addr, alen, buffer, len);
	134	else
	135	spi_write(addr, alen, buffer, len);
	136	#else /* I2C */
	137
	138	#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
	139	i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
	140	#endif
	141
	142	if (read)
	143	ret = i2c_read(addr[0], offset, alen - 1, buffer, len);
	144	else
	145	ret = i2c_write(addr[0], offset, alen - 1, buffer, len);
	146
	147	if (ret)
	148	ret = 1;
	149	#endif
	150	return ret;
	151	}
	152
1a37889b MV	153	static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer,
1a37889b MV	154	unsigned cnt, bool read)
3863585b WD	155	{
3863585b WD	156	unsigned end = offset + cnt;
1a37889b	157	unsigned alen, len;
3863585b	158	int rcode = 0;
02c321cf	159	uchar addr[3];
3863585b	160
3863585b	161	while (offset < end) {
02c321cf	162	alen = eeprom_addr(dev_addr, offset, addr);
3863585b	163
39b6f98b	164	len = eeprom_len(offset, end);
d4f5c728	165
1a37889b	166	rcode = eeprom_rw_block(offset, addr, alen, buffer, len, read);
9132088b	167
3863585b WD	168	buffer += len;
3863585b WD	169	offset += len;
1a37889b MV	170
	171	if (!read)
	172	udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
3863585b	173	}
d4f5c728	174
3863585b WD	175	return rcode;
	176	}
	177
1a37889b	178	int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
3863585b	179	{
1a37889b MV	180	/*
	181	* Read data until done or would cross a page boundary.
	182	* We must write the address again when changing pages
	183	* because the next page may be in a different device.
	184	*/
	185	return eeprom_rw(dev_addr, offset, buffer, cnt, 1);
	186	}
	187
d4e69e61 MV	188	int eeprom_write(unsigned dev_addr, unsigned offset,
d4e69e61 MV	189	uchar *buffer, unsigned cnt)
1a37889b MV	190	{
1a37889b MV	191	int ret;
3863585b	192
52cd47c9 MV	193	eeprom_write_enable(dev_addr, 1);
52cd47c9 MV	194
4f296d09 MV	195	/*
4f296d09 MV	196	* Write data until done or would cross a write page boundary.
3863585b WD	197	* We must write the address again when changing pages
	198	* because the address counter only increments within a page.
	199	*/
1a37889b	200	ret = eeprom_rw(dev_addr, offset, buffer, cnt, 1);
52cd47c9 MV	201
52cd47c9 MV	202	eeprom_write_enable(dev_addr, 0);
1a37889b	203	return ret;
3863585b WD	204	}
3863585b WD	205
4f296d09	206	static int do_eeprom(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
3863585b	207	{
4f296d09 MV	208	const char *const fmt =
4f296d09 MV	209	"\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
e4f65d00 MV	210	char * const *args = &argv[2];
	211	int rcode;
	212	ulong dev_addr, addr, off, cnt;
d4fec4e9	213	int bus_addr;
e4f65d00 MV	214
	215	switch (argc) {
	216	#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
	217	case 5:
d4fec4e9	218	bus_addr = -1;
e4f65d00 MV	219	dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
	220	break;
	221	#endif
	222	case 6:
d4fec4e9 MV	223	bus_addr = -1;
	224	dev_addr = simple_strtoul(*args++, NULL, 16);
	225	break;
	226	case 7:
	227	bus_addr = simple_strtoul(*args++, NULL, 16);
e4f65d00 MV	228	dev_addr = simple_strtoul(*args++, NULL, 16);
	229	break;
	230	default:
	231	return CMD_RET_USAGE;
	232	}
548738b4	233
e4f65d00 MV	234	addr = simple_strtoul(*args++, NULL, 16);
	235	off = simple_strtoul(*args++, NULL, 16);
	236	cnt = simple_strtoul(*args++, NULL, 16);
548738b4	237
d4fec4e9	238	eeprom_init(bus_addr);
90253178	239
d4e69e61	240	if (strcmp(argv[1], "read") == 0) {
e4f65d00	241	printf(fmt, dev_addr, argv[1], addr, off, cnt);
4f296d09	242
d4e69e61	243	rcode = eeprom_read(dev_addr, off, (uchar *)addr, cnt);
4f296d09	244
d4e69e61	245	puts("done\n");
e4f65d00	246	return rcode;
d4e69e61	247	} else if (strcmp(argv[1], "write") == 0) {
e4f65d00	248	printf(fmt, dev_addr, argv[1], addr, off, cnt);
4f296d09	249
d4e69e61	250	rcode = eeprom_write(dev_addr, off, (uchar *)addr, cnt);
4f296d09	251
d4e69e61	252	puts("done\n");
e4f65d00	253	return rcode;
4f296d09 MV	254	}
	255
	256	return CMD_RET_USAGE;
	257	}
8bde7f77	258
0d498393	259	U_BOOT_CMD(
d4fec4e9	260	eeprom, 7, 1, do_eeprom,
2fb2604d	261	"EEPROM sub-system",
d4fec4e9 MV	262	"read <bus> <devaddr> addr off cnt\n"
d4fec4e9 MV	263	"eeprom write <bus> <devaddr> addr off cnt\n"
a89c33db	264	" - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
0e350f81	265	)