eeprom: fix eeprom write procedure
[people/ms/u-boot.git] / common / cmd_eeprom.c
CommitLineData
3863585b
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1/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
d4f5c728 8/*
9 * Support for read and write access to EEPROM like memory devices. This
10 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
11 * FRAM devices read and write data at bus speed. In particular, there is no
e506a006 12 * write delay. Also, there is no limit imposed on the number of bytes that can
d4f5c728 13 * be transferred with a single read or write.
6617aae9 14 *
d4f5c728 15 * Use the following configuration options to ensure no unneeded performance
16 * degradation (typical for EEPROM) is incured for FRAM memory:
6617aae9 17 *
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18 * #define CONFIG_SYS_I2C_FRAM
19 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
d4f5c728 20 *
21 */
22
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23#include <common.h>
24#include <config.h>
25#include <command.h>
26#include <i2c.h>
27
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28#ifndef CONFIG_SYS_I2C_SPEED
29#define CONFIG_SYS_I2C_SPEED 50000
98f4a3df 30#endif
3863585b 31
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32#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
33#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 0
34#endif
35
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36#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
37#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 8
38#endif
39
40#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
41#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
42
4f296d09 43/*
6d0f6bcf 44 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
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45 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
46 *
6d0f6bcf 47 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
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48 * 0x00000nxx for EEPROM address selectors and page number at n.
49 */
548738b4 50#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
4f296d09 51#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \
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52 (CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \
53 (CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
6d0f6bcf 54#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
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55#endif
56#endif
57
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58__weak int eeprom_write_enable(unsigned dev_addr, int state)
59{
60 return 0;
61}
4f296d09 62
354e3ed7 63void eeprom_init(int bus)
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64{
65 /* SPI EEPROM */
66#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
8eee40a6 67 spi_init_f();
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68#endif
69
70 /* I2C EEPROM */
71#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
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72#if defined(CONFIG_SYS_I2C)
73 if (bus >= 0)
74 i2c_set_bus_num(bus);
75#endif
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76 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
77#endif
78}
79
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80static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)
81{
82 unsigned blk_off;
83 int alen;
84
85 blk_off = offset & 0xff; /* block offset */
86#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
87 addr[0] = offset >> 8; /* block number */
88 addr[1] = blk_off; /* block offset */
89 alen = 2;
90#else
91 addr[0] = offset >> 16; /* block number */
92 addr[1] = offset >> 8; /* upper address octet */
93 addr[2] = blk_off; /* lower address octet */
94 alen = 3;
95#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
96
97 addr[0] |= dev_addr; /* insert device address */
98
99 return alen;
100}
101
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102static int eeprom_len(unsigned offset, unsigned end)
103{
104 unsigned len = end - offset;
105
106 /*
107 * For a FRAM device there is no limit on the number of the
108 * bytes that can be ccessed with the single read or write
109 * operation.
110 */
111#if !defined(CONFIG_SYS_I2C_FRAM)
112 unsigned blk_off = offset & 0xff;
113 unsigned maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
114
115 if (maxlen > I2C_RXTX_LEN)
116 maxlen = I2C_RXTX_LEN;
117
118 if (len > maxlen)
119 len = maxlen;
120#endif
121
122 return len;
123}
124
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125static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
126 uchar *buffer, unsigned len, bool read)
127{
128 int ret = 0;
129
130 /* SPI */
131#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
132 if (read)
133 spi_read(addr, alen, buffer, len);
134 else
135 spi_write(addr, alen, buffer, len);
136#else /* I2C */
137
138#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
139 i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
140#endif
141
142 if (read)
143 ret = i2c_read(addr[0], offset, alen - 1, buffer, len);
144 else
145 ret = i2c_write(addr[0], offset, alen - 1, buffer, len);
146
147 if (ret)
148 ret = 1;
149#endif
150 return ret;
151}
152
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153static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer,
154 unsigned cnt, bool read)
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155{
156 unsigned end = offset + cnt;
1a37889b 157 unsigned alen, len;
3863585b 158 int rcode = 0;
02c321cf 159 uchar addr[3];
3863585b 160
3863585b 161 while (offset < end) {
02c321cf 162 alen = eeprom_addr(dev_addr, offset, addr);
3863585b 163
39b6f98b 164 len = eeprom_len(offset, end);
d4f5c728 165
1a37889b 166 rcode = eeprom_rw_block(offset, addr, alen, buffer, len, read);
9132088b 167
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168 buffer += len;
169 offset += len;
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170
171 if (!read)
172 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
3863585b 173 }
d4f5c728 174
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175 return rcode;
176}
177
1a37889b 178int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
3863585b 179{
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180 /*
181 * Read data until done or would cross a page boundary.
182 * We must write the address again when changing pages
183 * because the next page may be in a different device.
184 */
185 return eeprom_rw(dev_addr, offset, buffer, cnt, 1);
186}
187
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188int eeprom_write(unsigned dev_addr, unsigned offset,
189 uchar *buffer, unsigned cnt)
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190{
191 int ret;
3863585b 192
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193 eeprom_write_enable(dev_addr, 1);
194
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195 /*
196 * Write data until done or would cross a write page boundary.
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197 * We must write the address again when changing pages
198 * because the address counter only increments within a page.
199 */
52bc7c7e 200 ret = eeprom_rw(dev_addr, offset, buffer, cnt, 0);
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201
202 eeprom_write_enable(dev_addr, 0);
1a37889b 203 return ret;
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204}
205
4f296d09 206static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 207{
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208 const char *const fmt =
209 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
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210 char * const *args = &argv[2];
211 int rcode;
212 ulong dev_addr, addr, off, cnt;
d4fec4e9 213 int bus_addr;
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214
215 switch (argc) {
216#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
217 case 5:
d4fec4e9 218 bus_addr = -1;
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219 dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
220 break;
221#endif
222 case 6:
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223 bus_addr = -1;
224 dev_addr = simple_strtoul(*args++, NULL, 16);
225 break;
226 case 7:
227 bus_addr = simple_strtoul(*args++, NULL, 16);
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228 dev_addr = simple_strtoul(*args++, NULL, 16);
229 break;
230 default:
231 return CMD_RET_USAGE;
232 }
548738b4 233
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234 addr = simple_strtoul(*args++, NULL, 16);
235 off = simple_strtoul(*args++, NULL, 16);
236 cnt = simple_strtoul(*args++, NULL, 16);
548738b4 237
d4fec4e9 238 eeprom_init(bus_addr);
90253178 239
d4e69e61 240 if (strcmp(argv[1], "read") == 0) {
e4f65d00 241 printf(fmt, dev_addr, argv[1], addr, off, cnt);
4f296d09 242
d4e69e61 243 rcode = eeprom_read(dev_addr, off, (uchar *)addr, cnt);
4f296d09 244
d4e69e61 245 puts("done\n");
e4f65d00 246 return rcode;
d4e69e61 247 } else if (strcmp(argv[1], "write") == 0) {
e4f65d00 248 printf(fmt, dev_addr, argv[1], addr, off, cnt);
4f296d09 249
d4e69e61 250 rcode = eeprom_write(dev_addr, off, (uchar *)addr, cnt);
4f296d09 251
d4e69e61 252 puts("done\n");
e4f65d00 253 return rcode;
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254 }
255
256 return CMD_RET_USAGE;
257}
8bde7f77 258
0d498393 259U_BOOT_CMD(
d4fec4e9 260 eeprom, 7, 1, do_eeprom,
2fb2604d 261 "EEPROM sub-system",
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262 "read <bus> <devaddr> addr off cnt\n"
263 "eeprom write <bus> <devaddr> addr off cnt\n"
a89c33db 264 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
0e350f81 265)