[people/ms/u-boot.git] / common / cmd_eeprom.c

/*
 * (C) Copyright 2000, 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * Support for read and write access to EEPROM like memory devices. This
 * includes regular EEPROM as well as  FRAM (ferroelectic nonvolaile RAM).
 * FRAM devices read and write data at bus speed. In particular, there is no
 * write delay. Also, there is no limit imposed on the number of bytes that can
 * be transferred with a single read or write.
 *
 * Use the following configuration options to ensure no unneeded performance
 * degradation (typical for EEPROM) is incured for FRAM memory:
 *
 * #define CONFIG_SYS_I2C_FRAM
 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
 *
 */

#include <common.h>
#include <config.h>
#include <command.h>
#include <i2c.h>

#ifndef	CONFIG_SYS_I2C_SPEED
#define	CONFIG_SYS_I2C_SPEED	50000
#endif

/*
 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
 *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
 *
 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
 *   0x00000nxx for EEPROM address selectors and page number at n.
 */
#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \
    (CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \
    (CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
#endif
#endif

#if defined(CONFIG_SYS_EEPROM_WREN)
extern int eeprom_write_enable (unsigned dev_addr, int state);
#endif

void eeprom_init(void)
{
	/* SPI EEPROM */
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	spi_init_f ();
#endif

	/* I2C EEPROM */
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}

int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
{
	unsigned end = offset + cnt;
	unsigned blk_off;
	int rcode = 0;

	/*
	 * Read data until done or would cross a page boundary.
	 * We must write the address again when changing pages
	 * because the next page may be in a different device.
	 */
	while (offset < end) {
		unsigned alen, len;
#if !defined(CONFIG_SYS_I2C_FRAM)
		unsigned maxlen;
#endif

#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
		uchar addr[2];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 8;		/* block number */
		addr[1] = blk_off;		/* block offset */
		alen	= 2;
#else
		uchar addr[3];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 16;		/* block number */
		addr[1] = offset >>  8;		/* upper address octet */
		addr[2] = blk_off;		/* lower address octet */
		alen	= 3;
#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */

		addr[0] |= dev_addr;		/* insert device address */

		len = end - offset;

		/*
		 * For a FRAM device there is no limit on the number of the
		 * bytes that can be ccessed with the single read or write
		 * operation.
		 */
#if !defined(CONFIG_SYS_I2C_FRAM)
		maxlen = 0x100 - blk_off;
		if (maxlen > I2C_RXTX_LEN)
			maxlen = I2C_RXTX_LEN;
		if (len > maxlen)
			len = maxlen;
#endif

#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
		spi_read (addr, alen, buffer, len);
#else
#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
#endif
		if (i2c_read(addr[0], offset, alen - 1, buffer, len))
			rcode = 1;
#endif
		buffer += len;
		offset += len;
	}

	return rcode;
}

int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
{
	unsigned end = offset + cnt;
	unsigned blk_off;
	int rcode = 0;

#if defined(CONFIG_SYS_EEPROM_WREN)
	eeprom_write_enable (dev_addr,1);
#endif
	/*
	 * Write data until done or would cross a write page boundary.
	 * We must write the address again when changing pages
	 * because the address counter only increments within a page.
	 */

	while (offset < end) {
		unsigned alen, len;
#if !defined(CONFIG_SYS_I2C_FRAM)
		unsigned maxlen;
#endif

#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
		uchar addr[2];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 8;		/* block number */
		addr[1] = blk_off;		/* block offset */
		alen	= 2;
#else
		uchar addr[3];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 16;		/* block number */
		addr[1] = offset >>  8;		/* upper address octet */
		addr[2] = blk_off;		/* lower address octet */
		alen	= 3;
#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */

		addr[0] |= dev_addr;		/* insert device address */

		len = end - offset;

		/*
		 * For a FRAM device there is no limit on the number of the
		 * bytes that can be accessed with the single read or write
		 * operation.
		 */
#if !defined(CONFIG_SYS_I2C_FRAM)

#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)

#define	EEPROM_PAGE_SIZE	(1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
#define	EEPROM_PAGE_OFFSET(x)	((x) & (EEPROM_PAGE_SIZE - 1))

		maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
#else
		maxlen = 0x100 - blk_off;
#endif
		if (maxlen > I2C_RXTX_LEN)
			maxlen = I2C_RXTX_LEN;

		if (len > maxlen)
			len = maxlen;
#endif

#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
		spi_write (addr, alen, buffer, len);
#else

#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
#endif
		if (i2c_write(addr[0], offset, alen - 1, buffer, len))
			rcode = 1;

#endif
		buffer += len;
		offset += len;

#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
		udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
	}
#if defined(CONFIG_SYS_EEPROM_WREN)
	eeprom_write_enable (dev_addr,0);
#endif
	return rcode;
}

static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	const char *const fmt =
		"\nEEPROM @0x%lX %s: addr %08lx  off %04lx  count %ld ... ";
	char * const *args = &argv[2];
	int rcode;
	ulong dev_addr, addr, off, cnt;

	switch (argc) {
#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
	case 5:
		dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
		break;
#endif
	case 6:
		dev_addr = simple_strtoul(*args++, NULL, 16);
		break;
	default:
		return CMD_RET_USAGE;
	}

	addr = simple_strtoul(*args++, NULL, 16);
	off = simple_strtoul(*args++, NULL, 16);
	cnt = simple_strtoul(*args++, NULL, 16);

# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	eeprom_init ();
# endif /* !CONFIG_SPI */

	if (strcmp (argv[1], "read") == 0) {
		printf(fmt, dev_addr, argv[1], addr, off, cnt);

		rcode = eeprom_read(dev_addr, off, (uchar *) addr, cnt);

		puts ("done\n");
		return rcode;
	} else if (strcmp (argv[1], "write") == 0) {
		printf(fmt, dev_addr, argv[1], addr, off, cnt);

		rcode = eeprom_write(dev_addr, off, (uchar *) addr, cnt);

		puts ("done\n");
		return rcode;
	}

	return CMD_RET_USAGE;
}

U_BOOT_CMD(
	eeprom,	6,	1,	do_eeprom,
	"EEPROM sub-system",
	"read  devaddr addr off cnt\n"
	"eeprom write devaddr addr off cnt\n"
	"       - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
)
Commit	Line	Data
3863585b WD	1	/*
	2	* (C) Copyright 2000, 2001
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
3863585b WD	6	*/
3863585b WD	7
d4f5c728	8	/*
	9	* Support for read and write access to EEPROM like memory devices. This
	10	* includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
	11	* FRAM devices read and write data at bus speed. In particular, there is no
e506a006	12	* write delay. Also, there is no limit imposed on the number of bytes that can
d4f5c728	13	* be transferred with a single read or write.
6617aae9	14	*
d4f5c728	15	* Use the following configuration options to ensure no unneeded performance
d4f5c728	16	* degradation (typical for EEPROM) is incured for FRAM memory:
6617aae9	17	*
6d0f6bcf JCPV	18	* #define CONFIG_SYS_I2C_FRAM
6d0f6bcf JCPV	19	* #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
d4f5c728	20	*
	21	*/
	22
3863585b WD	23	#include <common.h>
	24	#include <config.h>
	25	#include <command.h>
	26	#include <i2c.h>
	27
4f296d09 MV	28	#ifndef CONFIG_SYS_I2C_SPEED
4f296d09 MV	29	#define CONFIG_SYS_I2C_SPEED 50000
98f4a3df	30	#endif
3863585b	31
4f296d09	32	/*
6d0f6bcf	33	* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
3863585b WD	34	* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
3863585b WD	35	*
6d0f6bcf	36	* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
3863585b WD	37	* 0x00000nxx for EEPROM address selectors and page number at n.
3863585b WD	38	*/
548738b4	39	#if !defined(CONFIG_SPI) \|\| defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
4f296d09 MV	40	#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) \|\| \
	41	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) \|\| \
	42	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
6d0f6bcf	43	#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
3863585b WD	44	#endif
	45	#endif
	46
4f296d09 MV	47	#if defined(CONFIG_SYS_EEPROM_WREN)
	48	extern int eeprom_write_enable (unsigned dev_addr, int state);
	49	#endif
	50
	51	void eeprom_init(void)
	52	{
	53	/* SPI EEPROM */
	54	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	55	spi_init_f ();
	56	#endif
	57
	58	/* I2C EEPROM */
	59	#if defined(CONFIG_HARD_I2C) \|\| defined(CONFIG_SYS_I2C_SOFT)
	60	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
	61	#endif
	62	}
	63
3863585b WD	64	int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
	65	{
	66	unsigned end = offset + cnt;
	67	unsigned blk_off;
	68	int rcode = 0;
	69
4f296d09 MV	70	/*
4f296d09 MV	71	* Read data until done or would cross a page boundary.
3863585b WD	72	* We must write the address again when changing pages
	73	* because the next page may be in a different device.
	74	*/
	75	while (offset < end) {
d4f5c728	76	unsigned alen, len;
6d0f6bcf	77	#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c728	78	unsigned maxlen;
	79	#endif
	80
53a85ad7	81	#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
3863585b WD	82	uchar addr[2];
	83
	84	blk_off = offset & 0xFF; /* block offset */
	85
	86	addr[0] = offset >> 8; /* block number */
	87	addr[1] = blk_off; /* block offset */
	88	alen = 2;
	89	#else
	90	uchar addr[3];
	91
	92	blk_off = offset & 0xFF; /* block offset */
	93
	94	addr[0] = offset >> 16; /* block number */
	95	addr[1] = offset >> 8; /* upper address octet */
	96	addr[2] = blk_off; /* lower address octet */
	97	alen = 3;
53a85ad7	98	#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
3863585b WD	99
	100	addr[0] \|= dev_addr; /* insert device address */
	101
d4f5c728	102	len = end - offset;
	103
	104	/*
	105	* For a FRAM device there is no limit on the number of the
	106	* bytes that can be ccessed with the single read or write
	107	* operation.
	108	*/
6d0f6bcf	109	#if !defined(CONFIG_SYS_I2C_FRAM)
3863585b WD	110	maxlen = 0x100 - blk_off;
	111	if (maxlen > I2C_RXTX_LEN)
	112	maxlen = I2C_RXTX_LEN;
3863585b WD	113	if (len > maxlen)
3863585b WD	114	len = maxlen;
d4f5c728	115	#endif
d4f5c728	116
548738b4	117	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
3863585b WD	118	spi_read (addr, alen, buffer, len);
3863585b WD	119	#else
189d257b CG	120	#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
	121	i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
	122	#endif
6ca6d080	123	if (i2c_read(addr[0], offset, alen - 1, buffer, len))
3863585b WD	124	rcode = 1;
	125	#endif
	126	buffer += len;
	127	offset += len;
	128	}
d4f5c728	129
3863585b WD	130	return rcode;
	131	}
	132
3863585b WD	133	int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
	134	{
	135	unsigned end = offset + cnt;
	136	unsigned blk_off;
	137	int rcode = 0;
	138
6d0f6bcf	139	#if defined(CONFIG_SYS_EEPROM_WREN)
98f4a3df SR	140	eeprom_write_enable (dev_addr,1);
98f4a3df SR	141	#endif
4f296d09 MV	142	/*
4f296d09 MV	143	* Write data until done or would cross a write page boundary.
3863585b WD	144	* We must write the address again when changing pages
	145	* because the address counter only increments within a page.
	146	*/
	147
	148	while (offset < end) {
d4f5c728	149	unsigned alen, len;
6d0f6bcf	150	#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c728	151	unsigned maxlen;
	152	#endif
	153
53a85ad7	154	#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
3863585b WD	155	uchar addr[2];
	156
	157	blk_off = offset & 0xFF; /* block offset */
	158
	159	addr[0] = offset >> 8; /* block number */
	160	addr[1] = blk_off; /* block offset */
	161	alen = 2;
	162	#else
	163	uchar addr[3];
	164
	165	blk_off = offset & 0xFF; /* block offset */
	166
	167	addr[0] = offset >> 16; /* block number */
	168	addr[1] = offset >> 8; /* upper address octet */
	169	addr[2] = blk_off; /* lower address octet */
	170	alen = 3;
53a85ad7	171	#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
3863585b WD	172
	173	addr[0] \|= dev_addr; /* insert device address */
	174
d4f5c728	175	len = end - offset;
	176
	177	/*
	178	* For a FRAM device there is no limit on the number of the
f9a78b8d	179	* bytes that can be accessed with the single read or write
d4f5c728	180	* operation.
d4f5c728	181	*/
6d0f6bcf	182	#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c728	183
6d0f6bcf	184	#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
3863585b	185
6d0f6bcf	186	#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
3863585b WD	187	#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
	188
	189	maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
	190	#else
	191	maxlen = 0x100 - blk_off;
	192	#endif
	193	if (maxlen > I2C_RXTX_LEN)
	194	maxlen = I2C_RXTX_LEN;
	195
3863585b WD	196	if (len > maxlen)
3863585b WD	197	len = maxlen;
d4f5c728	198	#endif
d4f5c728	199
548738b4	200	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
3863585b WD	201	spi_write (addr, alen, buffer, len);
3863585b WD	202	#else
3863585b	203
189d257b CG	204	#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
189d257b CG	205	i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
3863585b	206	#endif
6ca6d080	207	if (i2c_write(addr[0], offset, alen - 1, buffer, len))
3863585b WD	208	rcode = 1;
	209
	210	#endif
	211	buffer += len;
	212	offset += len;
	213
6d0f6bcf JCPV	214	#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
6d0f6bcf JCPV	215	udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
3863585b WD	216	#endif
3863585b WD	217	}
6d0f6bcf	218	#if defined(CONFIG_SYS_EEPROM_WREN)
98f4a3df SR	219	eeprom_write_enable (dev_addr,0);
98f4a3df SR	220	#endif
3863585b WD	221	return rcode;
	222	}
	223
4f296d09	224	static int do_eeprom(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
3863585b	225	{
4f296d09 MV	226	const char *const fmt =
4f296d09 MV	227	"\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
e4f65d00 MV	228	char * const *args = &argv[2];
	229	int rcode;
	230	ulong dev_addr, addr, off, cnt;
	231
	232	switch (argc) {
	233	#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
	234	case 5:
	235	dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
	236	break;
	237	#endif
	238	case 6:
	239	dev_addr = simple_strtoul(*args++, NULL, 16);
	240	break;
	241	default:
	242	return CMD_RET_USAGE;
	243	}
548738b4	244
e4f65d00 MV	245	addr = simple_strtoul(*args++, NULL, 16);
	246	off = simple_strtoul(*args++, NULL, 16);
	247	cnt = simple_strtoul(*args++, NULL, 16);
548738b4	248
4f296d09	249	# if !defined(CONFIG_SPI) \|\| defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
e4f65d00	250	eeprom_init ();
4f296d09	251	# endif /* !CONFIG_SPI */
90253178	252
e4f65d00 MV	253	if (strcmp (argv[1], "read") == 0) {
e4f65d00 MV	254	printf(fmt, dev_addr, argv[1], addr, off, cnt);
4f296d09	255
e4f65d00	256	rcode = eeprom_read(dev_addr, off, (uchar *) addr, cnt);
4f296d09	257
e4f65d00 MV	258	puts ("done\n");
	259	return rcode;
	260	} else if (strcmp (argv[1], "write") == 0) {
	261	printf(fmt, dev_addr, argv[1], addr, off, cnt);
4f296d09	262
e4f65d00	263	rcode = eeprom_write(dev_addr, off, (uchar *) addr, cnt);
4f296d09	264
e4f65d00 MV	265	puts ("done\n");
e4f65d00 MV	266	return rcode;
4f296d09 MV	267	}
	268
	269	return CMD_RET_USAGE;
	270	}
8bde7f77	271
0d498393 WD	272	U_BOOT_CMD(
0d498393 WD	273	eeprom, 6, 1, do_eeprom,
2fb2604d	274	"EEPROM sub-system",
8bde7f77 WD	275	"read devaddr addr off cnt\n"
8bde7f77 WD	276	"eeprom write devaddr addr off cnt\n"
a89c33db	277	" - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
0e350f81	278	)