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[people/ms/u-boot.git] / common / cmd_ide.c
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c609719b 1/*
1a344f29 2 * (C) Copyright 2000-2005
c609719b
WD		 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
28#include <common.h>
29#include <config.h>
30#include <watchdog.h>
31#include <command.h>
32#include <image.h>
33#include <asm/byteorder.h>
735dd97b 34
c609719b
WD		 35#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
36# include <pcmcia.h>
37#endif
735dd97b 38
c609719b
WD		 39#ifdef CONFIG_8xx
40# include <mpc8xx.h>
41#endif
735dd97b 42
132ba5fd
WD		 43#ifdef CONFIG_MPC5xxx
44#include <mpc5xxx.h>
45#endif
735dd97b 46
c609719b
WD		 47#include <ide.h>
48#include <ata.h>
735dd97b 49
c609719b
WD		 50#ifdef CONFIG_STATUS_LED
51# include <status_led.h>
52#endif
735dd97b 53
15647dc7 54#ifndef __PPC__
2262cfee 55#include <asm/io.h>
15647dc7
WD		 56#ifdef __MIPS__
57/* Macros depend on this variable */
c75eba3b 58unsigned long mips_io_port_base = 0;
15647dc7 59#endif
2262cfee 60#endif
c609719b
WD		 61
62#ifdef CONFIG_SHOW_BOOT_PROGRESS
63# include <status_led.h>
64# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
65#else
66# define SHOW_BOOT_PROGRESS(arg)
67#endif
68
d87080b7
WD		 69#ifdef CONFIG_IDE_8xx_DIRECT
70DECLARE_GLOBAL_DATA_PTR;
71#endif
72
5cf91d6b
WD		 73#ifdef __PPC__
74# define EIEIO __asm__ volatile ("eieio")
1a344f29 75# define SYNC __asm__ volatile ("sync")
5cf91d6b
WD		 76#else
77# define EIEIO /* nothing */
1a344f29 78# define SYNC /* nothing */
c609719b
WD		 79#endif
80
81#if (CONFIG_COMMANDS & CFG_CMD_IDE)
82
15647dc7 83#ifdef CONFIG_IDE_8xx_DIRECT
c609719b
WD		 84/* Timings for IDE Interface
85 *
86 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
87 * 70 165 30 PIO-Mode 0, [ns]
88 * 4 9 2 [Cycles]
89 * 50 125 20 PIO-Mode 1, [ns]
90 * 3 7 2 [Cycles]
91 * 30 100 15 PIO-Mode 2, [ns]
92 * 2 6 1 [Cycles]
93 * 30 80 10 PIO-Mode 3, [ns]
94 * 2 5 1 [Cycles]
95 * 25 70 10 PIO-Mode 4, [ns]
96 * 2 4 1 [Cycles]
97 */
98
99const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
100{
101 /* Setup Length Hold */
102 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
103 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
104 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
105 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
106 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
107};
108
109static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
110
111#ifndef CFG_PIO_MODE
112#define CFG_PIO_MODE 0 /* use a relaxed default */
113#endif
114static int pio_mode = CFG_PIO_MODE;
115
116/* Make clock cycles and always round up */
117
118#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
119
15647dc7
WD		 120#endif /* CONFIG_IDE_8xx_DIRECT */
121
c609719b
WD		 122/* ------------------------------------------------------------------------- */
123
124/* Current I/O Device */
125static int curr_device = -1;
126
127/* Current offset for IDE0 / IDE1 bus access */
128ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
129#if defined(CFG_ATA_IDE0_OFFSET)
130 CFG_ATA_IDE0_OFFSET,
131#endif
132#if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
133 CFG_ATA_IDE1_OFFSET,
134#endif
135};
136
15647dc7 137
c609719b
WD		 138#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
139
c7de829c 140#ifndef CONFIG_AMIGAONEG3SE
1a344f29 141static int ide_bus_ok[CFG_IDE_MAXBUS];
c7de829c 142#else
1a344f29 143static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
c7de829c 144#endif
c609719b 145
fa838874 146block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
c609719b
WD		 147/* ------------------------------------------------------------------------- */
148
149#ifdef CONFIG_IDE_LED
e2ffd59b 150#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
c609719b
WD		 151static void ide_led (uchar led, uchar status);
152#else
1f53a416
WD		 153extern void ide_led (uchar led, uchar status);
154#endif
155#else
c7de829c 156#ifndef CONFIG_AMIGAONEG3SE
c609719b 157#define ide_led(a,b) /* dummy */
c7de829c
WD		 158#else
159extern void ide_led(uchar led, uchar status);
160#define LED_IDE1 1
161#define LED_IDE2 2
162#define CONFIG_IDE_LED 1
163#define DEVICE_LED(x) 1
164#endif
c609719b
WD		 165#endif
166
167#ifdef CONFIG_IDE_RESET
168static void ide_reset (void);
169#else
170#define ide_reset() /* dummy */
171#endif
172
173static void ide_ident (block_dev_desc_t *dev_desc);
174static uchar ide_wait (int dev, ulong t);
175
176#define IDE_TIME_OUT 2000 /* 2 sec timeout */
177
178#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
179
180#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
181
2262cfee
WD		 182static void __inline__ ide_outb(int dev, int port, unsigned char val);
183static unsigned char __inline__ ide_inb(int dev, int port);
c609719b
WD		 184static void input_data(int dev, ulong *sect_buf, int words);
185static void output_data(int dev, ulong *sect_buf, int words);
186static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
187
566a494f
HS		 188#ifndef CFG_ATA_PORT_ADDR
189#define CFG_ATA_PORT_ADDR(port) (port)
190#endif
c609719b
WD		 191
192#ifdef CONFIG_ATAPI
193static void atapi_inquiry(block_dev_desc_t *dev_desc);
eb867a76 194ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
c609719b
WD		 195#endif
196
197
198#ifdef CONFIG_IDE_8xx_DIRECT
199static void set_pcmcia_timing (int pmode);
c609719b
WD		 200#endif
201
202/* ------------------------------------------------------------------------- */
203
204int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
205{
206 int rcode = 0;
207
208 switch (argc) {
209 case 0:
210 case 1:
211 printf ("Usage:\n%s\n", cmdtp->usage);
212 return 1;
213 case 2:
214 if (strncmp(argv[1],"res",3) == 0) {
215 puts ("\nReset IDE"
216#ifdef CONFIG_IDE_8xx_DIRECT
217 " on PCMCIA " PCMCIA_SLOT_MSG
218#endif
219 ": ");
220
221 ide_init ();
222 return 0;
223 } else if (strncmp(argv[1],"inf",3) == 0) {
224 int i;
225
226 putc ('\n');
227
228 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
229 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
230 continue; /* list only known devices */
231 printf ("IDE device %d: ", i);
232 dev_print(&ide_dev_desc[i]);
233 }
234 return 0;
235
236 } else if (strncmp(argv[1],"dev",3) == 0) {
237 if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
238 puts ("\nno IDE devices available\n");
239 return 1;
240 }
241 printf ("\nIDE device %d: ", curr_device);
242 dev_print(&ide_dev_desc[curr_device]);
243 return 0;
244 } else if (strncmp(argv[1],"part",4) == 0) {
245 int dev, ok;
246
247 for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
248 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
249 ++ok;
250 if (dev)
251 putc ('\n');
252 print_part(&ide_dev_desc[dev]);
253 }
254 }
255 if (!ok) {
256 puts ("\nno IDE devices available\n");
257 rcode ++;
258 }
259 return rcode;
260 }
261 printf ("Usage:\n%s\n", cmdtp->usage);
262 return 1;
263 case 3:
264 if (strncmp(argv[1],"dev",3) == 0) {
265 int dev = (int)simple_strtoul(argv[2], NULL, 10);
266
267 printf ("\nIDE device %d: ", dev);
268 if (dev >= CFG_IDE_MAXDEVICE) {
269 puts ("unknown device\n");
270 return 1;
271 }
272 dev_print(&ide_dev_desc[dev]);
273 /*ide_print (dev);*/
274
275 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
276 return 1;
277 }
278
279 curr_device = dev;
280
281 puts ("... is now current device\n");
282
283 return 0;
284 } else if (strncmp(argv[1],"part",4) == 0) {
285 int dev = (int)simple_strtoul(argv[2], NULL, 10);
286
287 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
288 print_part(&ide_dev_desc[dev]);
289 } else {
290 printf ("\nIDE device %d not available\n", dev);
291 rcode = 1;
292 }
293 return rcode;
294#if 0
295 } else if (strncmp(argv[1],"pio",4) == 0) {
296 int mode = (int)simple_strtoul(argv[2], NULL, 10);
297
298 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
299 puts ("\nSetting ");
300 pio_mode = mode;
301 ide_init ();
302 } else {
303 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
304 mode, IDE_MAX_PIO_MODE);
305 }
306 return;
307#endif
308 }
309
310 printf ("Usage:\n%s\n", cmdtp->usage);
311 return 1;
312 default:
313 /* at least 4 args */
314
315 if (strcmp(argv[1],"read") == 0) {
316 ulong addr = simple_strtoul(argv[2], NULL, 16);
c609719b
WD		 317 ulong cnt = simple_strtoul(argv[4], NULL, 16);
318 ulong n;
42dfe7a1
WD		 319#ifdef CFG_64BIT_STRTOUL
320 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 321
c40b2956 322 printf ("\nIDE read: device %d block # %qd, count %ld ... ",
c609719b 323 curr_device, blk, cnt);
42dfe7a1
WD		 324#else
325 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
326
327 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
328 curr_device, blk, cnt);
329#endif
c609719b
WD		 330
331 n = ide_dev_desc[curr_device].block_read (curr_device,
332 blk, cnt,
333 (ulong *)addr);
334 /* flush cache after read */
335 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
336
337 printf ("%ld blocks read: %s\n",
338 n, (n==cnt) ? "OK" : "ERROR");
339 if (n==cnt) {
340 return 0;
341 } else {
342 return 1;
343 }
344 } else if (strcmp(argv[1],"write") == 0) {
345 ulong addr = simple_strtoul(argv[2], NULL, 16);
c609719b
WD		 346 ulong cnt = simple_strtoul(argv[4], NULL, 16);
347 ulong n;
42dfe7a1
WD		 348#ifdef CFG_64BIT_STRTOUL
349 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 350
c40b2956 351 printf ("\nIDE write: device %d block # %qd, count %ld ... ",
c609719b 352 curr_device, blk, cnt);
42dfe7a1
WD		 353#else
354 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
355
356 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
357 curr_device, blk, cnt);
358#endif
c609719b
WD		 359
360 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
361
362 printf ("%ld blocks written: %s\n",
363 n, (n==cnt) ? "OK" : "ERROR");
364 if (n==cnt) {
365 return 0;
366 } else {
367 return 1;
368 }
369 } else {
370 printf ("Usage:\n%s\n", cmdtp->usage);
371 rcode = 1;
372 }
373
374 return rcode;
375 }
376}
377
378int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
379{
380 char *boot_device = NULL;
381 char *ep;
382 int dev, part = 0;
1a344f29 383 ulong addr, cnt, checksum;
c609719b
WD		 384 disk_partition_t info;
385 image_header_t *hdr;
386 int rcode = 0;
387
566a494f 388 SHOW_BOOT_PROGRESS (41);
c609719b
WD		 389 switch (argc) {
390 case 1:
391 addr = CFG_LOAD_ADDR;
392 boot_device = getenv ("bootdevice");
393 break;
394 case 2:
395 addr = simple_strtoul(argv[1], NULL, 16);
396 boot_device = getenv ("bootdevice");
397 break;
398 case 3:
399 addr = simple_strtoul(argv[1], NULL, 16);
400 boot_device = argv[2];
401 break;
402 default:
403 printf ("Usage:\n%s\n", cmdtp->usage);
566a494f 404 SHOW_BOOT_PROGRESS (-42);
c609719b
WD		 405 return 1;
406 }
566a494f 407 SHOW_BOOT_PROGRESS (42);
c609719b
WD		 408
409 if (!boot_device) {
410 puts ("\n** No boot device **\n");
566a494f 411 SHOW_BOOT_PROGRESS (-43);
c609719b
WD		 412 return 1;
413 }
566a494f 414 SHOW_BOOT_PROGRESS (43);
c609719b
WD		 415
416 dev = simple_strtoul(boot_device, &ep, 16);
417
418 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
419 printf ("\n** Device %d not available\n", dev);
566a494f 420 SHOW_BOOT_PROGRESS (-44);
c609719b
WD		 421 return 1;
422 }
566a494f 423 SHOW_BOOT_PROGRESS (44);
c609719b
WD		 424
425 if (*ep) {
426 if (*ep != ':') {
427 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
566a494f 428 SHOW_BOOT_PROGRESS (-45);
c609719b
WD		 429 return 1;
430 }
431 part = simple_strtoul(++ep, NULL, 16);
432 }
566a494f 433 SHOW_BOOT_PROGRESS (45);
7882751c 434 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
566a494f 435 SHOW_BOOT_PROGRESS (-46);
c609719b
WD		 436 return 1;
437 }
566a494f 438 SHOW_BOOT_PROGRESS (46);
77ddac94
WD		 439 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
440 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
c609719b
WD		 441 printf ("\n** Invalid partition type \"%.32s\""
442 " (expect \"" BOOT_PART_TYPE "\")\n",
443 info.type);
566a494f 444 SHOW_BOOT_PROGRESS (-47);
c609719b
WD		 445 return 1;
446 }
566a494f 447 SHOW_BOOT_PROGRESS (47);
c609719b
WD		 448
449 printf ("\nLoading from IDE device %d, partition %d: "
450 "Name: %.32s Type: %.32s\n",
451 dev, part, info.name, info.type);
452
1a344f29 453 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
c609719b
WD		 454 info.start, info.size, info.blksz);
455
456 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
457 printf ("** Read error on %d:%d\n", dev, part);
566a494f 458 SHOW_BOOT_PROGRESS (-48);
c609719b
WD		 459 return 1;
460 }
566a494f 461 SHOW_BOOT_PROGRESS (48);
c609719b
WD		 462
463 hdr = (image_header_t *)addr;
464
1a344f29 465 if (ntohl(hdr->ih_magic) != IH_MAGIC) {
c609719b 466 printf("\n** Bad Magic Number **\n");
566a494f 467 SHOW_BOOT_PROGRESS (-49);
c609719b
WD		 468 return 1;
469 }
566a494f 470 SHOW_BOOT_PROGRESS (49);
c609719b 471
1a344f29
WD		 472 checksum = ntohl(hdr->ih_hcrc);
473 hdr->ih_hcrc = 0;
474
77ddac94 475 if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
1a344f29 476 puts ("\n** Bad Header Checksum **\n");
566a494f 477 SHOW_BOOT_PROGRESS (-50);
1a344f29
WD		 478 return 1;
479 }
566a494f 480 SHOW_BOOT_PROGRESS (50);
b9649854 481 hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
1a344f29
WD		 482
483 print_image_hdr (hdr);
484
485 cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
486 cnt += info.blksz - 1;
487 cnt /= info.blksz;
488 cnt -= 1;
489
c609719b
WD		 490 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
491 (ulong *)(addr+info.blksz)) != cnt) {
492 printf ("** Read error on %d:%d\n", dev, part);
566a494f 493 SHOW_BOOT_PROGRESS (-51);
c609719b
WD		 494 return 1;
495 }
566a494f 496 SHOW_BOOT_PROGRESS (51);
c609719b
WD		 497
498
499 /* Loading ok, update default load address */
500
501 load_addr = addr;
502
503 /* Check if we should attempt an auto-start */
504 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
505 char *local_args[2];
506 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
507
508 local_args[0] = argv[0];
509 local_args[1] = NULL;
510
511 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
512
513 do_bootm (cmdtp, 0, 1, local_args);
514 rcode = 1;
515 }
516 return rcode;
517}
518
519/* ------------------------------------------------------------------------- */
520
521void ide_init (void)
522{
c609719b
WD		 523
524#ifdef CONFIG_IDE_8xx_DIRECT
525 volatile immap_t *immr = (immap_t *)CFG_IMMR;
526 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
527#endif
528 unsigned char c;
529 int i, bus;
51056dd9 530#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
9045f33c
WD		 531 unsigned int ata_reset_time = ATA_RESET_TIME;
532 char *s;
51056dd9 533#endif
c7de829c
WD		 534#ifdef CONFIG_AMIGAONEG3SE
535 unsigned int max_bus_scan;
c7de829c 536#endif
9fd5e31f
WD		 537#ifdef CONFIG_IDE_8xx_PCCARD
538 extern int pcmcia_on (void);
539 extern int ide_devices_found; /* Initialized in check_ide_device() */
540#endif /* CONFIG_IDE_8xx_PCCARD */
541
542#ifdef CONFIG_IDE_PREINIT
4d13cbad 543 extern int ide_preinit (void);
9fd5e31f
WD		 544 WATCHDOG_RESET();
545
546 if (ide_preinit ()) {
547 puts ("ide_preinit failed\n");
548 return;
549 }
550#endif /* CONFIG_IDE_PREINIT */
c609719b
WD		 551
552#ifdef CONFIG_IDE_8xx_PCCARD
553 extern int pcmcia_on (void);
6069ff26 554 extern int ide_devices_found; /* Initialized in check_ide_device() */
c609719b
WD		 555
556 WATCHDOG_RESET();
557
6069ff26 558 ide_devices_found = 0;
c609719b 559 /* initialize the PCMCIA IDE adapter card */
6069ff26
WD		 560 pcmcia_on();
561 if (!ide_devices_found)
c609719b
WD		 562 return;
563 udelay (1000000); /* 1 s */
564#endif /* CONFIG_IDE_8xx_PCCARD */
565
566 WATCHDOG_RESET();
567
15647dc7 568#ifdef CONFIG_IDE_8xx_DIRECT
c609719b
WD		 569 /* Initialize PIO timing tables */
570 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
1a344f29
WD		 571 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
572 gd->bus_clk);
573 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
574 gd->bus_clk);
575 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
576 gd->bus_clk);
577 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
578 " len=%3d ns/%d clk"
579 " hold=%2d ns/%d clk\n",
580 i,
581 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
582 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
583 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
c609719b 584 }
15647dc7 585#endif /* CONFIG_IDE_8xx_DIRECT */
c609719b
WD		 586
587 /* Reset the IDE just to be sure.
588 * Light LED's to show
589 */
590 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
591 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
592
593#ifdef CONFIG_IDE_8xx_DIRECT
594 /* PCMCIA / IDE initialization for common mem space */
595 pcmp->pcmc_pgcrb = 0;
c609719b
WD		 596
597 /* start in PIO mode 0 - most relaxed timings */
598 pio_mode = 0;
599 set_pcmcia_timing (pio_mode);
15647dc7 600#endif /* CONFIG_IDE_8xx_DIRECT */
c609719b
WD		 601
602 /*
603 * Wait for IDE to get ready.
604 * According to spec, this can take up to 31 seconds!
605 */
c7de829c 606#ifndef CONFIG_AMIGAONEG3SE
c609719b
WD		 607 for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
608 int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
c7de829c
WD		 609#else
610 s = getenv("ide_maxbus");
611 if (s)
1a344f29 612 max_bus_scan = simple_strtol(s, NULL, 10);
c7de829c 613 else
1a344f29 614 max_bus_scan = CFG_IDE_MAXBUS;
c7de829c
WD		 615
616 for (bus=0; bus<max_bus_scan; ++bus) {
617 int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
618#endif
c609719b 619
6069ff26
WD		 620#ifdef CONFIG_IDE_8xx_PCCARD
621 /* Skip non-ide devices from probing */
622 if ((ide_devices_found & (1 << bus)) == 0) {
623 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
624 continue;
625 }
626#endif
c609719b
WD		 627 printf ("Bus %d: ", bus);
628
629 ide_bus_ok[bus] = 0;
630
631 /* Select device
632 */
633 udelay (100000); /* 100 ms */
2262cfee 634 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
c609719b 635 udelay (100000); /* 100 ms */
51056dd9
WD		 636#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
637 if ((s = getenv("ide_reset_timeout")) != NULL)
638 ata_reset_time = simple_strtol(s, NULL, 10);
c7de829c 639#endif
c609719b
WD		 640 i = 0;
641 do {
642 udelay (10000); /* 10 ms */
643
2262cfee 644 c = ide_inb (dev, ATA_STATUS);
c609719b 645 i++;
51056dd9 646#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
c7de829c
WD		 647 if (i > (ata_reset_time * 100)) {
648#else
c609719b 649 if (i > (ATA_RESET_TIME * 100)) {
c7de829c 650#endif
c609719b
WD		 651 puts ("** Timeout **\n");
652 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
c7de829c
WD		 653#ifdef CONFIG_AMIGAONEG3SE
654 /* If this is the second bus, the first one was OK */
c40b2956 655 if (bus != 0) {
1a344f29
WD		 656 ide_bus_ok[bus] = 0;
657 goto skip_bus;
c7de829c
WD		 658 }
659#endif
c609719b
WD		 660 return;
661 }
662 if ((i >= 100) && ((i%100)==0)) {
663 putc ('.');
664 }
665 } while (c & ATA_STAT_BUSY);
666
667 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
668 puts ("not available ");
1a344f29 669 debug ("Status = 0x%02X ", c);
c609719b
WD		 670#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
671 } else if ((c & ATA_STAT_READY) == 0) {
672 puts ("not available ");
1a344f29 673 debug ("Status = 0x%02X ", c);
c609719b
WD		 674#endif
675 } else {
676 puts ("OK ");
677 ide_bus_ok[bus] = 1;
678 }
679 WATCHDOG_RESET();
680 }
c7de829c
WD		 681
682#ifdef CONFIG_AMIGAONEG3SE
683 skip_bus:
684#endif
c609719b
WD		 685 putc ('\n');
686
687 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
688
689 curr_device = -1;
690 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
691#ifdef CONFIG_IDE_LED
692 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
693#endif
5cf9da48 694 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
c609719b
WD		 695 ide_dev_desc[i].if_type=IF_TYPE_IDE;
696 ide_dev_desc[i].dev=i;
697 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
698 ide_dev_desc[i].blksz=0;
699 ide_dev_desc[i].lba=0;
700 ide_dev_desc[i].block_read=ide_read;
701 if (!ide_bus_ok[IDE_BUS(i)])
702 continue;
703 ide_led (led, 1); /* LED on */
704 ide_ident(&ide_dev_desc[i]);
705 ide_led (led, 0); /* LED off */
706 dev_print(&ide_dev_desc[i]);
707/* ide_print (i); */
708 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
709 init_part (&ide_dev_desc[i]); /* initialize partition type */
710 if (curr_device < 0)
711 curr_device = i;
712 }
713 }
714 WATCHDOG_RESET();
715}
716
717/* ------------------------------------------------------------------------- */
718
719block_dev_desc_t * ide_get_dev(int dev)
720{
735dd97b 721 return (dev < CFG_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
c609719b
WD		 722}
723
724
725#ifdef CONFIG_IDE_8xx_DIRECT
726
727static void
728set_pcmcia_timing (int pmode)
729{
730 volatile immap_t *immr = (immap_t *)CFG_IMMR;
731 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
732 ulong timings;
733
1a344f29 734 debug ("Set timing for PIO Mode %d\n", pmode);
c609719b
WD		 735
736 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
737 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
738 | PCMCIA_SL (pio_config_clk[pmode].t_length)
739 ;
740
741 /* IDE 0
742 */
743 pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
744 pcmp->pcmc_por0 = CFG_PCMCIA_POR0
745#if (CFG_PCMCIA_POR0 != 0)
746 | timings
747#endif
748 ;
1a344f29 749 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
c609719b
WD		 750
751 pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
752 pcmp->pcmc_por1 = CFG_PCMCIA_POR1
753#if (CFG_PCMCIA_POR1 != 0)
754 | timings
755#endif
756 ;
1a344f29 757 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
c609719b
WD		 758
759 pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
760 pcmp->pcmc_por2 = CFG_PCMCIA_POR2
761#if (CFG_PCMCIA_POR2 != 0)
762 | timings
763#endif
764 ;
1a344f29 765 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
c609719b
WD		 766
767 pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
768 pcmp->pcmc_por3 = CFG_PCMCIA_POR3
769#if (CFG_PCMCIA_POR3 != 0)
770 | timings
771#endif
772 ;
1a344f29 773 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
c609719b
WD		 774
775 /* IDE 1
776 */
777 pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
778 pcmp->pcmc_por4 = CFG_PCMCIA_POR4
779#if (CFG_PCMCIA_POR4 != 0)
780 | timings
781#endif
782 ;
1a344f29 783 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
c609719b
WD		 784
785 pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
786 pcmp->pcmc_por5 = CFG_PCMCIA_POR5
787#if (CFG_PCMCIA_POR5 != 0)
788 | timings
789#endif
790 ;
1a344f29 791 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
c609719b
WD		 792
793 pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
794 pcmp->pcmc_por6 = CFG_PCMCIA_POR6
795#if (CFG_PCMCIA_POR6 != 0)
796 | timings
797#endif
798 ;
1a344f29 799 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
c609719b
WD		 800
801 pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
802 pcmp->pcmc_por7 = CFG_PCMCIA_POR7
803#if (CFG_PCMCIA_POR7 != 0)
804 | timings
805#endif
806 ;
1a344f29 807 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
c609719b
WD		 808
809}
810
811#endif /* CONFIG_IDE_8xx_DIRECT */
812
813/* ------------------------------------------------------------------------- */
814
db01a2ea 815#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b 816static void __inline__
2262cfee 817ide_outb(int dev, int port, unsigned char val)
c609719b 818{
1a344f29 819 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
9fd5e31f 820 dev, port, val, (ATA_CURR_BASE(dev)+port));
d4ca31c4 821
c609719b 822 /* Ensure I/O operations complete */
5cf91d6b 823 EIEIO;
566a494f 824 *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val;
c609719b 825}
2262cfee
WD		 826#else /* ! __PPC__ */
827static void __inline__
828ide_outb(int dev, int port, unsigned char val)
829{
566a494f 830 outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
2262cfee
WD		 831}
832#endif /* __PPC__ */
833
c609719b 834
db01a2ea 835#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b 836static unsigned char __inline__
2262cfee 837ide_inb(int dev, int port)
c609719b
WD		 838{
839 uchar val;
840 /* Ensure I/O operations complete */
5cf91d6b 841 EIEIO;
566a494f 842 val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
1a344f29 843 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
9fd5e31f 844 dev, port, (ATA_CURR_BASE(dev)+port), val);
c609719b
WD		 845 return (val);
846}
2262cfee
WD		 847#else /* ! __PPC__ */
848static unsigned char __inline__
849ide_inb(int dev, int port)
850{
566a494f 851 return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
2262cfee
WD		 852}
853#endif /* __PPC__ */
c609719b 854
2262cfee 855#ifdef __PPC__
cceb871f 856# ifdef CONFIG_AMIGAONEG3SE
c7de829c
WD		 857static void
858output_data_short(int dev, ulong *sect_buf, int words)
859{
860 ushort *dbuf;
861 volatile ushort *pbuf;
8bde7f77 862
c7de829c
WD		 863 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
864 dbuf = (ushort *)sect_buf;
865 while (words--) {
5cf91d6b 866 EIEIO;
c7de829c 867 *pbuf = *dbuf++;
5cf91d6b 868 EIEIO;
c7de829c
WD		 869 }
870
871 if (words&1)
1a344f29 872 *pbuf = 0;
c7de829c 873}
cceb871f 874# endif /* CONFIG_AMIGAONEG3SE */
5da627a4 875#endif /* __PPC_ */
c7de829c 876
5da627a4
WD		 877/* We only need to swap data if we are running on a big endian cpu. */
878/* But Au1x00 cpu:s already swaps data in big endian mode! */
0c32d96d 879#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
5da627a4
WD		 880#define input_swap_data(x,y,z) input_data(x,y,z)
881#else
c609719b
WD		 882static void
883input_swap_data(int dev, ulong *sect_buf, int words)
884{
1a344f29 885#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 886 uchar i;
887 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
888 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
889 ushort *dbuf = (ushort *)sect_buf;
890
891 while (words--) {
892 for (i=0; i<2; i++) {
893 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
894 *(uchar *)dbuf = *pbuf_odd;
895 dbuf+=1;
896 }
897 }
f4733a07 898#else
1a344f29
WD		 899 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
900 ushort *dbuf = (ushort *)sect_buf;
901
902 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
903
904 while (words--) {
0c32d96d
WD		 905#ifdef __MIPS__
906 *dbuf++ = swab16p((u16*)pbuf);
907 *dbuf++ = swab16p((u16*)pbuf);
566a494f
HS		 908#elif defined(CONFIG_PCS440EP)
909 *dbuf++ = *pbuf;
910 *dbuf++ = *pbuf;
0c32d96d 911#else
1a344f29
WD		 912 *dbuf++ = ld_le16(pbuf);
913 *dbuf++ = ld_le16(pbuf);
0c32d96d 914#endif /* !MIPS */
1a344f29
WD		 915 }
916#endif
c609719b 917}
5da627a4 918#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
2262cfee
WD		 919
920
db01a2ea 921#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b
WD		 922static void
923output_data(int dev, ulong *sect_buf, int words)
924{
1a344f29 925#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 926 uchar *dbuf;
927 volatile uchar *pbuf_even;
928 volatile uchar *pbuf_odd;
929
930 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
931 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
932 dbuf = (uchar *)sect_buf;
933 while (words--) {
5cf91d6b 934 EIEIO;
a522fa0e 935 *pbuf_even = *dbuf++;
5cf91d6b 936 EIEIO;
a522fa0e 937 *pbuf_odd = *dbuf++;
5cf91d6b 938 EIEIO;
a522fa0e 939 *pbuf_even = *dbuf++;
5cf91d6b 940 EIEIO;
a522fa0e
WD		 941 *pbuf_odd = *dbuf++;
942 }
1a344f29
WD		 943#else
944 ushort *dbuf;
945 volatile ushort *pbuf;
946
947 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
948 dbuf = (ushort *)sect_buf;
949 while (words--) {
566a494f
HS		 950#if defined(CONFIG_PCS440EP)
951 /* not tested, because CF was write protected */
952 EIEIO;
953 *pbuf = ld_le16(dbuf++);
954 EIEIO;
955 *pbuf = ld_le16(dbuf++);
956#else
1a344f29
WD		 957 EIEIO;
958 *pbuf = *dbuf++;
959 EIEIO;
960 *pbuf = *dbuf++;
566a494f 961#endif
1a344f29
WD		 962 }
963#endif
c609719b 964}
2262cfee
WD		 965#else /* ! __PPC__ */
966static void
967output_data(int dev, ulong *sect_buf, int words)
968{
15647dc7 969 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
2262cfee
WD		 970}
971#endif /* __PPC__ */
c609719b 972
db01a2ea 973#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b
WD		 974static void
975input_data(int dev, ulong *sect_buf, int words)
976{
1a344f29 977#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 978 uchar *dbuf;
979 volatile uchar *pbuf_even;
980 volatile uchar *pbuf_odd;
981
982 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
983 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
984 dbuf = (uchar *)sect_buf;
985 while (words--) {
1a344f29 986 *dbuf++ = *pbuf_even;
cd172b71 987 EIEIO;
1a344f29
WD		 988 SYNC;
989 *dbuf++ = *pbuf_odd;
5cf91d6b 990 EIEIO;
1a344f29 991 SYNC;
a522fa0e 992 *dbuf++ = *pbuf_even;
5cf91d6b 993 EIEIO;
1a344f29 994 SYNC;
a522fa0e 995 *dbuf++ = *pbuf_odd;
5cf91d6b 996 EIEIO;
1a344f29
WD		 997 SYNC;
998 }
999#else
1000 ushort *dbuf;
1001 volatile ushort *pbuf;
1002
1003 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1004 dbuf = (ushort *)sect_buf;
1005
1006 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
1007
1008 while (words--) {
566a494f
HS		 1009#if defined(CONFIG_PCS440EP)
1010 EIEIO;
1011 *dbuf++ = ld_le16(pbuf);
1012 EIEIO;
1013 *dbuf++ = ld_le16(pbuf);
1014#else
cd172b71 1015 EIEIO;
1a344f29 1016 *dbuf++ = *pbuf;
cd172b71 1017 EIEIO;
1a344f29 1018 *dbuf++ = *pbuf;
566a494f 1019#endif
a522fa0e 1020 }
1a344f29 1021#endif
c609719b 1022}
2262cfee
WD		 1023#else /* ! __PPC__ */
1024static void
1025input_data(int dev, ulong *sect_buf, int words)
1026{
15647dc7 1027 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
2262cfee
WD		 1028}
1029
1030#endif /* __PPC__ */
c609719b 1031
c7de829c
WD		 1032#ifdef CONFIG_AMIGAONEG3SE
1033static void
1034input_data_short(int dev, ulong *sect_buf, int words)
1035{
1036 ushort *dbuf;
1037 volatile ushort *pbuf;
1038
1039 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1040 dbuf = (ushort *)sect_buf;
1041 while (words--) {
5cf91d6b 1042 EIEIO;
c7de829c 1043 *dbuf++ = *pbuf;
5cf91d6b 1044 EIEIO;
c7de829c
WD		 1045 }
1046
c40b2956 1047 if (words&1) {
1a344f29
WD		 1048 ushort dummy;
1049 dummy = *pbuf;
c7de829c
WD		 1050 }
1051}
1052#endif
1053
c609719b
WD		 1054/* -------------------------------------------------------------------------
1055 */
1056static void ide_ident (block_dev_desc_t *dev_desc)
1057{
1058 ulong iobuf[ATA_SECTORWORDS];
1059 unsigned char c;
1060 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1061
c7de829c
WD		 1062#ifdef CONFIG_AMIGAONEG3SE
1063 int max_bus_scan;
c7de829c 1064 char *s;
64f70bed
WD		 1065#endif
1066#ifdef CONFIG_ATAPI
1067 int retries = 0;
c7de829c
WD		 1068 int do_retry = 0;
1069#endif
1070
c609719b
WD		 1071#if 0
1072 int mode, cycle_time;
1073#endif
1074 int device;
1075 device=dev_desc->dev;
1076 printf (" Device %d: ", device);
1077
c7de829c
WD		 1078#ifdef CONFIG_AMIGAONEG3SE
1079 s = getenv("ide_maxbus");
1080 if (s) {
1081 max_bus_scan = simple_strtol(s, NULL, 10);
1082 } else {
1083 max_bus_scan = CFG_IDE_MAXBUS;
1084 }
1085 if (device >= max_bus_scan*2) {
1086 dev_desc->type=DEV_TYPE_UNKNOWN;
1087 return;
1088 }
1089#endif
1090
c609719b
WD		 1091 ide_led (DEVICE_LED(device), 1); /* LED on */
1092 /* Select device
1093 */
2262cfee 1094 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1095 dev_desc->if_type=IF_TYPE_IDE;
1096#ifdef CONFIG_ATAPI
c7de829c 1097
c7de829c
WD		 1098 do_retry = 0;
1099 retries = 0;
1100
1101 /* Warning: This will be tricky to read */
c40b2956 1102 while (retries <= 1) {
c609719b 1103 /* check signature */
2262cfee
WD		 1104 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1105 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1106 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1107 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
c609719b
WD		 1108 /* ATAPI Signature found */
1109 dev_desc->if_type=IF_TYPE_ATAPI;
1110 /* Start Ident Command
1111 */
2262cfee 1112 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
c609719b
WD		 1113 /*
1114 * Wait for completion - ATAPI devices need more time
1115 * to become ready
1116 */
1117 c = ide_wait (device, ATAPI_TIME_OUT);
c40b2956 1118 } else
c609719b
WD		 1119#endif
1120 {
1121 /* Start Ident Command
1122 */
2262cfee 1123 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
c609719b
WD		 1124
1125 /* Wait for completion
1126 */
1127 c = ide_wait (device, IDE_TIME_OUT);
1128 }
1129 ide_led (DEVICE_LED(device), 0); /* LED off */
1130
1131 if (((c & ATA_STAT_DRQ) == 0) ||
1132 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
64f70bed 1133#ifdef CONFIG_ATAPI
c7de829c 1134#ifdef CONFIG_AMIGAONEG3SE
64f70bed
WD		 1135 s = getenv("ide_doreset");
1136 if (s && strcmp(s, "on") == 0)
1137#endif
1a344f29
WD		 1138 {
1139 /* Need to soft reset the device in case it's an ATAPI... */
1140 debug ("Retrying...\n");
1141 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1142 udelay(100000);
1143 ide_outb (device, ATA_COMMAND, 0x08);
1144 udelay (500000); /* 500 ms */
1145 }
64f70bed
WD		 1146 /* Select device
1147 */
c7de829c 1148 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c7de829c 1149 retries++;
64f70bed
WD		 1150#else
1151 return;
1152#endif
c609719b 1153 }
64f70bed
WD		 1154#ifdef CONFIG_ATAPI
1155 else
1156 break;
c7de829c 1157 } /* see above - ugly to read */
64f70bed
WD		 1158
1159 if (retries == 2) /* Not found */
1160 return;
1161#endif
c609719b
WD		 1162
1163 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1164
1165 ident_cpy (dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1166 ident_cpy (dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1167 ident_cpy (dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
c3f9d493
WD		 1168#ifdef __LITTLE_ENDIAN
1169 /*
1170 * firmware revision and model number have Big Endian Byte
1171 * order in Word. Convert both to little endian.
1172 *
1173 * See CF+ and CompactFlash Specification Revision 2.0:
1174 * 6.2.1.6: Identfy Drive, Table 39 for more details
1175 */
1176
1177 strswab (dev_desc->revision);
1178 strswab (dev_desc->vendor);
1179#endif /* __LITTLE_ENDIAN */
c609719b
WD		 1180
1181 if ((iop->config & 0x0080)==0x0080)
1182 dev_desc->removable = 1;
1183 else
1184 dev_desc->removable = 0;
1185
1186#if 0
1187 /*
1188 * Drive PIO mode autoselection
1189 */
1190 mode = iop->tPIO;
1191
1192 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1193 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1194 mode = 2;
1a344f29 1195 debug ("Override tPIO -> 2\n");
c609719b
WD		 1196 }
1197 if (iop->field_valid & 2) { /* drive implements ATA2? */
1a344f29 1198 debug ("Drive implements ATA2\n");
c609719b
WD		 1199 if (iop->capability & 8) { /* drive supports use_iordy? */
1200 cycle_time = iop->eide_pio_iordy;
1201 } else {
1202 cycle_time = iop->eide_pio;
1203 }
1a344f29 1204 debug ("cycle time = %d\n", cycle_time);
c609719b
WD		 1205 mode = 4;
1206 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1207 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1208 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1209 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1210 }
1211 printf ("PIO mode to use: PIO %d\n", mode);
1212#endif /* 0 */
1213
1214#ifdef CONFIG_ATAPI
1215 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1216 atapi_inquiry(dev_desc);
1217 return;
1218 }
1219#endif /* CONFIG_ATAPI */
1220
c3f9d493 1221#ifdef __BIG_ENDIAN
c609719b
WD		 1222 /* swap shorts */
1223 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
c3f9d493
WD		 1224#else /* ! __BIG_ENDIAN */
1225 /*
1226 * do not swap shorts on little endian
1227 *
1228 * See CF+ and CompactFlash Specification Revision 2.0:
1229 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1230 */
1231 dev_desc->lba = iop->lba_capacity;
1232#endif /* __BIG_ENDIAN */
c40b2956 1233
42dfe7a1 1234#ifdef CONFIG_LBA48
c40b2956 1235 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
6e592385
WD		 1236 dev_desc->lba48 = 1;
1237 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
c40b2956
WD		 1238 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1239 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1240 ((unsigned long long)iop->lba48_capacity[3] << 48);
1241 } else {
c40b2956
WD		 1242 dev_desc->lba48 = 0;
1243 }
1244#endif /* CONFIG_LBA48 */
c609719b
WD		 1245 /* assuming HD */
1246 dev_desc->type=DEV_TYPE_HARDDISK;
1247 dev_desc->blksz=ATA_BLOCKSIZE;
1248 dev_desc->lun=0; /* just to fill something in... */
1249
1250#if 0 /* only used to test the powersaving mode,
1251 * if enabled, the drive goes after 5 sec
1252 * in standby mode */
2262cfee 1253 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1254 c = ide_wait (device, IDE_TIME_OUT);
2262cfee
WD		 1255 ide_outb (device, ATA_SECT_CNT, 1);
1256 ide_outb (device, ATA_LBA_LOW, 0);
1257 ide_outb (device, ATA_LBA_MID, 0);
1258 ide_outb (device, ATA_LBA_HIGH, 0);
1a344f29 1259 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
2262cfee 1260 ide_outb (device, ATA_COMMAND, 0xe3);
c609719b
WD		 1261 udelay (50);
1262 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1263#endif
1264}
1265
1266
1267/* ------------------------------------------------------------------------- */
1268
eb867a76 1269ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD		 1270{
1271 ulong n = 0;
1272 unsigned char c;
1273 unsigned char pwrsave=0; /* power save */
42dfe7a1 1274#ifdef CONFIG_LBA48
c40b2956 1275 unsigned char lba48 = 0;
c609719b 1276
c40b2956
WD		 1277 if (blknr & 0x0000fffff0000000) {
1278 /* more than 28 bits used, use 48bit mode */
1279 lba48 = 1;
1280 }
1281#endif
1a344f29 1282 debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
c609719b
WD		 1283 device, blknr, blkcnt, (ulong)buffer);
1284
1285 ide_led (DEVICE_LED(device), 1); /* LED on */
1286
1287 /* Select device
1288 */
2262cfee 1289 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1290 c = ide_wait (device, IDE_TIME_OUT);
1291
1292 if (c & ATA_STAT_BUSY) {
1293 printf ("IDE read: device %d not ready\n", device);
1294 goto IDE_READ_E;
1295 }
1296
1297 /* first check if the drive is in Powersaving mode, if yes,
1298 * increase the timeout value */
2262cfee 1299 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
c609719b
WD		 1300 udelay (50);
1301
1302 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1303
1304 if (c & ATA_STAT_BUSY) {
1305 printf ("IDE read: device %d not ready\n", device);
1306 goto IDE_READ_E;
1307 }
1308 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1309 printf ("No Powersaving mode %X\n", c);
1310 } else {
2262cfee 1311 c = ide_inb(device,ATA_SECT_CNT);
1a344f29 1312 debug ("Powersaving %02X\n",c);
c609719b
WD		 1313 if(c==0)
1314 pwrsave=1;
1315 }
1316
1317
1318 while (blkcnt-- > 0) {
1319
1320 c = ide_wait (device, IDE_TIME_OUT);
1321
1322 if (c & ATA_STAT_BUSY) {
1323 printf ("IDE read: device %d not ready\n", device);
1324 break;
1325 }
42dfe7a1 1326#ifdef CONFIG_LBA48
c40b2956
WD		 1327 if (lba48) {
1328 /* write high bits */
1329 ide_outb (device, ATA_SECT_CNT, 0);
1330 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1331 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1332 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1333 }
1334#endif
2262cfee
WD		 1335 ide_outb (device, ATA_SECT_CNT, 1);
1336 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1337 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1338 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1339
42dfe7a1 1340#ifdef CONFIG_LBA48
c40b2956
WD		 1341 if (lba48) {
1342 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1343 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1344
1345 } else
1346#endif
1347 {
1348 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1349 ATA_DEVICE(device) |
1350 ((blknr >> 24) & 0xF) );
1351 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1352 }
c609719b
WD		 1353
1354 udelay (50);
1355
1356 if(pwrsave) {
1357 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1358 pwrsave=0;
1359 } else {
1360 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1361 }
1362
1363 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1364#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1365 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1366 device, blknr, c);
c40b2956
WD		 1367#else
1368 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1369 device, (ulong)blknr, c);
1370#endif
c609719b
WD		 1371 break;
1372 }
1373
1374 input_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1375 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD		 1376
1377 ++n;
1378 ++blknr;
0b94504d 1379 buffer += ATA_BLOCKSIZE;
c609719b
WD		 1380 }
1381IDE_READ_E:
1382 ide_led (DEVICE_LED(device), 0); /* LED off */
1383 return (n);
1384}
1385
1386/* ------------------------------------------------------------------------- */
1387
1388
eb867a76 1389ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD		 1390{
1391 ulong n = 0;
1392 unsigned char c;
42dfe7a1 1393#ifdef CONFIG_LBA48
c40b2956
WD		 1394 unsigned char lba48 = 0;
1395
1396 if (blknr & 0x0000fffff0000000) {
1397 /* more than 28 bits used, use 48bit mode */
1398 lba48 = 1;
1399 }
1400#endif
c609719b
WD		 1401
1402 ide_led (DEVICE_LED(device), 1); /* LED on */
1403
1404 /* Select device
1405 */
2262cfee 1406 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1407
1408 while (blkcnt-- > 0) {
1409
1410 c = ide_wait (device, IDE_TIME_OUT);
1411
1412 if (c & ATA_STAT_BUSY) {
1413 printf ("IDE read: device %d not ready\n", device);
1414 goto WR_OUT;
1415 }
42dfe7a1 1416#ifdef CONFIG_LBA48
c40b2956
WD		 1417 if (lba48) {
1418 /* write high bits */
1419 ide_outb (device, ATA_SECT_CNT, 0);
1420 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1421 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1422 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1423 }
1424#endif
2262cfee
WD		 1425 ide_outb (device, ATA_SECT_CNT, 1);
1426 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1427 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1428 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1429
42dfe7a1 1430#ifdef CONFIG_LBA48
c40b2956
WD		 1431 if (lba48) {
1432 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1433 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1434
1435 } else
1436#endif
1437 {
1438 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1439 ATA_DEVICE(device) |
1440 ((blknr >> 24) & 0xF) );
1441 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1442 }
c609719b
WD		 1443
1444 udelay (50);
1445
1446 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1447
1448 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1449#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1450 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1451 device, blknr, c);
c40b2956
WD		 1452#else
1453 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1454 device, (ulong)blknr, c);
1455#endif
c609719b
WD		 1456 goto WR_OUT;
1457 }
1458
1459 output_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1460 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD		 1461 ++n;
1462 ++blknr;
0b94504d 1463 buffer += ATA_BLOCKSIZE;
c609719b
WD		 1464 }
1465WR_OUT:
1466 ide_led (DEVICE_LED(device), 0); /* LED off */
1467 return (n);
1468}
1469
1470/* ------------------------------------------------------------------------- */
1471
1472/*
1473 * copy src to dest, skipping leading and trailing blanks and null
1474 * terminate the string
7d7ce412 1475 * "len" is the size of available memory including the terminating '\0'
c609719b 1476 */
7d7ce412 1477static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
c609719b 1478{
7d7ce412
WD		 1479 unsigned char *end, *last;
1480
1481 last = dst;
6fb6af6d 1482 end = src + len - 1;
7d7ce412
WD		 1483
1484 /* reserve space for '\0' */
1485 if (len < 2)
1486 goto OUT;
efa329cb 1487
7d7ce412
WD		 1488 /* skip leading white space */
1489 while ((*src) && (src<end) && (*src==' '))
1490 ++src;
1491
1492 /* copy string, omitting trailing white space */
1493 while ((*src) && (src<end)) {
1494 *dst++ = *src;
1495 if (*src++ != ' ')
1496 last = dst;
c609719b 1497 }
7d7ce412
WD		 1498OUT:
1499 *last = '\0';
c609719b
WD		 1500}
1501
1502/* ------------------------------------------------------------------------- */
1503
1504/*
1505 * Wait until Busy bit is off, or timeout (in ms)
1506 * Return last status
1507 */
1508static uchar ide_wait (int dev, ulong t)
1509{
1510 ulong delay = 10 * t; /* poll every 100 us */
1511 uchar c;
1512
2262cfee 1513 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
c609719b
WD		 1514 udelay (100);
1515 if (delay-- == 0) {
1516 break;
1517 }
1518 }
1519 return (c);
1520}
1521
1522/* ------------------------------------------------------------------------- */
1523
1524#ifdef CONFIG_IDE_RESET
1525extern void ide_set_reset(int idereset);
1526
1527static void ide_reset (void)
1528{
1529#if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
1530 volatile immap_t *immr = (immap_t *)CFG_IMMR;
1531#endif
1532 int i;
1533
1534 curr_device = -1;
1535 for (i=0; i<CFG_IDE_MAXBUS; ++i)
1536 ide_bus_ok[i] = 0;
1537 for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
1538 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1539
1540 ide_set_reset (1); /* assert reset */
1541
1542 WATCHDOG_RESET();
1543
1544#ifdef CFG_PB_12V_ENABLE
1545 immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
1546 immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
1547 immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
1548 immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
1549
1550 /* wait 500 ms for the voltage to stabilize
1551 */
1552 for (i=0; i<500; ++i) {
1553 udelay (1000);
1554 }
1555
1556 immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
1557#endif /* CFG_PB_12V_ENABLE */
1558
1559#ifdef CFG_PB_IDE_MOTOR
1560 /* configure IDE Motor voltage monitor pin as input */
1561 immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
1562 immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
1563 immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
1564
1565 /* wait up to 1 s for the motor voltage to stabilize
1566 */
1567 for (i=0; i<1000; ++i) {
1568 if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
1569 break;
1570 }
1571 udelay (1000);
1572 }
1573
1574 if (i == 1000) { /* Timeout */
1575 printf ("\nWarning: 5V for IDE Motor missing\n");
1576# ifdef CONFIG_STATUS_LED
1577# ifdef STATUS_LED_YELLOW
1578 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1579# endif
1580# ifdef STATUS_LED_GREEN
1581 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1582# endif
1583# endif /* CONFIG_STATUS_LED */
1584 }
1585#endif /* CFG_PB_IDE_MOTOR */
1586
1587 WATCHDOG_RESET();
1588
1589 /* de-assert RESET signal */
1590 ide_set_reset(0);
1591
1592 /* wait 250 ms */
1593 for (i=0; i<250; ++i) {
1594 udelay (1000);
1595 }
1596}
1597
1598#endif /* CONFIG_IDE_RESET */
1599
1600/* ------------------------------------------------------------------------- */
1601
e2ffd59b
WD		 1602#if defined(CONFIG_IDE_LED) && \
1603 !defined(CONFIG_AMIGAONEG3SE)&& \
1604 !defined(CONFIG_CPC45) && \
1605 !defined(CONFIG_HMI10) && \
1606 !defined(CONFIG_KUP4K) && \
1607 !defined(CONFIG_KUP4X)
c609719b
WD		 1608
1609static uchar led_buffer = 0; /* Buffer for current LED status */
1610
1611static void ide_led (uchar led, uchar status)
1612{
1613 uchar *led_port = LED_PORT;
1614
1615 if (status) { /* switch LED on */
1616 led_buffer |= led;
1617 } else { /* switch LED off */
1618 led_buffer &= ~led;
1619 }
1620
1621 *led_port = led_buffer;
1622}
1623
1624#endif /* CONFIG_IDE_LED */
1625
1626/* ------------------------------------------------------------------------- */
1627
1628#ifdef CONFIG_ATAPI
1629/****************************************************************************
1630 * ATAPI Support
1631 */
1632
db01a2ea 1633#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b
WD		 1634/* since ATAPI may use commands with not 4 bytes alligned length
1635 * we have our own transfer functions, 2 bytes alligned */
1636static void
1637output_data_shorts(int dev, ushort *sect_buf, int shorts)
1638{
1a344f29 1639#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 1640 uchar *dbuf;
1641 volatile uchar *pbuf_even;
1642 volatile uchar *pbuf_odd;
1643
1644 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1645 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1646 while (shorts--) {
5cf91d6b 1647 EIEIO;
a522fa0e 1648 *pbuf_even = *dbuf++;
5cf91d6b 1649 EIEIO;
a522fa0e
WD		 1650 *pbuf_odd = *dbuf++;
1651 }
1a344f29 1652#else
c609719b
WD		 1653 ushort *dbuf;
1654 volatile ushort *pbuf;
1655
1656 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1657 dbuf = (ushort *)sect_buf;
db01a2ea 1658
1a344f29 1659 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
db01a2ea 1660
c609719b 1661 while (shorts--) {
5cf91d6b 1662 EIEIO;
1a344f29 1663 *pbuf = *dbuf++;
c609719b 1664 }
1a344f29
WD		 1665#endif
1666}
1667
1668static void
1669input_data_shorts(int dev, ushort *sect_buf, int shorts)
1670{
1671#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 1672 uchar *dbuf;
1673 volatile uchar *pbuf_even;
1674 volatile uchar *pbuf_odd;
1675
1676 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1677 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1678 while (shorts--) {
5cf91d6b 1679 EIEIO;
a522fa0e 1680 *dbuf++ = *pbuf_even;
5cf91d6b 1681 EIEIO;
a522fa0e
WD		 1682 *dbuf++ = *pbuf_odd;
1683 }
1a344f29
WD		 1684#else
1685 ushort *dbuf;
1686 volatile ushort *pbuf;
1687
1688 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1689 dbuf = (ushort *)sect_buf;
1690
1691 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1692
1693 while (shorts--) {
1694 EIEIO;
1695 *dbuf++ = *pbuf;
1696 }
1697#endif
c609719b
WD		 1698}
1699
2262cfee
WD		 1700#else /* ! __PPC__ */
1701static void
1702output_data_shorts(int dev, ushort *sect_buf, int shorts)
1703{
15647dc7 1704 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD		 1705}
1706
2262cfee
WD		 1707static void
1708input_data_shorts(int dev, ushort *sect_buf, int shorts)
1709{
15647dc7 1710 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD		 1711}
1712
1713#endif /* __PPC__ */
1714
c609719b
WD		 1715/*
1716 * Wait until (Status & mask) == res, or timeout (in ms)
1717 * Return last status
1718 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1719 * and then they set their DRQ Bit
1720 */
1721static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1722{
1723 ulong delay = 10 * t; /* poll every 100 us */
1724 uchar c;
1725
2262cfee
WD		 1726 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1727 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
c609719b
WD		 1728 /* break if error occurs (doesn't make sense to wait more) */
1729 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1730 break;
1731 udelay (100);
1732 if (delay-- == 0) {
1733 break;
1734 }
1735 }
1736 return (c);
1737}
1738
1739/*
1740 * issue an atapi command
1741 */
1742unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1743{
1744 unsigned char c,err,mask,res;
1745 int n;
1746 ide_led (DEVICE_LED(device), 1); /* LED on */
1747
1748 /* Select device
1749 */
1750 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1751 res = 0;
c7de829c
WD		 1752#ifdef CONFIG_AMIGAONEG3SE
1753# warning THF: Removed LBA mode ???
1754#endif
2262cfee 1755 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1756 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1757 if ((c & mask) != res) {
1758 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1759 err=0xFF;
1760 goto AI_OUT;
1761 }
1762 /* write taskfile */
2262cfee 1763 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
c7de829c
WD		 1764 ide_outb (device, ATA_SECT_CNT, 0);
1765 ide_outb (device, ATA_SECT_NUM, 0);
2262cfee 1766 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
c7de829c
WD		 1767 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1768#ifdef CONFIG_AMIGAONEG3SE
1769# warning THF: Removed LBA mode ???
1770#endif
2262cfee 1771 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1772
2262cfee 1773 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
c609719b
WD		 1774 udelay (50);
1775
1776 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1777 res = ATA_STAT_DRQ;
1778 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1779
1780 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1781 printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1782 err=0xFF;
1783 goto AI_OUT;
1784 }
1785
1786 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1787 /* ATAPI Command written wait for completition */
1788 udelay (5000); /* device must set bsy */
1789
1790 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1791 /* if no data wait for DRQ = 0 BSY = 0
1792 * if data wait for DRQ = 1 BSY = 0 */
1793 res=0;
1794 if(buflen)
1795 res = ATA_STAT_DRQ;
1796 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1797 if ((c & mask) != res ) {
1798 if (c & ATA_STAT_ERR) {
2262cfee 1799 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1a344f29 1800 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
c609719b
WD		 1801 } else {
1802 printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1803 err=0xFF;
1804 }
1805 goto AI_OUT;
1806 }
2262cfee 1807 n=ide_inb(device, ATA_CYL_HIGH);
c609719b 1808 n<<=8;
2262cfee 1809 n+=ide_inb(device, ATA_CYL_LOW);
c609719b
WD		 1810 if(n>buflen) {
1811 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1812 err=0xff;
1813 goto AI_OUT;
1814 }
1815 if((n==0)&&(buflen<0)) {
1816 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1817 err=0xff;
1818 goto AI_OUT;
1819 }
1820 if(n!=buflen) {
1a344f29 1821 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
c609719b
WD		 1822 }
1823 if(n!=0) { /* data transfer */
1a344f29 1824 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
c609719b
WD		 1825 /* we transfer shorts */
1826 n>>=1;
1827 /* ok now decide if it is an in or output */
2262cfee 1828 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1a344f29 1829 debug ("Write to device\n");
c609719b
WD		 1830 output_data_shorts(device,(unsigned short *)buffer,n);
1831 } else {
1a344f29 1832 debug ("Read from device @ %p shorts %d\n",buffer,n);
c609719b
WD		 1833 input_data_shorts(device,(unsigned short *)buffer,n);
1834 }
1835 }
1836 udelay(5000); /* seems that some CD ROMs need this... */
1837 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1838 res=0;
1839 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1840 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
2262cfee 1841 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1a344f29 1842 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
c609719b
WD		 1843 } else {
1844 err = 0;
1845 }
1846AI_OUT:
1847 ide_led (DEVICE_LED(device), 0); /* LED off */
1848 return (err);
1849}
1850
1851/*
1852 * sending the command to atapi_issue. If an status other than good
1853 * returns, an request_sense will be issued
1854 */
1855
1856#define ATAPI_DRIVE_NOT_READY 100
1857#define ATAPI_UNIT_ATTN 10
1858
1859unsigned char atapi_issue_autoreq (int device,
1860 unsigned char* ccb,
1861 int ccblen,
1862 unsigned char *buffer,
1863 int buflen)
1864{
1865 unsigned char sense_data[18],sense_ccb[12];
1866 unsigned char res,key,asc,ascq;
1867 int notready,unitattn;
1868
c7de829c
WD		 1869#ifdef CONFIG_AMIGAONEG3SE
1870 char *s;
1871 unsigned int timeout, retrycnt;
1872
1873 s = getenv("ide_cd_timeout");
1874 timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
1875
1876 retrycnt = 0;
1877#endif
1878
c609719b
WD		 1879 unitattn=ATAPI_UNIT_ATTN;
1880 notready=ATAPI_DRIVE_NOT_READY;
1881
1882retry:
1883 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1884 if (res==0)
1885 return (0); /* Ok */
1886
1887 if (res==0xFF)
1888 return (0xFF); /* error */
1889
1a344f29 1890 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
c609719b
WD		 1891
1892 memset(sense_ccb,0,sizeof(sense_ccb));
1893 memset(sense_data,0,sizeof(sense_data));
1894 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
c7de829c 1895 sense_ccb[4]=18; /* allocation Length */
c609719b
WD		 1896
1897 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1898 key=(sense_data[2]&0xF);
1899 asc=(sense_data[12]);
1900 ascq=(sense_data[13]);
1901
1a344f29
WD		 1902 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1903 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
c609719b
WD		 1904 sense_data[0],
1905 key,
1906 asc,
1907 ascq);
1908
1909 if((key==0))
1910 return 0; /* ok device ready */
1911
1912 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1913 if(unitattn-->0) {
1914 udelay(200*1000);
1915 goto retry;
1916 }
1917 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1918 goto error;
1919 }
1920 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1921 if (notready-->0) {
1922 udelay(200*1000);
1923 goto retry;
1924 }
1925 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1926 goto error;
1927 }
1928 if(asc==0x3a) {
1a344f29 1929 debug ("Media not present\n");
c609719b
WD		 1930 goto error;
1931 }
c7de829c
WD		 1932
1933#ifdef CONFIG_AMIGAONEG3SE
1934 if ((sense_data[2]&0xF)==0x0B) {
1a344f29 1935 debug ("ABORTED COMMAND...retry\n");
c7de829c
WD		 1936 if (retrycnt++ < 4)
1937 goto retry;
1938 return (0xFF);
1939 }
1940
1941 if ((sense_data[2]&0xf) == 0x02 &&
1942 sense_data[12] == 0x04 &&
1943 sense_data[13] == 0x01 ) {
1a344f29 1944 debug ("Waiting for unit to become active\n");
c7de829c
WD		 1945 udelay(timeout);
1946 if (retrycnt++ < 4)
1947 goto retry;
1948 return 0xFF;
1949 }
1950#endif /* CONFIG_AMIGAONEG3SE */
1951
c609719b
WD		 1952 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1953error:
1a344f29 1954 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
c609719b
WD		 1955 return (0xFF);
1956}
1957
1958
c609719b
WD		 1959static void atapi_inquiry(block_dev_desc_t * dev_desc)
1960{
1961 unsigned char ccb[12]; /* Command descriptor block */
1962 unsigned char iobuf[64]; /* temp buf */
1963 unsigned char c;
1964 int device;
1965
1966 device=dev_desc->dev;
1967 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1968 dev_desc->block_read=atapi_read;
1969
1970 memset(ccb,0,sizeof(ccb));
1971 memset(iobuf,0,sizeof(iobuf));
1972
1973 ccb[0]=ATAPI_CMD_INQUIRY;
1974 ccb[4]=40; /* allocation Legnth */
1975 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1976
1a344f29 1977 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
c609719b
WD		 1978 if (c!=0)
1979 return;
1980
1981 /* copy device ident strings */
1982 ident_cpy(dev_desc->vendor,&iobuf[8],8);
1983 ident_cpy(dev_desc->product,&iobuf[16],16);
1984 ident_cpy(dev_desc->revision,&iobuf[32],5);
1985
1986 dev_desc->lun=0;
1987 dev_desc->lba=0;
1988 dev_desc->blksz=0;
1989 dev_desc->type=iobuf[0] & 0x1f;
1990
1991 if ((iobuf[1]&0x80)==0x80)
1992 dev_desc->removable = 1;
1993 else
1994 dev_desc->removable = 0;
1995
1996 memset(ccb,0,sizeof(ccb));
1997 memset(iobuf,0,sizeof(iobuf));
1998 ccb[0]=ATAPI_CMD_START_STOP;
1999 ccb[4]=0x03; /* start */
2000
2001 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
2002
1a344f29 2003 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
c609719b
WD		 2004 if (c!=0)
2005 return;
2006
2007 memset(ccb,0,sizeof(ccb));
2008 memset(iobuf,0,sizeof(iobuf));
2009 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
2010
1a344f29 2011 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
c609719b
WD		 2012 if (c!=0)
2013 return;
2014
2015 memset(ccb,0,sizeof(ccb));
2016 memset(iobuf,0,sizeof(iobuf));
2017 ccb[0]=ATAPI_CMD_READ_CAP;
2018 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1a344f29 2019 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
c609719b
WD		 2020 if (c!=0)
2021 return;
2022
1a344f29 2023 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
c609719b
WD		 2024 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
2025 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
2026
2027 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
2028 ((unsigned long)iobuf[1]<<16) +
2029 ((unsigned long)iobuf[2]<< 8) +
2030 ((unsigned long)iobuf[3]);
2031 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
2032 ((unsigned long)iobuf[5]<<16) +
2033 ((unsigned long)iobuf[6]<< 8) +
2034 ((unsigned long)iobuf[7]);
42dfe7a1 2035#ifdef CONFIG_LBA48
c40b2956 2036 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
42dfe7a1 2037#endif
c609719b
WD		 2038 return;
2039}
2040
2041
2042/*
2043 * atapi_read:
2044 * we transfer only one block per command, since the multiple DRQ per
2045 * command is not yet implemented
2046 */
2047#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2048#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2049#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
2050
eb867a76 2051ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD		 2052{
2053 ulong n = 0;
2054 unsigned char ccb[12]; /* Command descriptor block */
2055 ulong cnt;
2056
1a344f29 2057 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
c609719b
WD		 2058 device, blknr, blkcnt, (ulong)buffer);
2059
2060 do {
2061 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2062 cnt=ATAPI_READ_MAX_BLOCK;
2063 } else {
2064 cnt=blkcnt;
2065 }
2066 ccb[0]=ATAPI_CMD_READ_12;
2067 ccb[1]=0; /* reserved */
2068 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2069 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2070 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2071 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2072 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2073 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2074 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2075 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2076 ccb[10]=0; /* reserved */
2077 ccb[11]=0; /* reserved */
2078
2079 if (atapi_issue_autoreq(device,ccb,12,
2080 (unsigned char *)buffer,
2081 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2082 return (n);
2083 }
2084 n+=cnt;
2085 blkcnt-=cnt;
2086 blknr+=cnt;
0b94504d 2087 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
c609719b
WD		 2088 } while (blkcnt > 0);
2089 return (n);
2090}
2091
2092/* ------------------------------------------------------------------------- */
2093
2094#endif /* CONFIG_ATAPI */
2095
0d498393
WD		 2096U_BOOT_CMD(
2097 ide, 5, 1, do_ide,
8bde7f77
WD		 2098 "ide - IDE sub-system\n",
2099 "reset - reset IDE controller\n"
2100 "ide info - show available IDE devices\n"
2101 "ide device [dev] - show or set current device\n"
2102 "ide part [dev] - print partition table of one or all IDE devices\n"
2103 "ide read addr blk# cnt\n"
2104 "ide write addr blk# cnt - read/write `cnt'"
2105 " blocks starting at block `blk#'\n"
2106 " to/from memory address `addr'\n"
2107);
2108
0d498393
WD		 2109U_BOOT_CMD(
2110 diskboot, 3, 1, do_diskboot,
8bde7f77
WD		 2111 "diskboot- boot from IDE device\n",
2112 "loadAddr dev:part\n"
2113);
2114
c609719b 2115#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
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