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Commit | Line | Data |
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c609719b | 1 | /* |
34c202c7 | 2 | * (C) Copyright 2000-2011 |
c609719b WD |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | * | |
23 | */ | |
24 | ||
25 | /* | |
26 | * IDE support | |
27 | */ | |
113bfe48 | 28 | |
c609719b WD |
29 | #include <common.h> |
30 | #include <config.h> | |
31 | #include <watchdog.h> | |
32 | #include <command.h> | |
33 | #include <image.h> | |
34 | #include <asm/byteorder.h> | |
f98984cb | 35 | #include <asm/io.h> |
735dd97b | 36 | |
c609719b WD |
37 | #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA) |
38 | # include <pcmcia.h> | |
39 | #endif | |
735dd97b | 40 | |
c609719b WD |
41 | #ifdef CONFIG_8xx |
42 | # include <mpc8xx.h> | |
43 | #endif | |
735dd97b | 44 | |
132ba5fd WD |
45 | #ifdef CONFIG_MPC5xxx |
46 | #include <mpc5xxx.h> | |
47 | #endif | |
735dd97b | 48 | |
c609719b WD |
49 | #include <ide.h> |
50 | #include <ata.h> | |
735dd97b | 51 | |
c609719b WD |
52 | #ifdef CONFIG_STATUS_LED |
53 | # include <status_led.h> | |
54 | #endif | |
735dd97b | 55 | |
d87080b7 WD |
56 | #ifdef CONFIG_IDE_8xx_DIRECT |
57 | DECLARE_GLOBAL_DATA_PTR; | |
58 | #endif | |
59 | ||
5cf91d6b WD |
60 | #ifdef __PPC__ |
61 | # define EIEIO __asm__ volatile ("eieio") | |
1a344f29 | 62 | # define SYNC __asm__ volatile ("sync") |
5cf91d6b WD |
63 | #else |
64 | # define EIEIO /* nothing */ | |
1a344f29 | 65 | # define SYNC /* nothing */ |
c609719b WD |
66 | #endif |
67 | ||
15647dc7 | 68 | #ifdef CONFIG_IDE_8xx_DIRECT |
c609719b WD |
69 | /* Timings for IDE Interface |
70 | * | |
71 | * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk | |
72 | * 70 165 30 PIO-Mode 0, [ns] | |
73 | * 4 9 2 [Cycles] | |
74 | * 50 125 20 PIO-Mode 1, [ns] | |
75 | * 3 7 2 [Cycles] | |
76 | * 30 100 15 PIO-Mode 2, [ns] | |
77 | * 2 6 1 [Cycles] | |
78 | * 30 80 10 PIO-Mode 3, [ns] | |
79 | * 2 5 1 [Cycles] | |
80 | * 25 70 10 PIO-Mode 4, [ns] | |
81 | * 2 4 1 [Cycles] | |
82 | */ | |
83 | ||
84 | const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] = | |
85 | { | |
86 | /* Setup Length Hold */ | |
87 | { 70, 165, 30 }, /* PIO-Mode 0, [ns] */ | |
88 | { 50, 125, 20 }, /* PIO-Mode 1, [ns] */ | |
89 | { 30, 101, 15 }, /* PIO-Mode 2, [ns] */ | |
90 | { 30, 80, 10 }, /* PIO-Mode 3, [ns] */ | |
91 | { 25, 70, 10 }, /* PIO-Mode 4, [ns] */ | |
92 | }; | |
93 | ||
94 | static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1]; | |
95 | ||
6d0f6bcf JCPV |
96 | #ifndef CONFIG_SYS_PIO_MODE |
97 | #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */ | |
c609719b | 98 | #endif |
6d0f6bcf | 99 | static int pio_mode = CONFIG_SYS_PIO_MODE; |
c609719b WD |
100 | |
101 | /* Make clock cycles and always round up */ | |
102 | ||
103 | #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U ) | |
104 | ||
15647dc7 WD |
105 | #endif /* CONFIG_IDE_8xx_DIRECT */ |
106 | ||
c609719b WD |
107 | /* ------------------------------------------------------------------------- */ |
108 | ||
109 | /* Current I/O Device */ | |
110 | static int curr_device = -1; | |
111 | ||
112 | /* Current offset for IDE0 / IDE1 bus access */ | |
6d0f6bcf JCPV |
113 | ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = { |
114 | #if defined(CONFIG_SYS_ATA_IDE0_OFFSET) | |
115 | CONFIG_SYS_ATA_IDE0_OFFSET, | |
c609719b | 116 | #endif |
6d0f6bcf JCPV |
117 | #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1) |
118 | CONFIG_SYS_ATA_IDE1_OFFSET, | |
c609719b WD |
119 | #endif |
120 | }; | |
121 | ||
6d0f6bcf | 122 | static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS]; |
c609719b | 123 | |
6d0f6bcf | 124 | block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE]; |
c609719b WD |
125 | /* ------------------------------------------------------------------------- */ |
126 | ||
127 | #ifdef CONFIG_IDE_LED | |
953b7e62 WD |
128 | # if !defined(CONFIG_BMS2003) && \ |
129 | !defined(CONFIG_CPC45) && \ | |
130 | !defined(CONFIG_KUP4K) && \ | |
131 | !defined(CONFIG_KUP4X) | |
c609719b WD |
132 | static void ide_led (uchar led, uchar status); |
133 | #else | |
1f53a416 WD |
134 | extern void ide_led (uchar led, uchar status); |
135 | #endif | |
136 | #else | |
c609719b WD |
137 | #define ide_led(a,b) /* dummy */ |
138 | #endif | |
139 | ||
140 | #ifdef CONFIG_IDE_RESET | |
141 | static void ide_reset (void); | |
142 | #else | |
143 | #define ide_reset() /* dummy */ | |
144 | #endif | |
145 | ||
146 | static void ide_ident (block_dev_desc_t *dev_desc); | |
147 | static uchar ide_wait (int dev, ulong t); | |
148 | ||
149 | #define IDE_TIME_OUT 2000 /* 2 sec timeout */ | |
150 | ||
151 | #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */ | |
152 | ||
153 | #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */ | |
154 | ||
c609719b | 155 | static void input_data(int dev, ulong *sect_buf, int words); |
96d04c31 | 156 | static void output_data(int dev, const ulong *sect_buf, int words); |
c609719b WD |
157 | static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len); |
158 | ||
6d0f6bcf JCPV |
159 | #ifndef CONFIG_SYS_ATA_PORT_ADDR |
160 | #define CONFIG_SYS_ATA_PORT_ADDR(port) (port) | |
566a494f | 161 | #endif |
c609719b WD |
162 | |
163 | #ifdef CONFIG_ATAPI | |
164 | static void atapi_inquiry(block_dev_desc_t *dev_desc); | |
eb867a76 | 165 | ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer); |
c609719b WD |
166 | #endif |
167 | ||
168 | ||
169 | #ifdef CONFIG_IDE_8xx_DIRECT | |
170 | static void set_pcmcia_timing (int pmode); | |
c609719b WD |
171 | #endif |
172 | ||
173 | /* ------------------------------------------------------------------------- */ | |
174 | ||
34c202c7 | 175 | int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
c609719b | 176 | { |
34c202c7 WD |
177 | int rcode = 0; |
178 | ||
179 | switch (argc) { | |
180 | case 0: | |
181 | case 1: | |
182 | return cmd_usage(cmdtp); | |
183 | case 2: | |
184 | if (strncmp(argv[1], "res", 3) == 0) { | |
185 | puts("\nReset IDE" | |
c609719b | 186 | #ifdef CONFIG_IDE_8xx_DIRECT |
34c202c7 | 187 | " on PCMCIA " PCMCIA_SLOT_MSG |
c609719b | 188 | #endif |
34c202c7 | 189 | ": "); |
c609719b | 190 | |
34c202c7 WD |
191 | ide_init(); |
192 | return 0; | |
193 | } else if (strncmp(argv[1], "inf", 3) == 0) { | |
194 | int i; | |
c609719b | 195 | |
34c202c7 | 196 | putc('\n'); |
c609719b | 197 | |
34c202c7 WD |
198 | for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) { |
199 | if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN) | |
200 | continue; /* list only known devices */ | |
201 | printf("IDE device %d: ", i); | |
202 | dev_print(&ide_dev_desc[i]); | |
203 | } | |
204 | return 0; | |
c609719b | 205 | |
34c202c7 WD |
206 | } else if (strncmp(argv[1], "dev", 3) == 0) { |
207 | if ((curr_device < 0) | |
208 | || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) { | |
209 | puts("\nno IDE devices available\n"); | |
210 | return 1; | |
c609719b | 211 | } |
34c202c7 WD |
212 | printf("\nIDE device %d: ", curr_device); |
213 | dev_print(&ide_dev_desc[curr_device]); | |
214 | return 0; | |
215 | } else if (strncmp(argv[1], "part", 4) == 0) { | |
216 | int dev, ok; | |
217 | ||
218 | for (ok = 0, dev = 0; | |
219 | dev < CONFIG_SYS_IDE_MAXDEVICE; | |
220 | ++dev) { | |
221 | if (ide_dev_desc[dev].part_type != | |
222 | PART_TYPE_UNKNOWN) { | |
223 | ++ok; | |
224 | if (dev) | |
225 | putc('\n'); | |
226 | print_part(&ide_dev_desc[dev]); | |
227 | } | |
228 | } | |
229 | if (!ok) { | |
230 | puts("\nno IDE devices available\n"); | |
231 | rcode++; | |
232 | } | |
233 | return rcode; | |
c609719b | 234 | } |
34c202c7 WD |
235 | return cmd_usage(cmdtp); |
236 | case 3: | |
237 | if (strncmp(argv[1], "dev", 3) == 0) { | |
238 | int dev = (int) simple_strtoul(argv[2], NULL, 10); | |
c609719b | 239 | |
34c202c7 WD |
240 | printf("\nIDE device %d: ", dev); |
241 | if (dev >= CONFIG_SYS_IDE_MAXDEVICE) { | |
242 | puts("unknown device\n"); | |
243 | return 1; | |
244 | } | |
245 | dev_print(&ide_dev_desc[dev]); | |
246 | /*ide_print (dev); */ | |
c609719b | 247 | |
34c202c7 WD |
248 | if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) |
249 | return 1; | |
c609719b | 250 | |
34c202c7 | 251 | curr_device = dev; |
c609719b | 252 | |
34c202c7 WD |
253 | puts("... is now current device\n"); |
254 | ||
255 | return 0; | |
256 | } else if (strncmp(argv[1], "part", 4) == 0) { | |
257 | int dev = (int) simple_strtoul(argv[2], NULL, 10); | |
c609719b | 258 | |
34c202c7 | 259 | if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) { |
c609719b | 260 | print_part(&ide_dev_desc[dev]); |
34c202c7 WD |
261 | } else { |
262 | printf("\nIDE device %d not available\n", | |
263 | dev); | |
264 | rcode = 1; | |
265 | } | |
266 | return rcode; | |
c609719b | 267 | } |
c609719b | 268 | |
34c202c7 WD |
269 | return cmd_usage(cmdtp); |
270 | default: | |
271 | /* at least 4 args */ | |
c609719b | 272 | |
34c202c7 WD |
273 | if (strcmp(argv[1], "read") == 0) { |
274 | ulong addr = simple_strtoul(argv[2], NULL, 16); | |
275 | ulong cnt = simple_strtoul(argv[4], NULL, 16); | |
276 | ulong n; | |
c609719b | 277 | |
6d0f6bcf | 278 | #ifdef CONFIG_SYS_64BIT_LBA |
34c202c7 | 279 | lbaint_t blk = simple_strtoull(argv[3], NULL, 16); |
c609719b | 280 | |
34c202c7 WD |
281 | printf("\nIDE read: device %d block # %lld, count %ld ... ", |
282 | curr_device, blk, cnt); | |
42dfe7a1 | 283 | #else |
34c202c7 WD |
284 | lbaint_t blk = simple_strtoul(argv[3], NULL, 16); |
285 | ||
286 | printf("\nIDE read: device %d block # %ld, count %ld ... ", | |
287 | curr_device, blk, cnt); | |
288 | #endif | |
289 | ||
290 | n = ide_dev_desc[curr_device].block_read(curr_device, | |
291 | blk, cnt, | |
292 | (ulong *)addr); | |
293 | /* flush cache after read */ | |
294 | flush_cache(addr, | |
295 | cnt * ide_dev_desc[curr_device].blksz); | |
296 | ||
297 | printf("%ld blocks read: %s\n", | |
298 | n, (n == cnt) ? "OK" : "ERROR"); | |
299 | if (n == cnt) | |
300 | return 0; | |
301 | else | |
302 | return 1; | |
303 | } else if (strcmp(argv[1], "write") == 0) { | |
304 | ulong addr = simple_strtoul(argv[2], NULL, 16); | |
305 | ulong cnt = simple_strtoul(argv[4], NULL, 16); | |
306 | ulong n; | |
c609719b | 307 | |
6d0f6bcf | 308 | #ifdef CONFIG_SYS_64BIT_LBA |
34c202c7 | 309 | lbaint_t blk = simple_strtoull(argv[3], NULL, 16); |
c609719b | 310 | |
34c202c7 WD |
311 | printf("\nIDE write: device %d block # %lld, count %ld ... ", |
312 | curr_device, blk, cnt); | |
42dfe7a1 | 313 | #else |
34c202c7 | 314 | lbaint_t blk = simple_strtoul(argv[3], NULL, 16); |
42dfe7a1 | 315 | |
34c202c7 WD |
316 | printf("\nIDE write: device %d block # %ld, count %ld ... ", |
317 | curr_device, blk, cnt); | |
42dfe7a1 | 318 | #endif |
34c202c7 | 319 | n = ide_write(curr_device, blk, cnt, (ulong *) addr); |
c609719b | 320 | |
34c202c7 WD |
321 | printf("%ld blocks written: %s\n", |
322 | n, (n == cnt) ? "OK" : "ERROR"); | |
323 | if (n == cnt) | |
324 | return 0; | |
325 | else | |
326 | return 1; | |
327 | } else { | |
328 | return cmd_usage(cmdtp); | |
329 | } | |
c609719b | 330 | |
34c202c7 | 331 | return rcode; |
c609719b | 332 | } |
c609719b WD |
333 | } |
334 | ||
34c202c7 | 335 | int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
c609719b WD |
336 | { |
337 | char *boot_device = NULL; | |
338 | char *ep; | |
339 | int dev, part = 0; | |
b97a2a0a | 340 | ulong addr, cnt; |
c609719b WD |
341 | disk_partition_t info; |
342 | image_header_t *hdr; | |
34c202c7 | 343 | |
09475f75 | 344 | #if defined(CONFIG_FIT) |
3bab76a2 | 345 | const void *fit_hdr = NULL; |
09475f75 | 346 | #endif |
c609719b | 347 | |
34c202c7 | 348 | show_boot_progress(41); |
c609719b WD |
349 | switch (argc) { |
350 | case 1: | |
6d0f6bcf | 351 | addr = CONFIG_SYS_LOAD_ADDR; |
34c202c7 | 352 | boot_device = getenv("bootdevice"); |
c609719b WD |
353 | break; |
354 | case 2: | |
355 | addr = simple_strtoul(argv[1], NULL, 16); | |
34c202c7 | 356 | boot_device = getenv("bootdevice"); |
c609719b WD |
357 | break; |
358 | case 3: | |
359 | addr = simple_strtoul(argv[1], NULL, 16); | |
360 | boot_device = argv[2]; | |
361 | break; | |
362 | default: | |
34c202c7 | 363 | show_boot_progress(-42); |
47e26b1b | 364 | return cmd_usage(cmdtp); |
c609719b | 365 | } |
34c202c7 | 366 | show_boot_progress(42); |
c609719b WD |
367 | |
368 | if (!boot_device) { | |
34c202c7 WD |
369 | puts("\n** No boot device **\n"); |
370 | show_boot_progress(-43); | |
c609719b WD |
371 | return 1; |
372 | } | |
34c202c7 | 373 | show_boot_progress(43); |
c609719b WD |
374 | |
375 | dev = simple_strtoul(boot_device, &ep, 16); | |
376 | ||
34c202c7 WD |
377 | if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) { |
378 | printf("\n** Device %d not available\n", dev); | |
379 | show_boot_progress(-44); | |
c609719b WD |
380 | return 1; |
381 | } | |
34c202c7 | 382 | show_boot_progress(44); |
c609719b WD |
383 | |
384 | if (*ep) { | |
385 | if (*ep != ':') { | |
34c202c7 WD |
386 | puts("\n** Invalid boot device, use `dev[:part]' **\n"); |
387 | show_boot_progress(-45); | |
c609719b WD |
388 | return 1; |
389 | } | |
390 | part = simple_strtoul(++ep, NULL, 16); | |
391 | } | |
34c202c7 WD |
392 | show_boot_progress(45); |
393 | if (get_partition_info(&ide_dev_desc[dev], part, &info)) { | |
394 | show_boot_progress(-46); | |
c609719b WD |
395 | return 1; |
396 | } | |
34c202c7 WD |
397 | show_boot_progress(46); |
398 | if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) | |
399 | && | |
400 | (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0) | |
401 | ) { | |
402 | printf("\n** Invalid partition type \"%.32s\"" " (expect \"" | |
403 | BOOT_PART_TYPE "\")\n", | |
c609719b | 404 | info.type); |
34c202c7 | 405 | show_boot_progress(-47); |
c609719b WD |
406 | return 1; |
407 | } | |
34c202c7 | 408 | show_boot_progress(47); |
c609719b | 409 | |
34c202c7 WD |
410 | printf("\nLoading from IDE device %d, partition %d: " |
411 | "Name: %.32s Type: %.32s\n", dev, part, info.name, info.type); | |
c609719b | 412 | |
34c202c7 WD |
413 | debug("First Block: %ld, # of blocks: %ld, Block Size: %ld\n", |
414 | info.start, info.size, info.blksz); | |
c609719b | 415 | |
34c202c7 WD |
416 | if (ide_dev_desc[dev]. |
417 | block_read(dev, info.start, 1, (ulong *) addr) != 1) { | |
418 | printf("** Read error on %d:%d\n", dev, part); | |
419 | show_boot_progress(-48); | |
c609719b WD |
420 | return 1; |
421 | } | |
34c202c7 | 422 | show_boot_progress(48); |
c609719b | 423 | |
34c202c7 | 424 | switch (genimg_get_format((void *) addr)) { |
d5934ad7 | 425 | case IMAGE_FORMAT_LEGACY: |
34c202c7 | 426 | hdr = (image_header_t *) addr; |
c609719b | 427 | |
34c202c7 | 428 | show_boot_progress(49); |
d5934ad7 | 429 | |
34c202c7 WD |
430 | if (!image_check_hcrc(hdr)) { |
431 | puts("\n** Bad Header Checksum **\n"); | |
432 | show_boot_progress(-50); | |
d5934ad7 MB |
433 | return 1; |
434 | } | |
34c202c7 | 435 | show_boot_progress(50); |
c609719b | 436 | |
34c202c7 | 437 | image_print_contents(hdr); |
d5934ad7 | 438 | |
34c202c7 | 439 | cnt = image_get_image_size(hdr); |
d5934ad7 MB |
440 | break; |
441 | #if defined(CONFIG_FIT) | |
442 | case IMAGE_FORMAT_FIT: | |
34c202c7 WD |
443 | fit_hdr = (const void *) addr; |
444 | puts("Fit image detected...\n"); | |
09475f75 | 445 | |
34c202c7 | 446 | cnt = fit_get_size(fit_hdr); |
09475f75 | 447 | break; |
d5934ad7 MB |
448 | #endif |
449 | default: | |
34c202c7 WD |
450 | show_boot_progress(-49); |
451 | puts("** Unknown image type\n"); | |
1a344f29 WD |
452 | return 1; |
453 | } | |
1a344f29 | 454 | |
1a344f29 WD |
455 | cnt += info.blksz - 1; |
456 | cnt /= info.blksz; | |
457 | cnt -= 1; | |
458 | ||
34c202c7 WD |
459 | if (ide_dev_desc[dev].block_read(dev, info.start + 1, cnt, |
460 | (ulong *)(addr + info.blksz)) != cnt) { | |
461 | printf("** Read error on %d:%d\n", dev, part); | |
462 | show_boot_progress(-51); | |
c609719b WD |
463 | return 1; |
464 | } | |
34c202c7 | 465 | show_boot_progress(51); |
c609719b | 466 | |
09475f75 MB |
467 | #if defined(CONFIG_FIT) |
468 | /* This cannot be done earlier, we need complete FIT image in RAM first */ | |
34c202c7 WD |
469 | if (genimg_get_format((void *) addr) == IMAGE_FORMAT_FIT) { |
470 | if (!fit_check_format(fit_hdr)) { | |
471 | show_boot_progress(-140); | |
472 | puts("** Bad FIT image format\n"); | |
3bab76a2 MB |
473 | return 1; |
474 | } | |
34c202c7 WD |
475 | show_boot_progress(141); |
476 | fit_print_contents(fit_hdr); | |
3bab76a2 | 477 | } |
09475f75 | 478 | #endif |
c609719b WD |
479 | |
480 | /* Loading ok, update default load address */ | |
481 | ||
482 | load_addr = addr; | |
483 | ||
67d668bf | 484 | return bootm_maybe_autostart(cmdtp, argv[0]); |
c609719b WD |
485 | } |
486 | ||
487 | /* ------------------------------------------------------------------------- */ | |
488 | ||
34c202c7 | 489 | inline void __ide_outb(int dev, int port, unsigned char val) |
f2302d44 | 490 | { |
34c202c7 WD |
491 | debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", |
492 | dev, port, val, | |
493 | (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); | |
0abddf82 ML |
494 | |
495 | #if defined(CONFIG_IDE_AHB) | |
496 | if (port) { | |
497 | /* write command */ | |
498 | ide_write_register(dev, port, val); | |
499 | } else { | |
500 | /* write data */ | |
501 | outb(val, (ATA_CURR_BASE(dev))); | |
502 | } | |
503 | #else | |
34c202c7 | 504 | outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); |
0abddf82 | 505 | #endif |
f2302d44 | 506 | } |
0abddf82 | 507 | |
34c202c7 WD |
508 | void ide_outb(int dev, int port, unsigned char val) |
509 | __attribute__ ((weak, alias("__ide_outb"))); | |
f2302d44 | 510 | |
34c202c7 | 511 | inline unsigned char __ide_inb(int dev, int port) |
f2302d44 SR |
512 | { |
513 | uchar val; | |
0abddf82 ML |
514 | |
515 | #if defined(CONFIG_IDE_AHB) | |
516 | val = ide_read_register(dev, port); | |
517 | #else | |
34c202c7 | 518 | val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); |
0abddf82 ML |
519 | #endif |
520 | ||
34c202c7 WD |
521 | debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", |
522 | dev, port, | |
523 | (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val); | |
f2302d44 SR |
524 | return val; |
525 | } | |
34c202c7 | 526 | |
2df72b82 | 527 | unsigned char ide_inb(int dev, int port) |
34c202c7 | 528 | __attribute__ ((weak, alias("__ide_inb"))); |
f2302d44 | 529 | |
36c2d306 | 530 | #ifdef CONFIG_TUNE_PIO |
34c202c7 | 531 | inline int __ide_set_piomode(int pio_mode) |
36c2d306 SF |
532 | { |
533 | return 0; | |
534 | } | |
34c202c7 WD |
535 | |
536 | inline int ide_set_piomode(int pio_mode) | |
537 | __attribute__ ((weak, alias("__ide_set_piomode"))); | |
36c2d306 SF |
538 | #endif |
539 | ||
34c202c7 | 540 | void ide_init(void) |
c609719b | 541 | { |
c609719b WD |
542 | |
543 | #ifdef CONFIG_IDE_8xx_DIRECT | |
34c202c7 | 544 | volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; |
c609719b WD |
545 | volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); |
546 | #endif | |
547 | unsigned char c; | |
548 | int i, bus; | |
34c202c7 | 549 | |
953b7e62 | 550 | #if defined(CONFIG_SC3) |
9045f33c | 551 | unsigned int ata_reset_time = ATA_RESET_TIME; |
51056dd9 | 552 | #endif |
9fd5e31f | 553 | #ifdef CONFIG_IDE_8xx_PCCARD |
34c202c7 WD |
554 | extern int pcmcia_on(void); |
555 | extern int ide_devices_found; /* Initialized in check_ide_device() */ | |
556 | #endif /* CONFIG_IDE_8xx_PCCARD */ | |
9fd5e31f WD |
557 | |
558 | #ifdef CONFIG_IDE_PREINIT | |
34c202c7 WD |
559 | extern int ide_preinit(void); |
560 | ||
9fd5e31f WD |
561 | WATCHDOG_RESET(); |
562 | ||
34c202c7 WD |
563 | if (ide_preinit()) { |
564 | puts("ide_preinit failed\n"); | |
9fd5e31f WD |
565 | return; |
566 | } | |
34c202c7 | 567 | #endif /* CONFIG_IDE_PREINIT */ |
c609719b WD |
568 | |
569 | #ifdef CONFIG_IDE_8xx_PCCARD | |
34c202c7 WD |
570 | extern int pcmcia_on(void); |
571 | extern int ide_devices_found; /* Initialized in check_ide_device() */ | |
c609719b WD |
572 | |
573 | WATCHDOG_RESET(); | |
574 | ||
6069ff26 | 575 | ide_devices_found = 0; |
c609719b | 576 | /* initialize the PCMCIA IDE adapter card */ |
6069ff26 WD |
577 | pcmcia_on(); |
578 | if (!ide_devices_found) | |
c609719b | 579 | return; |
34c202c7 WD |
580 | udelay(1000000); /* 1 s */ |
581 | #endif /* CONFIG_IDE_8xx_PCCARD */ | |
c609719b WD |
582 | |
583 | WATCHDOG_RESET(); | |
584 | ||
15647dc7 | 585 | #ifdef CONFIG_IDE_8xx_DIRECT |
c609719b | 586 | /* Initialize PIO timing tables */ |
34c202c7 WD |
587 | for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) { |
588 | pio_config_clk[i].t_setup = | |
589 | PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk); | |
590 | pio_config_clk[i].t_length = | |
591 | PCMCIA_MK_CLKS(pio_config_ns[i].t_length, | |
592 | gd->bus_clk); | |
593 | pio_config_clk[i].t_hold = | |
594 | PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk); | |
595 | debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk" | |
596 | " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup, | |
597 | pio_config_clk[i].t_setup, pio_config_ns[i].t_length, | |
598 | pio_config_clk[i].t_length, pio_config_ns[i].t_hold, | |
599 | pio_config_clk[i].t_hold); | |
c609719b | 600 | } |
15647dc7 | 601 | #endif /* CONFIG_IDE_8xx_DIRECT */ |
c609719b | 602 | |
34c202c7 WD |
603 | /* |
604 | * Reset the IDE just to be sure. | |
c609719b WD |
605 | * Light LED's to show |
606 | */ | |
34c202c7 WD |
607 | ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */ |
608 | ||
609 | /* ATAPI Drives seems to need a proper IDE Reset */ | |
610 | ide_reset(); | |
c609719b WD |
611 | |
612 | #ifdef CONFIG_IDE_8xx_DIRECT | |
613 | /* PCMCIA / IDE initialization for common mem space */ | |
614 | pcmp->pcmc_pgcrb = 0; | |
c609719b WD |
615 | |
616 | /* start in PIO mode 0 - most relaxed timings */ | |
617 | pio_mode = 0; | |
34c202c7 | 618 | set_pcmcia_timing(pio_mode); |
15647dc7 | 619 | #endif /* CONFIG_IDE_8xx_DIRECT */ |
c609719b WD |
620 | |
621 | /* | |
622 | * Wait for IDE to get ready. | |
623 | * According to spec, this can take up to 31 seconds! | |
624 | */ | |
34c202c7 WD |
625 | for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) { |
626 | int dev = | |
627 | bus * (CONFIG_SYS_IDE_MAXDEVICE / | |
628 | CONFIG_SYS_IDE_MAXBUS); | |
c609719b | 629 | |
6069ff26 WD |
630 | #ifdef CONFIG_IDE_8xx_PCCARD |
631 | /* Skip non-ide devices from probing */ | |
632 | if ((ide_devices_found & (1 << bus)) == 0) { | |
34c202c7 | 633 | ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */ |
6069ff26 WD |
634 | continue; |
635 | } | |
636 | #endif | |
34c202c7 | 637 | printf("Bus %d: ", bus); |
c609719b WD |
638 | |
639 | ide_bus_ok[bus] = 0; | |
640 | ||
641 | /* Select device | |
642 | */ | |
34c202c7 WD |
643 | udelay(100000); /* 100 ms */ |
644 | ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev)); | |
645 | udelay(100000); /* 100 ms */ | |
c609719b WD |
646 | i = 0; |
647 | do { | |
34c202c7 | 648 | udelay(10000); /* 10 ms */ |
c609719b | 649 | |
34c202c7 | 650 | c = ide_inb(dev, ATA_STATUS); |
c609719b | 651 | i++; |
953b7e62 | 652 | #if defined(CONFIG_SC3) |
c7de829c WD |
653 | if (i > (ata_reset_time * 100)) { |
654 | #else | |
c609719b | 655 | if (i > (ATA_RESET_TIME * 100)) { |
c7de829c | 656 | #endif |
34c202c7 WD |
657 | puts("** Timeout **\n"); |
658 | /* LED's off */ | |
659 | ide_led((LED_IDE1 | LED_IDE2), 0); | |
c609719b WD |
660 | return; |
661 | } | |
34c202c7 WD |
662 | if ((i >= 100) && ((i % 100) == 0)) |
663 | putc('.'); | |
664 | ||
c609719b WD |
665 | } while (c & ATA_STAT_BUSY); |
666 | ||
667 | if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) { | |
34c202c7 WD |
668 | puts("not available "); |
669 | debug("Status = 0x%02X ", c); | |
670 | #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */ | |
671 | } else if ((c & ATA_STAT_READY) == 0) { | |
672 | puts("not available "); | |
673 | debug("Status = 0x%02X ", c); | |
c609719b WD |
674 | #endif |
675 | } else { | |
34c202c7 | 676 | puts("OK "); |
c609719b WD |
677 | ide_bus_ok[bus] = 1; |
678 | } | |
679 | WATCHDOG_RESET(); | |
680 | } | |
c7de829c | 681 | |
34c202c7 | 682 | putc('\n'); |
c609719b | 683 | |
34c202c7 | 684 | ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */ |
c609719b WD |
685 | |
686 | curr_device = -1; | |
34c202c7 | 687 | for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) { |
c609719b WD |
688 | #ifdef CONFIG_IDE_LED |
689 | int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2; | |
690 | #endif | |
34c202c7 WD |
691 | ide_dev_desc[i].type = DEV_TYPE_UNKNOWN; |
692 | ide_dev_desc[i].if_type = IF_TYPE_IDE; | |
693 | ide_dev_desc[i].dev = i; | |
694 | ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN; | |
695 | ide_dev_desc[i].blksz = 0; | |
696 | ide_dev_desc[i].lba = 0; | |
697 | ide_dev_desc[i].block_read = ide_read; | |
0abddf82 | 698 | ide_dev_desc[i].block_write = ide_write; |
c609719b WD |
699 | if (!ide_bus_ok[IDE_BUS(i)]) |
700 | continue; | |
34c202c7 | 701 | ide_led(led, 1); /* LED on */ |
c609719b | 702 | ide_ident(&ide_dev_desc[i]); |
34c202c7 | 703 | ide_led(led, 0); /* LED off */ |
c609719b | 704 | dev_print(&ide_dev_desc[i]); |
34c202c7 | 705 | |
c609719b | 706 | if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) { |
34c202c7 WD |
707 | /* initialize partition type */ |
708 | init_part(&ide_dev_desc[i]); | |
c609719b WD |
709 | if (curr_device < 0) |
710 | curr_device = i; | |
711 | } | |
712 | } | |
713 | WATCHDOG_RESET(); | |
714 | } | |
715 | ||
716 | /* ------------------------------------------------------------------------- */ | |
717 | ||
df3fc526 | 718 | #ifdef CONFIG_PARTITIONS |
34c202c7 | 719 | block_dev_desc_t *ide_get_dev(int dev) |
c609719b | 720 | { |
6d0f6bcf | 721 | return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL; |
c609719b | 722 | } |
df3fc526 | 723 | #endif |
c609719b WD |
724 | |
725 | ||
726 | #ifdef CONFIG_IDE_8xx_DIRECT | |
727 | ||
34c202c7 | 728 | static void set_pcmcia_timing(int pmode) |
c609719b | 729 | { |
34c202c7 | 730 | volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; |
c609719b WD |
731 | volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); |
732 | ulong timings; | |
733 | ||
34c202c7 | 734 | debug("Set timing for PIO Mode %d\n", pmode); |
c609719b WD |
735 | |
736 | timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold) | |
737 | | PCMCIA_SST(pio_config_clk[pmode].t_setup) | |
34c202c7 | 738 | | PCMCIA_SL(pio_config_clk[pmode].t_length); |
c609719b | 739 | |
34c202c7 WD |
740 | /* |
741 | * IDE 0 | |
c609719b | 742 | */ |
6d0f6bcf JCPV |
743 | pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0; |
744 | pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0 | |
745 | #if (CONFIG_SYS_PCMCIA_POR0 != 0) | |
34c202c7 | 746 | | timings |
c609719b | 747 | #endif |
34c202c7 WD |
748 | ; |
749 | debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0); | |
c609719b | 750 | |
6d0f6bcf JCPV |
751 | pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1; |
752 | pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1 | |
753 | #if (CONFIG_SYS_PCMCIA_POR1 != 0) | |
34c202c7 | 754 | | timings |
c609719b | 755 | #endif |
34c202c7 WD |
756 | ; |
757 | debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1); | |
c609719b | 758 | |
6d0f6bcf JCPV |
759 | pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2; |
760 | pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2 | |
761 | #if (CONFIG_SYS_PCMCIA_POR2 != 0) | |
34c202c7 | 762 | | timings |
c609719b | 763 | #endif |
34c202c7 WD |
764 | ; |
765 | debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2); | |
c609719b | 766 | |
6d0f6bcf JCPV |
767 | pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3; |
768 | pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3 | |
769 | #if (CONFIG_SYS_PCMCIA_POR3 != 0) | |
34c202c7 | 770 | | timings |
c609719b | 771 | #endif |
34c202c7 WD |
772 | ; |
773 | debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3); | |
c609719b | 774 | |
34c202c7 WD |
775 | /* |
776 | * IDE 1 | |
c609719b | 777 | */ |
6d0f6bcf JCPV |
778 | pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4; |
779 | pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4 | |
780 | #if (CONFIG_SYS_PCMCIA_POR4 != 0) | |
34c202c7 | 781 | | timings |
c609719b | 782 | #endif |
34c202c7 WD |
783 | ; |
784 | debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4); | |
c609719b | 785 | |
6d0f6bcf JCPV |
786 | pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5; |
787 | pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5 | |
788 | #if (CONFIG_SYS_PCMCIA_POR5 != 0) | |
34c202c7 | 789 | | timings |
c609719b | 790 | #endif |
34c202c7 WD |
791 | ; |
792 | debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5); | |
c609719b | 793 | |
6d0f6bcf JCPV |
794 | pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6; |
795 | pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6 | |
796 | #if (CONFIG_SYS_PCMCIA_POR6 != 0) | |
34c202c7 | 797 | | timings |
c609719b | 798 | #endif |
34c202c7 WD |
799 | ; |
800 | debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6); | |
c609719b | 801 | |
6d0f6bcf JCPV |
802 | pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7; |
803 | pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7 | |
804 | #if (CONFIG_SYS_PCMCIA_POR7 != 0) | |
34c202c7 | 805 | | timings |
c609719b | 806 | #endif |
34c202c7 WD |
807 | ; |
808 | debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7); | |
c609719b WD |
809 | |
810 | } | |
811 | ||
34c202c7 | 812 | #endif /* CONFIG_IDE_8xx_DIRECT */ |
c609719b WD |
813 | |
814 | /* ------------------------------------------------------------------------- */ | |
815 | ||
5da627a4 WD |
816 | /* We only need to swap data if we are running on a big endian cpu. */ |
817 | /* But Au1x00 cpu:s already swaps data in big endian mode! */ | |
c6dc8a73 SK |
818 | #if defined(__LITTLE_ENDIAN) || \ |
819 | (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2)) | |
5da627a4 WD |
820 | #define input_swap_data(x,y,z) input_data(x,y,z) |
821 | #else | |
34c202c7 | 822 | static void input_swap_data(int dev, ulong *sect_buf, int words) |
c609719b | 823 | { |
77efe35f | 824 | #if defined(CONFIG_CPC45) |
a522fa0e | 825 | uchar i; |
34c202c7 WD |
826 | volatile uchar *pbuf_even = |
827 | (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); | |
828 | volatile uchar *pbuf_odd = | |
829 | (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); | |
830 | ushort *dbuf = (ushort *) sect_buf; | |
a522fa0e WD |
831 | |
832 | while (words--) { | |
34c202c7 WD |
833 | for (i = 0; i < 2; i++) { |
834 | *(((uchar *) (dbuf)) + 1) = *pbuf_even; | |
835 | *(uchar *) dbuf = *pbuf_odd; | |
836 | dbuf += 1; | |
a522fa0e WD |
837 | } |
838 | } | |
f4733a07 | 839 | #else |
34c202c7 WD |
840 | volatile ushort *pbuf = |
841 | (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); | |
842 | ushort *dbuf = (ushort *) sect_buf; | |
1a344f29 | 843 | |
34c202c7 WD |
844 | debug("in input swap data base for read is %lx\n", |
845 | (unsigned long) pbuf); | |
1a344f29 WD |
846 | |
847 | while (words--) { | |
0c32d96d | 848 | #ifdef __MIPS__ |
34c202c7 WD |
849 | *dbuf++ = swab16p((u16 *) pbuf); |
850 | *dbuf++ = swab16p((u16 *) pbuf); | |
566a494f HS |
851 | #elif defined(CONFIG_PCS440EP) |
852 | *dbuf++ = *pbuf; | |
853 | *dbuf++ = *pbuf; | |
0c32d96d | 854 | #else |
1a344f29 WD |
855 | *dbuf++ = ld_le16(pbuf); |
856 | *dbuf++ = ld_le16(pbuf); | |
0c32d96d | 857 | #endif /* !MIPS */ |
1a344f29 WD |
858 | } |
859 | #endif | |
c609719b | 860 | } |
34c202c7 | 861 | #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */ |
2262cfee WD |
862 | |
863 | ||
f2a37fcd | 864 | #if defined(CONFIG_IDE_SWAP_IO) |
34c202c7 | 865 | static void output_data(int dev, const ulong *sect_buf, int words) |
c609719b | 866 | { |
77efe35f | 867 | #if defined(CONFIG_CPC45) |
34c202c7 WD |
868 | uchar *dbuf; |
869 | volatile uchar *pbuf_even; | |
870 | volatile uchar *pbuf_odd; | |
a522fa0e | 871 | |
34c202c7 WD |
872 | pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); |
873 | pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); | |
874 | dbuf = (uchar *) sect_buf; | |
a522fa0e | 875 | while (words--) { |
5cf91d6b | 876 | EIEIO; |
a522fa0e | 877 | *pbuf_even = *dbuf++; |
5cf91d6b | 878 | EIEIO; |
a522fa0e | 879 | *pbuf_odd = *dbuf++; |
5cf91d6b | 880 | EIEIO; |
a522fa0e | 881 | *pbuf_even = *dbuf++; |
5cf91d6b | 882 | EIEIO; |
a522fa0e WD |
883 | *pbuf_odd = *dbuf++; |
884 | } | |
1a344f29 | 885 | #else |
34c202c7 WD |
886 | ushort *dbuf; |
887 | volatile ushort *pbuf; | |
1a344f29 | 888 | |
34c202c7 WD |
889 | pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); |
890 | dbuf = (ushort *) sect_buf; | |
1a344f29 | 891 | while (words--) { |
566a494f HS |
892 | #if defined(CONFIG_PCS440EP) |
893 | /* not tested, because CF was write protected */ | |
894 | EIEIO; | |
895 | *pbuf = ld_le16(dbuf++); | |
896 | EIEIO; | |
897 | *pbuf = ld_le16(dbuf++); | |
898 | #else | |
1a344f29 WD |
899 | EIEIO; |
900 | *pbuf = *dbuf++; | |
901 | EIEIO; | |
902 | *pbuf = *dbuf++; | |
566a494f | 903 | #endif |
1a344f29 WD |
904 | } |
905 | #endif | |
c609719b | 906 | } |
34c202c7 WD |
907 | #else /* ! CONFIG_IDE_SWAP_IO */ |
908 | static void output_data(int dev, const ulong *sect_buf, int words) | |
2262cfee | 909 | { |
0abddf82 ML |
910 | #if defined(CONFIG_IDE_AHB) |
911 | ide_write_data(dev, sect_buf, words); | |
912 | #else | |
34c202c7 | 913 | outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1); |
0abddf82 | 914 | #endif |
2262cfee | 915 | } |
34c202c7 | 916 | #endif /* CONFIG_IDE_SWAP_IO */ |
c609719b | 917 | |
f2a37fcd | 918 | #if defined(CONFIG_IDE_SWAP_IO) |
34c202c7 | 919 | static void input_data(int dev, ulong *sect_buf, int words) |
c609719b | 920 | { |
77efe35f | 921 | #if defined(CONFIG_CPC45) |
34c202c7 WD |
922 | uchar *dbuf; |
923 | volatile uchar *pbuf_even; | |
924 | volatile uchar *pbuf_odd; | |
a522fa0e | 925 | |
34c202c7 WD |
926 | pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); |
927 | pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); | |
928 | dbuf = (uchar *) sect_buf; | |
a522fa0e | 929 | while (words--) { |
1a344f29 | 930 | *dbuf++ = *pbuf_even; |
cd172b71 | 931 | EIEIO; |
1a344f29 WD |
932 | SYNC; |
933 | *dbuf++ = *pbuf_odd; | |
5cf91d6b | 934 | EIEIO; |
1a344f29 | 935 | SYNC; |
a522fa0e | 936 | *dbuf++ = *pbuf_even; |
5cf91d6b | 937 | EIEIO; |
1a344f29 | 938 | SYNC; |
a522fa0e | 939 | *dbuf++ = *pbuf_odd; |
5cf91d6b | 940 | EIEIO; |
1a344f29 WD |
941 | SYNC; |
942 | } | |
943 | #else | |
34c202c7 WD |
944 | ushort *dbuf; |
945 | volatile ushort *pbuf; | |
1a344f29 | 946 | |
34c202c7 WD |
947 | pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); |
948 | dbuf = (ushort *) sect_buf; | |
1a344f29 WD |
949 | |
950 | debug("in input data base for read is %lx\n", (unsigned long) pbuf); | |
951 | ||
952 | while (words--) { | |
566a494f HS |
953 | #if defined(CONFIG_PCS440EP) |
954 | EIEIO; | |
955 | *dbuf++ = ld_le16(pbuf); | |
956 | EIEIO; | |
957 | *dbuf++ = ld_le16(pbuf); | |
958 | #else | |
cd172b71 | 959 | EIEIO; |
1a344f29 | 960 | *dbuf++ = *pbuf; |
cd172b71 | 961 | EIEIO; |
1a344f29 | 962 | *dbuf++ = *pbuf; |
566a494f | 963 | #endif |
a522fa0e | 964 | } |
1a344f29 | 965 | #endif |
c609719b | 966 | } |
34c202c7 WD |
967 | #else /* ! CONFIG_IDE_SWAP_IO */ |
968 | static void input_data(int dev, ulong *sect_buf, int words) | |
2262cfee | 969 | { |
0abddf82 ML |
970 | #if defined(CONFIG_IDE_AHB) |
971 | ide_read_data(dev, sect_buf, words); | |
972 | #else | |
34c202c7 | 973 | insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1); |
0abddf82 | 974 | #endif |
2262cfee WD |
975 | } |
976 | ||
34c202c7 | 977 | #endif /* CONFIG_IDE_SWAP_IO */ |
c609719b WD |
978 | |
979 | /* ------------------------------------------------------------------------- | |
980 | */ | |
34c202c7 | 981 | static void ide_ident(block_dev_desc_t *dev_desc) |
c609719b | 982 | { |
c609719b | 983 | unsigned char c; |
b18eabfa | 984 | hd_driveid_t iop; |
c609719b | 985 | |
64f70bed WD |
986 | #ifdef CONFIG_ATAPI |
987 | int retries = 0; | |
c7de829c WD |
988 | #endif |
989 | ||
36c2d306 SF |
990 | #ifdef CONFIG_TUNE_PIO |
991 | int pio_mode; | |
992 | #endif | |
993 | ||
c609719b WD |
994 | #if 0 |
995 | int mode, cycle_time; | |
996 | #endif | |
997 | int device; | |
c609719b | 998 | |
34c202c7 WD |
999 | device = dev_desc->dev; |
1000 | printf(" Device %d: ", device); | |
1001 | ||
1002 | ide_led(DEVICE_LED(device), 1); /* LED on */ | |
c609719b WD |
1003 | /* Select device |
1004 | */ | |
34c202c7 WD |
1005 | ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); |
1006 | dev_desc->if_type = IF_TYPE_IDE; | |
c609719b | 1007 | #ifdef CONFIG_ATAPI |
c7de829c | 1008 | |
34c202c7 WD |
1009 | retries = 0; |
1010 | ||
1011 | /* Warning: This will be tricky to read */ | |
1012 | while (retries <= 1) { | |
1013 | /* check signature */ | |
1014 | if ((ide_inb(device, ATA_SECT_CNT) == 0x01) && | |
1015 | (ide_inb(device, ATA_SECT_NUM) == 0x01) && | |
1016 | (ide_inb(device, ATA_CYL_LOW) == 0x14) && | |
1017 | (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) { | |
1018 | /* ATAPI Signature found */ | |
1019 | dev_desc->if_type = IF_TYPE_ATAPI; | |
1020 | /* | |
1021 | * Start Ident Command | |
1022 | */ | |
1023 | ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT); | |
1024 | /* | |
1025 | * Wait for completion - ATAPI devices need more time | |
1026 | * to become ready | |
1027 | */ | |
1028 | c = ide_wait(device, ATAPI_TIME_OUT); | |
1029 | } else | |
c609719b | 1030 | #endif |
1a344f29 | 1031 | { |
34c202c7 WD |
1032 | /* |
1033 | * Start Ident Command | |
1034 | */ | |
1035 | ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT); | |
1036 | ||
1037 | /* | |
1038 | * Wait for completion | |
1039 | */ | |
1040 | c = ide_wait(device, IDE_TIME_OUT); | |
1a344f29 | 1041 | } |
34c202c7 WD |
1042 | ide_led(DEVICE_LED(device), 0); /* LED off */ |
1043 | ||
1044 | if (((c & ATA_STAT_DRQ) == 0) || | |
1045 | ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) { | |
1046 | #ifdef CONFIG_ATAPI | |
1047 | { | |
1048 | /* | |
1049 | * Need to soft reset the device | |
1050 | * in case it's an ATAPI... | |
1051 | */ | |
1052 | debug("Retrying...\n"); | |
1053 | ide_outb(device, ATA_DEV_HD, | |
1054 | ATA_LBA | ATA_DEVICE(device)); | |
1055 | udelay(100000); | |
1056 | ide_outb(device, ATA_COMMAND, 0x08); | |
1057 | udelay(500000); /* 500 ms */ | |
1058 | } | |
1059 | /* | |
1060 | * Select device | |
1061 | */ | |
1062 | ide_outb(device, ATA_DEV_HD, | |
1063 | ATA_LBA | ATA_DEVICE(device)); | |
1064 | retries++; | |
64f70bed | 1065 | #else |
34c202c7 | 1066 | return; |
64f70bed | 1067 | #endif |
34c202c7 | 1068 | } |
64f70bed | 1069 | #ifdef CONFIG_ATAPI |
34c202c7 WD |
1070 | else |
1071 | break; | |
1072 | } /* see above - ugly to read */ | |
64f70bed | 1073 | |
34c202c7 | 1074 | if (retries == 2) /* Not found */ |
64f70bed WD |
1075 | return; |
1076 | #endif | |
c609719b | 1077 | |
34c202c7 | 1078 | input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS); |
c609719b | 1079 | |
34c202c7 WD |
1080 | ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev, |
1081 | sizeof(dev_desc->revision)); | |
1082 | ident_cpy((unsigned char *) dev_desc->vendor, iop.model, | |
1083 | sizeof(dev_desc->vendor)); | |
1084 | ident_cpy((unsigned char *) dev_desc->product, iop.serial_no, | |
1085 | sizeof(dev_desc->product)); | |
c3f9d493 WD |
1086 | #ifdef __LITTLE_ENDIAN |
1087 | /* | |
bcdf1d2c RR |
1088 | * firmware revision, model, and serial number have Big Endian Byte |
1089 | * order in Word. Convert all three to little endian. | |
c3f9d493 WD |
1090 | * |
1091 | * See CF+ and CompactFlash Specification Revision 2.0: | |
bcdf1d2c | 1092 | * 6.2.1.6: Identify Drive, Table 39 for more details |
c3f9d493 WD |
1093 | */ |
1094 | ||
34c202c7 WD |
1095 | strswab(dev_desc->revision); |
1096 | strswab(dev_desc->vendor); | |
1097 | strswab(dev_desc->product); | |
c3f9d493 | 1098 | #endif /* __LITTLE_ENDIAN */ |
c609719b | 1099 | |
b18eabfa | 1100 | if ((iop.config & 0x0080) == 0x0080) |
c609719b WD |
1101 | dev_desc->removable = 1; |
1102 | else | |
1103 | dev_desc->removable = 0; | |
1104 | ||
36c2d306 SF |
1105 | #ifdef CONFIG_TUNE_PIO |
1106 | /* Mode 0 - 2 only, are directly determined by word 51. */ | |
b18eabfa | 1107 | pio_mode = iop.tPIO; |
36c2d306 SF |
1108 | if (pio_mode > 2) { |
1109 | printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode); | |
34c202c7 WD |
1110 | /* Force it to dead slow, and hope for the best... */ |
1111 | pio_mode = 0; | |
36c2d306 SF |
1112 | } |
1113 | ||
1114 | /* Any CompactFlash Storage Card that supports PIO mode 3 or above | |
1115 | * shall set bit 1 of word 53 to one and support the fields contained | |
1116 | * in words 64 through 70. | |
1117 | */ | |
b18eabfa | 1118 | if (iop.field_valid & 0x02) { |
34c202c7 WD |
1119 | /* |
1120 | * Mode 3 and above are possible. Check in order from slow | |
36c2d306 SF |
1121 | * to fast, so we wind up with the highest mode allowed. |
1122 | */ | |
b18eabfa | 1123 | if (iop.eide_pio_modes & 0x01) |
36c2d306 | 1124 | pio_mode = 3; |
b18eabfa | 1125 | if (iop.eide_pio_modes & 0x02) |
36c2d306 | 1126 | pio_mode = 4; |
b18eabfa MV |
1127 | if (ata_id_is_cfa((u16 *)&iop)) { |
1128 | if ((iop.cf_advanced_caps & 0x07) == 0x01) | |
36c2d306 | 1129 | pio_mode = 5; |
b18eabfa | 1130 | if ((iop.cf_advanced_caps & 0x07) == 0x02) |
36c2d306 SF |
1131 | pio_mode = 6; |
1132 | } | |
1133 | } | |
1134 | ||
1135 | /* System-specific, depends on bus speeds, etc. */ | |
1136 | ide_set_piomode(pio_mode); | |
1137 | #endif /* CONFIG_TUNE_PIO */ | |
1138 | ||
c609719b WD |
1139 | #if 0 |
1140 | /* | |
1141 | * Drive PIO mode autoselection | |
1142 | */ | |
b18eabfa | 1143 | mode = iop.tPIO; |
c609719b | 1144 | |
34c202c7 | 1145 | printf("tPIO = 0x%02x = %d\n", mode, mode); |
c609719b WD |
1146 | if (mode > 2) { /* 2 is maximum allowed tPIO value */ |
1147 | mode = 2; | |
34c202c7 | 1148 | debug("Override tPIO -> 2\n"); |
c609719b | 1149 | } |
b18eabfa | 1150 | if (iop.field_valid & 2) { /* drive implements ATA2? */ |
34c202c7 | 1151 | debug("Drive implements ATA2\n"); |
b18eabfa MV |
1152 | if (iop.capability & 8) { /* drive supports use_iordy? */ |
1153 | cycle_time = iop.eide_pio_iordy; | |
c609719b | 1154 | } else { |
b18eabfa | 1155 | cycle_time = iop.eide_pio; |
c609719b | 1156 | } |
34c202c7 | 1157 | debug("cycle time = %d\n", cycle_time); |
c609719b | 1158 | mode = 4; |
34c202c7 WD |
1159 | if (cycle_time > 120) |
1160 | mode = 3; /* 120 ns for PIO mode 4 */ | |
1161 | if (cycle_time > 180) | |
1162 | mode = 2; /* 180 ns for PIO mode 3 */ | |
1163 | if (cycle_time > 240) | |
1164 | mode = 1; /* 240 ns for PIO mode 4 */ | |
1165 | if (cycle_time > 383) | |
1166 | mode = 0; /* 383 ns for PIO mode 4 */ | |
c609719b | 1167 | } |
34c202c7 | 1168 | printf("PIO mode to use: PIO %d\n", mode); |
c609719b WD |
1169 | #endif /* 0 */ |
1170 | ||
1171 | #ifdef CONFIG_ATAPI | |
34c202c7 | 1172 | if (dev_desc->if_type == IF_TYPE_ATAPI) { |
c609719b WD |
1173 | atapi_inquiry(dev_desc); |
1174 | return; | |
1175 | } | |
1176 | #endif /* CONFIG_ATAPI */ | |
1177 | ||
c3f9d493 | 1178 | #ifdef __BIG_ENDIAN |
c609719b | 1179 | /* swap shorts */ |
b18eabfa | 1180 | dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16); |
34c202c7 | 1181 | #else /* ! __BIG_ENDIAN */ |
c3f9d493 WD |
1182 | /* |
1183 | * do not swap shorts on little endian | |
1184 | * | |
1185 | * See CF+ and CompactFlash Specification Revision 2.0: | |
1186 | * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details. | |
1187 | */ | |
b18eabfa | 1188 | dev_desc->lba = iop.lba_capacity; |
34c202c7 | 1189 | #endif /* __BIG_ENDIAN */ |
c40b2956 | 1190 | |
42dfe7a1 | 1191 | #ifdef CONFIG_LBA48 |
34c202c7 | 1192 | if (iop.command_set_2 & 0x0400) { /* LBA 48 support */ |
6e592385 | 1193 | dev_desc->lba48 = 1; |
34c202c7 WD |
1194 | dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] | |
1195 | ((unsigned long long) iop.lba48_capacity[1] << 16) | | |
1196 | ((unsigned long long) iop.lba48_capacity[2] << 32) | | |
1197 | ((unsigned long long) iop.lba48_capacity[3] << 48); | |
c40b2956 | 1198 | } else { |
c40b2956 WD |
1199 | dev_desc->lba48 = 0; |
1200 | } | |
1201 | #endif /* CONFIG_LBA48 */ | |
c609719b | 1202 | /* assuming HD */ |
34c202c7 WD |
1203 | dev_desc->type = DEV_TYPE_HARDDISK; |
1204 | dev_desc->blksz = ATA_BLOCKSIZE; | |
1205 | dev_desc->lun = 0; /* just to fill something in... */ | |
1206 | ||
1207 | #if 0 /* only used to test the powersaving mode, | |
1208 | * if enabled, the drive goes after 5 sec | |
1209 | * in standby mode */ | |
1210 | ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); | |
1211 | c = ide_wait(device, IDE_TIME_OUT); | |
1212 | ide_outb(device, ATA_SECT_CNT, 1); | |
1213 | ide_outb(device, ATA_LBA_LOW, 0); | |
1214 | ide_outb(device, ATA_LBA_MID, 0); | |
1215 | ide_outb(device, ATA_LBA_HIGH, 0); | |
1216 | ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); | |
1217 | ide_outb(device, ATA_COMMAND, 0xe3); | |
1218 | udelay(50); | |
1219 | c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */ | |
c609719b WD |
1220 | #endif |
1221 | } | |
1222 | ||
1223 | ||
1224 | /* ------------------------------------------------------------------------- */ | |
1225 | ||
34c202c7 | 1226 | ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer) |
c609719b WD |
1227 | { |
1228 | ulong n = 0; | |
1229 | unsigned char c; | |
34c202c7 WD |
1230 | unsigned char pwrsave = 0; /* power save */ |
1231 | ||
42dfe7a1 | 1232 | #ifdef CONFIG_LBA48 |
c40b2956 | 1233 | unsigned char lba48 = 0; |
c609719b | 1234 | |
413bf586 | 1235 | if (blknr & 0x0000fffff0000000ULL) { |
c40b2956 WD |
1236 | /* more than 28 bits used, use 48bit mode */ |
1237 | lba48 = 1; | |
1238 | } | |
1239 | #endif | |
5bbe10dd | 1240 | debug("ide_read dev %d start %lX, blocks %lX buffer at %lX\n", |
34c202c7 | 1241 | device, blknr, blkcnt, (ulong) buffer); |
c609719b | 1242 | |
34c202c7 | 1243 | ide_led(DEVICE_LED(device), 1); /* LED on */ |
c609719b WD |
1244 | |
1245 | /* Select device | |
1246 | */ | |
34c202c7 WD |
1247 | ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); |
1248 | c = ide_wait(device, IDE_TIME_OUT); | |
c609719b WD |
1249 | |
1250 | if (c & ATA_STAT_BUSY) { | |
34c202c7 | 1251 | printf("IDE read: device %d not ready\n", device); |
c609719b WD |
1252 | goto IDE_READ_E; |
1253 | } | |
1254 | ||
1255 | /* first check if the drive is in Powersaving mode, if yes, | |
1256 | * increase the timeout value */ | |
34c202c7 WD |
1257 | ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR); |
1258 | udelay(50); | |
c609719b | 1259 | |
34c202c7 | 1260 | c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */ |
c609719b WD |
1261 | |
1262 | if (c & ATA_STAT_BUSY) { | |
34c202c7 | 1263 | printf("IDE read: device %d not ready\n", device); |
c609719b WD |
1264 | goto IDE_READ_E; |
1265 | } | |
1266 | if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) { | |
34c202c7 | 1267 | printf("No Powersaving mode %X\n", c); |
c609719b | 1268 | } else { |
34c202c7 WD |
1269 | c = ide_inb(device, ATA_SECT_CNT); |
1270 | debug("Powersaving %02X\n", c); | |
1271 | if (c == 0) | |
1272 | pwrsave = 1; | |
c609719b WD |
1273 | } |
1274 | ||
1275 | ||
1276 | while (blkcnt-- > 0) { | |
1277 | ||
34c202c7 | 1278 | c = ide_wait(device, IDE_TIME_OUT); |
c609719b WD |
1279 | |
1280 | if (c & ATA_STAT_BUSY) { | |
34c202c7 | 1281 | printf("IDE read: device %d not ready\n", device); |
c609719b WD |
1282 | break; |
1283 | } | |
42dfe7a1 | 1284 | #ifdef CONFIG_LBA48 |
c40b2956 WD |
1285 | if (lba48) { |
1286 | /* write high bits */ | |
34c202c7 WD |
1287 | ide_outb(device, ATA_SECT_CNT, 0); |
1288 | ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); | |
6d0f6bcf | 1289 | #ifdef CONFIG_SYS_64BIT_LBA |
34c202c7 WD |
1290 | ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF); |
1291 | ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); | |
413bf586 | 1292 | #else |
34c202c7 WD |
1293 | ide_outb(device, ATA_LBA_MID, 0); |
1294 | ide_outb(device, ATA_LBA_HIGH, 0); | |
413bf586 | 1295 | #endif |
c40b2956 WD |
1296 | } |
1297 | #endif | |
34c202c7 WD |
1298 | ide_outb(device, ATA_SECT_CNT, 1); |
1299 | ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); | |
1300 | ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF); | |
1301 | ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); | |
c40b2956 | 1302 | |
42dfe7a1 | 1303 | #ifdef CONFIG_LBA48 |
c40b2956 | 1304 | if (lba48) { |
34c202c7 WD |
1305 | ide_outb(device, ATA_DEV_HD, |
1306 | ATA_LBA | ATA_DEVICE(device)); | |
1307 | ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT); | |
c40b2956 WD |
1308 | |
1309 | } else | |
1310 | #endif | |
1311 | { | |
34c202c7 WD |
1312 | ide_outb(device, ATA_DEV_HD, ATA_LBA | |
1313 | ATA_DEVICE(device) | ((blknr >> 24) & 0xF)); | |
1314 | ide_outb(device, ATA_COMMAND, ATA_CMD_READ); | |
c40b2956 | 1315 | } |
c609719b | 1316 | |
34c202c7 | 1317 | udelay(50); |
c609719b | 1318 | |
34c202c7 WD |
1319 | if (pwrsave) { |
1320 | /* may take up to 4 sec */ | |
1321 | c = ide_wait(device, IDE_SPIN_UP_TIME_OUT); | |
1322 | pwrsave = 0; | |
c609719b | 1323 | } else { |
34c202c7 WD |
1324 | /* can't take over 500 ms */ |
1325 | c = ide_wait(device, IDE_TIME_OUT); | |
c609719b WD |
1326 | } |
1327 | ||
34c202c7 WD |
1328 | if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) != |
1329 | ATA_STAT_DRQ) { | |
4b142feb | 1330 | #if defined(CONFIG_SYS_64BIT_LBA) |
34c202c7 | 1331 | printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n", |
c609719b | 1332 | device, blknr, c); |
c40b2956 | 1333 | #else |
34c202c7 WD |
1334 | printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", |
1335 | device, (ulong) blknr, c); | |
c40b2956 | 1336 | #endif |
c609719b WD |
1337 | break; |
1338 | } | |
1339 | ||
34c202c7 WD |
1340 | input_data(device, buffer, ATA_SECTORWORDS); |
1341 | (void) ide_inb(device, ATA_STATUS); /* clear IRQ */ | |
c609719b WD |
1342 | |
1343 | ++n; | |
1344 | ++blknr; | |
0b94504d | 1345 | buffer += ATA_BLOCKSIZE; |
c609719b WD |
1346 | } |
1347 | IDE_READ_E: | |
34c202c7 | 1348 | ide_led(DEVICE_LED(device), 0); /* LED off */ |
c609719b WD |
1349 | return (n); |
1350 | } | |
1351 | ||
1352 | /* ------------------------------------------------------------------------- */ | |
1353 | ||
1354 | ||
34c202c7 | 1355 | ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer) |
c609719b WD |
1356 | { |
1357 | ulong n = 0; | |
1358 | unsigned char c; | |
34c202c7 | 1359 | |
42dfe7a1 | 1360 | #ifdef CONFIG_LBA48 |
c40b2956 WD |
1361 | unsigned char lba48 = 0; |
1362 | ||
413bf586 | 1363 | if (blknr & 0x0000fffff0000000ULL) { |
c40b2956 WD |
1364 | /* more than 28 bits used, use 48bit mode */ |
1365 | lba48 = 1; | |
1366 | } | |
1367 | #endif | |
c609719b | 1368 | |
34c202c7 | 1369 | ide_led(DEVICE_LED(device), 1); /* LED on */ |
c609719b WD |
1370 | |
1371 | /* Select device | |
1372 | */ | |
34c202c7 | 1373 | ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); |
c609719b WD |
1374 | |
1375 | while (blkcnt-- > 0) { | |
1376 | ||
34c202c7 | 1377 | c = ide_wait(device, IDE_TIME_OUT); |
c609719b WD |
1378 | |
1379 | if (c & ATA_STAT_BUSY) { | |
34c202c7 | 1380 | printf("IDE read: device %d not ready\n", device); |
c609719b WD |
1381 | goto WR_OUT; |
1382 | } | |
42dfe7a1 | 1383 | #ifdef CONFIG_LBA48 |
c40b2956 WD |
1384 | if (lba48) { |
1385 | /* write high bits */ | |
34c202c7 WD |
1386 | ide_outb(device, ATA_SECT_CNT, 0); |
1387 | ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF); | |
6d0f6bcf | 1388 | #ifdef CONFIG_SYS_64BIT_LBA |
34c202c7 WD |
1389 | ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF); |
1390 | ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF); | |
413bf586 | 1391 | #else |
34c202c7 WD |
1392 | ide_outb(device, ATA_LBA_MID, 0); |
1393 | ide_outb(device, ATA_LBA_HIGH, 0); | |
413bf586 | 1394 | #endif |
c40b2956 WD |
1395 | } |
1396 | #endif | |
34c202c7 WD |
1397 | ide_outb(device, ATA_SECT_CNT, 1); |
1398 | ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF); | |
1399 | ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF); | |
1400 | ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF); | |
c40b2956 | 1401 | |
42dfe7a1 | 1402 | #ifdef CONFIG_LBA48 |
c40b2956 | 1403 | if (lba48) { |
34c202c7 WD |
1404 | ide_outb(device, ATA_DEV_HD, |
1405 | ATA_LBA | ATA_DEVICE(device)); | |
1406 | ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT); | |
c40b2956 WD |
1407 | |
1408 | } else | |
1409 | #endif | |
1410 | { | |
34c202c7 WD |
1411 | ide_outb(device, ATA_DEV_HD, ATA_LBA | |
1412 | ATA_DEVICE(device) | ((blknr >> 24) & 0xF)); | |
1413 | ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE); | |
c40b2956 | 1414 | } |
c609719b | 1415 | |
34c202c7 | 1416 | udelay(50); |
c609719b | 1417 | |
34c202c7 WD |
1418 | /* can't take over 500 ms */ |
1419 | c = ide_wait(device, IDE_TIME_OUT); | |
c609719b | 1420 | |
34c202c7 WD |
1421 | if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) != |
1422 | ATA_STAT_DRQ) { | |
4b142feb | 1423 | #if defined(CONFIG_SYS_64BIT_LBA) |
34c202c7 | 1424 | printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n", |
c609719b | 1425 | device, blknr, c); |
c40b2956 | 1426 | #else |
34c202c7 WD |
1427 | printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n", |
1428 | device, (ulong) blknr, c); | |
c40b2956 | 1429 | #endif |
c609719b WD |
1430 | goto WR_OUT; |
1431 | } | |
1432 | ||
34c202c7 WD |
1433 | output_data(device, buffer, ATA_SECTORWORDS); |
1434 | c = ide_inb(device, ATA_STATUS); /* clear IRQ */ | |
c609719b WD |
1435 | ++n; |
1436 | ++blknr; | |
0b94504d | 1437 | buffer += ATA_BLOCKSIZE; |
c609719b WD |
1438 | } |
1439 | WR_OUT: | |
34c202c7 | 1440 | ide_led(DEVICE_LED(device), 0); /* LED off */ |
c609719b WD |
1441 | return (n); |
1442 | } | |
1443 | ||
1444 | /* ------------------------------------------------------------------------- */ | |
1445 | ||
1446 | /* | |
1447 | * copy src to dest, skipping leading and trailing blanks and null | |
1448 | * terminate the string | |
7d7ce412 | 1449 | * "len" is the size of available memory including the terminating '\0' |
c609719b | 1450 | */ |
34c202c7 WD |
1451 | static void ident_cpy(unsigned char *dst, unsigned char *src, |
1452 | unsigned int len) | |
c609719b | 1453 | { |
7d7ce412 WD |
1454 | unsigned char *end, *last; |
1455 | ||
1456 | last = dst; | |
34c202c7 | 1457 | end = src + len - 1; |
7d7ce412 WD |
1458 | |
1459 | /* reserve space for '\0' */ | |
1460 | if (len < 2) | |
1461 | goto OUT; | |
efa329cb | 1462 | |
7d7ce412 | 1463 | /* skip leading white space */ |
34c202c7 | 1464 | while ((*src) && (src < end) && (*src == ' ')) |
7d7ce412 WD |
1465 | ++src; |
1466 | ||
1467 | /* copy string, omitting trailing white space */ | |
34c202c7 | 1468 | while ((*src) && (src < end)) { |
7d7ce412 WD |
1469 | *dst++ = *src; |
1470 | if (*src++ != ' ') | |
1471 | last = dst; | |
c609719b | 1472 | } |
7d7ce412 WD |
1473 | OUT: |
1474 | *last = '\0'; | |
c609719b WD |
1475 | } |
1476 | ||
1477 | /* ------------------------------------------------------------------------- */ | |
1478 | ||
1479 | /* | |
1480 | * Wait until Busy bit is off, or timeout (in ms) | |
1481 | * Return last status | |
1482 | */ | |
34c202c7 | 1483 | static uchar ide_wait(int dev, ulong t) |
c609719b | 1484 | { |
34c202c7 | 1485 | ulong delay = 10 * t; /* poll every 100 us */ |
c609719b WD |
1486 | uchar c; |
1487 | ||
2262cfee | 1488 | while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) { |
34c202c7 WD |
1489 | udelay(100); |
1490 | if (delay-- == 0) | |
c609719b | 1491 | break; |
c609719b WD |
1492 | } |
1493 | return (c); | |
1494 | } | |
1495 | ||
1496 | /* ------------------------------------------------------------------------- */ | |
1497 | ||
1498 | #ifdef CONFIG_IDE_RESET | |
1499 | extern void ide_set_reset(int idereset); | |
1500 | ||
34c202c7 | 1501 | static void ide_reset(void) |
c609719b | 1502 | { |
6d0f6bcf | 1503 | #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR) |
34c202c7 | 1504 | volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; |
c609719b WD |
1505 | #endif |
1506 | int i; | |
1507 | ||
1508 | curr_device = -1; | |
34c202c7 | 1509 | for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i) |
c609719b | 1510 | ide_bus_ok[i] = 0; |
34c202c7 | 1511 | for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) |
c609719b WD |
1512 | ide_dev_desc[i].type = DEV_TYPE_UNKNOWN; |
1513 | ||
34c202c7 | 1514 | ide_set_reset(1); /* assert reset */ |
c609719b | 1515 | |
e175eacc MK |
1516 | /* the reset signal shall be asserted for et least 25 us */ |
1517 | udelay(25); | |
1518 | ||
c609719b WD |
1519 | WATCHDOG_RESET(); |
1520 | ||
6d0f6bcf | 1521 | #ifdef CONFIG_SYS_PB_12V_ENABLE |
34c202c7 WD |
1522 | /* 12V Enable output OFF */ |
1523 | immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); | |
1524 | ||
6d0f6bcf JCPV |
1525 | immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE); |
1526 | immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE); | |
34c202c7 | 1527 | immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE; |
c609719b | 1528 | |
34c202c7 WD |
1529 | /* wait 500 ms for the voltage to stabilize */ |
1530 | for (i = 0; i < 500; ++i) | |
1531 | udelay(1000); | |
c609719b | 1532 | |
34c202c7 WD |
1533 | /* 12V Enable output ON */ |
1534 | immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; | |
1535 | #endif /* CONFIG_SYS_PB_12V_ENABLE */ | |
c609719b | 1536 | |
6d0f6bcf | 1537 | #ifdef CONFIG_SYS_PB_IDE_MOTOR |
c609719b | 1538 | /* configure IDE Motor voltage monitor pin as input */ |
6d0f6bcf JCPV |
1539 | immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR); |
1540 | immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR); | |
1541 | immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR); | |
c609719b | 1542 | |
34c202c7 WD |
1543 | /* wait up to 1 s for the motor voltage to stabilize */ |
1544 | for (i = 0; i < 1000; ++i) { | |
6d0f6bcf | 1545 | if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) { |
c609719b WD |
1546 | break; |
1547 | } | |
34c202c7 | 1548 | udelay(1000); |
c609719b WD |
1549 | } |
1550 | ||
1551 | if (i == 1000) { /* Timeout */ | |
34c202c7 WD |
1552 | printf("\nWarning: 5V for IDE Motor missing\n"); |
1553 | #ifdef CONFIG_STATUS_LED | |
1554 | #ifdef STATUS_LED_YELLOW | |
1555 | status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON); | |
1556 | #endif | |
1557 | #ifdef STATUS_LED_GREEN | |
1558 | status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF); | |
1559 | #endif | |
1560 | #endif /* CONFIG_STATUS_LED */ | |
c609719b | 1561 | } |
34c202c7 | 1562 | #endif /* CONFIG_SYS_PB_IDE_MOTOR */ |
c609719b WD |
1563 | |
1564 | WATCHDOG_RESET(); | |
1565 | ||
1566 | /* de-assert RESET signal */ | |
1567 | ide_set_reset(0); | |
1568 | ||
1569 | /* wait 250 ms */ | |
34c202c7 WD |
1570 | for (i = 0; i < 250; ++i) |
1571 | udelay(1000); | |
c609719b WD |
1572 | } |
1573 | ||
34c202c7 | 1574 | #endif /* CONFIG_IDE_RESET */ |
c609719b WD |
1575 | |
1576 | /* ------------------------------------------------------------------------- */ | |
1577 | ||
e2ffd59b | 1578 | #if defined(CONFIG_IDE_LED) && \ |
e2ffd59b | 1579 | !defined(CONFIG_CPC45) && \ |
e2ffd59b WD |
1580 | !defined(CONFIG_KUP4K) && \ |
1581 | !defined(CONFIG_KUP4X) | |
c609719b | 1582 | |
34c202c7 | 1583 | static uchar led_buffer; /* Buffer for current LED status */ |
c609719b | 1584 | |
34c202c7 | 1585 | static void ide_led(uchar led, uchar status) |
c609719b WD |
1586 | { |
1587 | uchar *led_port = LED_PORT; | |
1588 | ||
34c202c7 WD |
1589 | if (status) /* switch LED on */ |
1590 | led_buffer |= led; | |
1591 | else /* switch LED off */ | |
c609719b | 1592 | led_buffer &= ~led; |
c609719b WD |
1593 | |
1594 | *led_port = led_buffer; | |
1595 | } | |
1596 | ||
34c202c7 | 1597 | #endif /* CONFIG_IDE_LED */ |
c609719b | 1598 | |
3887c3fb HS |
1599 | #if defined(CONFIG_OF_IDE_FIXUP) |
1600 | int ide_device_present(int dev) | |
1601 | { | |
1602 | if (dev >= CONFIG_SYS_IDE_MAXBUS) | |
1603 | return 0; | |
1604 | return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1); | |
1605 | } | |
1606 | #endif | |
c609719b WD |
1607 | /* ------------------------------------------------------------------------- */ |
1608 | ||
1609 | #ifdef CONFIG_ATAPI | |
1610 | /**************************************************************************** | |
1611 | * ATAPI Support | |
1612 | */ | |
1613 | ||
f2a37fcd | 1614 | #if defined(CONFIG_IDE_SWAP_IO) |
c609719b WD |
1615 | /* since ATAPI may use commands with not 4 bytes alligned length |
1616 | * we have our own transfer functions, 2 bytes alligned */ | |
34c202c7 | 1617 | static void output_data_shorts(int dev, ushort *sect_buf, int shorts) |
c609719b | 1618 | { |
77efe35f | 1619 | #if defined(CONFIG_CPC45) |
34c202c7 WD |
1620 | uchar *dbuf; |
1621 | volatile uchar *pbuf_even; | |
1622 | volatile uchar *pbuf_odd; | |
a522fa0e | 1623 | |
34c202c7 WD |
1624 | pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); |
1625 | pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); | |
a522fa0e | 1626 | while (shorts--) { |
5cf91d6b | 1627 | EIEIO; |
a522fa0e | 1628 | *pbuf_even = *dbuf++; |
5cf91d6b | 1629 | EIEIO; |
a522fa0e WD |
1630 | *pbuf_odd = *dbuf++; |
1631 | } | |
1a344f29 | 1632 | #else |
34c202c7 WD |
1633 | ushort *dbuf; |
1634 | volatile ushort *pbuf; | |
c609719b | 1635 | |
34c202c7 WD |
1636 | pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); |
1637 | dbuf = (ushort *) sect_buf; | |
db01a2ea | 1638 | |
34c202c7 WD |
1639 | debug("in output data shorts base for read is %lx\n", |
1640 | (unsigned long) pbuf); | |
db01a2ea | 1641 | |
c609719b | 1642 | while (shorts--) { |
5cf91d6b | 1643 | EIEIO; |
1a344f29 | 1644 | *pbuf = *dbuf++; |
c609719b | 1645 | } |
1a344f29 WD |
1646 | #endif |
1647 | } | |
1648 | ||
34c202c7 | 1649 | static void input_data_shorts(int dev, ushort *sect_buf, int shorts) |
1a344f29 | 1650 | { |
77efe35f | 1651 | #if defined(CONFIG_CPC45) |
34c202c7 WD |
1652 | uchar *dbuf; |
1653 | volatile uchar *pbuf_even; | |
1654 | volatile uchar *pbuf_odd; | |
a522fa0e | 1655 | |
34c202c7 WD |
1656 | pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); |
1657 | pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); | |
a522fa0e | 1658 | while (shorts--) { |
5cf91d6b | 1659 | EIEIO; |
a522fa0e | 1660 | *dbuf++ = *pbuf_even; |
5cf91d6b | 1661 | EIEIO; |
a522fa0e WD |
1662 | *dbuf++ = *pbuf_odd; |
1663 | } | |
1a344f29 | 1664 | #else |
34c202c7 WD |
1665 | ushort *dbuf; |
1666 | volatile ushort *pbuf; | |
1a344f29 | 1667 | |
34c202c7 WD |
1668 | pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); |
1669 | dbuf = (ushort *) sect_buf; | |
1a344f29 | 1670 | |
34c202c7 WD |
1671 | debug("in input data shorts base for read is %lx\n", |
1672 | (unsigned long) pbuf); | |
1a344f29 WD |
1673 | |
1674 | while (shorts--) { | |
1675 | EIEIO; | |
1676 | *dbuf++ = *pbuf; | |
1677 | } | |
1678 | #endif | |
c609719b WD |
1679 | } |
1680 | ||
34c202c7 WD |
1681 | #else /* ! CONFIG_IDE_SWAP_IO */ |
1682 | static void output_data_shorts(int dev, ushort *sect_buf, int shorts) | |
2262cfee | 1683 | { |
34c202c7 | 1684 | outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); |
2262cfee WD |
1685 | } |
1686 | ||
34c202c7 | 1687 | static void input_data_shorts(int dev, ushort *sect_buf, int shorts) |
2262cfee | 1688 | { |
34c202c7 | 1689 | insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); |
2262cfee WD |
1690 | } |
1691 | ||
34c202c7 | 1692 | #endif /* CONFIG_IDE_SWAP_IO */ |
2262cfee | 1693 | |
c609719b WD |
1694 | /* |
1695 | * Wait until (Status & mask) == res, or timeout (in ms) | |
1696 | * Return last status | |
1697 | * This is used since some ATAPI CD ROMs clears their Busy Bit first | |
1698 | * and then they set their DRQ Bit | |
1699 | */ | |
34c202c7 | 1700 | static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res) |
c609719b | 1701 | { |
34c202c7 | 1702 | ulong delay = 10 * t; /* poll every 100 us */ |
c609719b WD |
1703 | uchar c; |
1704 | ||
34c202c7 WD |
1705 | /* prevents to read the status before valid */ |
1706 | c = ide_inb(dev, ATA_DEV_CTL); | |
1707 | ||
2262cfee | 1708 | while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) { |
c609719b | 1709 | /* break if error occurs (doesn't make sense to wait more) */ |
34c202c7 | 1710 | if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) |
c609719b | 1711 | break; |
34c202c7 WD |
1712 | udelay(100); |
1713 | if (delay-- == 0) | |
c609719b | 1714 | break; |
c609719b WD |
1715 | } |
1716 | return (c); | |
1717 | } | |
1718 | ||
1719 | /* | |
1720 | * issue an atapi command | |
1721 | */ | |
34c202c7 WD |
1722 | unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen, |
1723 | unsigned char *buffer, int buflen) | |
c609719b | 1724 | { |
34c202c7 | 1725 | unsigned char c, err, mask, res; |
c609719b | 1726 | int n; |
34c202c7 WD |
1727 | |
1728 | ide_led(DEVICE_LED(device), 1); /* LED on */ | |
c609719b WD |
1729 | |
1730 | /* Select device | |
1731 | */ | |
34c202c7 | 1732 | mask = ATA_STAT_BUSY | ATA_STAT_DRQ; |
c609719b | 1733 | res = 0; |
34c202c7 WD |
1734 | ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); |
1735 | c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); | |
c609719b | 1736 | if ((c & mask) != res) { |
34c202c7 WD |
1737 | printf("ATAPI_ISSUE: device %d not ready status %X\n", device, |
1738 | c); | |
1739 | err = 0xFF; | |
c609719b WD |
1740 | goto AI_OUT; |
1741 | } | |
1742 | /* write taskfile */ | |
34c202c7 WD |
1743 | ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */ |
1744 | ide_outb(device, ATA_SECT_CNT, 0); | |
1745 | ide_outb(device, ATA_SECT_NUM, 0); | |
1746 | ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF)); | |
1747 | ide_outb(device, ATA_CYL_HIGH, | |
1748 | (unsigned char) ((buflen >> 8) & 0xFF)); | |
1749 | ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); | |
1750 | ||
1751 | ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET); | |
1752 | udelay(50); | |
1753 | ||
1754 | mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR; | |
c609719b | 1755 | res = ATA_STAT_DRQ; |
34c202c7 | 1756 | c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); |
c609719b | 1757 | |
34c202c7 WD |
1758 | if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */ |
1759 | printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n", | |
1760 | device, c); | |
1761 | err = 0xFF; | |
c609719b WD |
1762 | goto AI_OUT; |
1763 | } | |
1764 | ||
34c202c7 WD |
1765 | /* write command block */ |
1766 | output_data_shorts(device, (unsigned short *) ccb, ccblen / 2); | |
1767 | ||
53677ef1 | 1768 | /* ATAPI Command written wait for completition */ |
34c202c7 | 1769 | udelay(5000); /* device must set bsy */ |
c609719b | 1770 | |
34c202c7 WD |
1771 | mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR; |
1772 | /* | |
1773 | * if no data wait for DRQ = 0 BSY = 0 | |
1774 | * if data wait for DRQ = 1 BSY = 0 | |
1775 | */ | |
1776 | res = 0; | |
1777 | if (buflen) | |
c609719b | 1778 | res = ATA_STAT_DRQ; |
34c202c7 WD |
1779 | c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); |
1780 | if ((c & mask) != res) { | |
c609719b | 1781 | if (c & ATA_STAT_ERR) { |
34c202c7 WD |
1782 | err = (ide_inb(device, ATA_ERROR_REG)) >> 4; |
1783 | debug("atapi_issue 1 returned sense key %X status %02X\n", | |
1784 | err, c); | |
c609719b | 1785 | } else { |
34c202c7 WD |
1786 | printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", |
1787 | ccb[0], c); | |
1788 | err = 0xFF; | |
c609719b WD |
1789 | } |
1790 | goto AI_OUT; | |
1791 | } | |
34c202c7 WD |
1792 | n = ide_inb(device, ATA_CYL_HIGH); |
1793 | n <<= 8; | |
1794 | n += ide_inb(device, ATA_CYL_LOW); | |
1795 | if (n > buflen) { | |
1796 | printf("ERROR, transfer bytes %d requested only %d\n", n, | |
1797 | buflen); | |
1798 | err = 0xff; | |
c609719b WD |
1799 | goto AI_OUT; |
1800 | } | |
34c202c7 WD |
1801 | if ((n == 0) && (buflen < 0)) { |
1802 | printf("ERROR, transfer bytes %d requested %d\n", n, buflen); | |
1803 | err = 0xff; | |
c609719b WD |
1804 | goto AI_OUT; |
1805 | } | |
34c202c7 WD |
1806 | if (n != buflen) { |
1807 | debug("WARNING, transfer bytes %d not equal with requested %d\n", | |
1808 | n, buflen); | |
c609719b | 1809 | } |
34c202c7 WD |
1810 | if (n != 0) { /* data transfer */ |
1811 | debug("ATAPI_ISSUE: %d Bytes to transfer\n", n); | |
1812 | /* we transfer shorts */ | |
1813 | n >>= 1; | |
c609719b | 1814 | /* ok now decide if it is an in or output */ |
34c202c7 WD |
1815 | if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) { |
1816 | debug("Write to device\n"); | |
1817 | output_data_shorts(device, (unsigned short *) buffer, | |
1818 | n); | |
c609719b | 1819 | } else { |
34c202c7 WD |
1820 | debug("Read from device @ %p shorts %d\n", buffer, n); |
1821 | input_data_shorts(device, (unsigned short *) buffer, | |
1822 | n); | |
c609719b WD |
1823 | } |
1824 | } | |
34c202c7 WD |
1825 | udelay(5000); /* seems that some CD ROMs need this... */ |
1826 | mask = ATA_STAT_BUSY | ATA_STAT_ERR; | |
1827 | res = 0; | |
1828 | c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); | |
c609719b | 1829 | if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) { |
34c202c7 WD |
1830 | err = (ide_inb(device, ATA_ERROR_REG) >> 4); |
1831 | debug("atapi_issue 2 returned sense key %X status %X\n", err, | |
1832 | c); | |
c609719b WD |
1833 | } else { |
1834 | err = 0; | |
1835 | } | |
1836 | AI_OUT: | |
34c202c7 | 1837 | ide_led(DEVICE_LED(device), 0); /* LED off */ |
c609719b WD |
1838 | return (err); |
1839 | } | |
1840 | ||
1841 | /* | |
1842 | * sending the command to atapi_issue. If an status other than good | |
1843 | * returns, an request_sense will be issued | |
1844 | */ | |
1845 | ||
53677ef1 | 1846 | #define ATAPI_DRIVE_NOT_READY 100 |
c609719b WD |
1847 | #define ATAPI_UNIT_ATTN 10 |
1848 | ||
34c202c7 WD |
1849 | unsigned char atapi_issue_autoreq(int device, |
1850 | unsigned char *ccb, | |
1851 | int ccblen, | |
1852 | unsigned char *buffer, int buflen) | |
c609719b | 1853 | { |
34c202c7 WD |
1854 | unsigned char sense_data[18], sense_ccb[12]; |
1855 | unsigned char res, key, asc, ascq; | |
1856 | int notready, unitattn; | |
c609719b | 1857 | |
34c202c7 WD |
1858 | unitattn = ATAPI_UNIT_ATTN; |
1859 | notready = ATAPI_DRIVE_NOT_READY; | |
c609719b WD |
1860 | |
1861 | retry: | |
34c202c7 WD |
1862 | res = atapi_issue(device, ccb, ccblen, buffer, buflen); |
1863 | if (res == 0) | |
1864 | return 0; /* Ok */ | |
1865 | ||
1866 | if (res == 0xFF) | |
1867 | return 0xFF; /* error */ | |
1868 | ||
1869 | debug("(auto_req)atapi_issue returned sense key %X\n", res); | |
1870 | ||
1871 | memset(sense_ccb, 0, sizeof(sense_ccb)); | |
1872 | memset(sense_data, 0, sizeof(sense_data)); | |
1873 | sense_ccb[0] = ATAPI_CMD_REQ_SENSE; | |
1874 | sense_ccb[4] = 18; /* allocation Length */ | |
1875 | ||
1876 | res = atapi_issue(device, sense_ccb, 12, sense_data, 18); | |
1877 | key = (sense_data[2] & 0xF); | |
1878 | asc = (sense_data[12]); | |
1879 | ascq = (sense_data[13]); | |
1880 | ||
1881 | debug("ATAPI_CMD_REQ_SENSE returned %x\n", res); | |
1882 | debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n", | |
1883 | sense_data[0], key, asc, ascq); | |
1884 | ||
1885 | if ((key == 0)) | |
1886 | return 0; /* ok device ready */ | |
1887 | ||
1888 | if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */ | |
1889 | if (unitattn-- > 0) { | |
1890 | udelay(200 * 1000); | |
c609719b WD |
1891 | goto retry; |
1892 | } | |
34c202c7 | 1893 | printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN); |
c609719b WD |
1894 | goto error; |
1895 | } | |
34c202c7 WD |
1896 | if ((asc == 0x4) && (ascq == 0x1)) { |
1897 | /* not ready, but will be ready soon */ | |
1898 | if (notready-- > 0) { | |
1899 | udelay(200 * 1000); | |
c609719b WD |
1900 | goto retry; |
1901 | } | |
34c202c7 WD |
1902 | printf("Drive not ready, tried %d times\n", |
1903 | ATAPI_DRIVE_NOT_READY); | |
c609719b WD |
1904 | goto error; |
1905 | } | |
34c202c7 WD |
1906 | if (asc == 0x3a) { |
1907 | debug("Media not present\n"); | |
c609719b WD |
1908 | goto error; |
1909 | } | |
c7de829c | 1910 | |
34c202c7 WD |
1911 | printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc, |
1912 | ascq); | |
c609719b | 1913 | error: |
34c202c7 | 1914 | debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq); |
c609719b WD |
1915 | return (0xFF); |
1916 | } | |
1917 | ||
1918 | ||
34c202c7 | 1919 | static void atapi_inquiry(block_dev_desc_t *dev_desc) |
c609719b | 1920 | { |
34c202c7 WD |
1921 | unsigned char ccb[12]; /* Command descriptor block */ |
1922 | unsigned char iobuf[64]; /* temp buf */ | |
c609719b WD |
1923 | unsigned char c; |
1924 | int device; | |
1925 | ||
34c202c7 WD |
1926 | device = dev_desc->dev; |
1927 | dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */ | |
1928 | dev_desc->block_read = atapi_read; | |
c609719b | 1929 | |
34c202c7 WD |
1930 | memset(ccb, 0, sizeof(ccb)); |
1931 | memset(iobuf, 0, sizeof(iobuf)); | |
c609719b | 1932 | |
34c202c7 WD |
1933 | ccb[0] = ATAPI_CMD_INQUIRY; |
1934 | ccb[4] = 40; /* allocation Legnth */ | |
1935 | c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40); | |
c609719b | 1936 | |
34c202c7 WD |
1937 | debug("ATAPI_CMD_INQUIRY returned %x\n", c); |
1938 | if (c != 0) | |
c609719b WD |
1939 | return; |
1940 | ||
1941 | /* copy device ident strings */ | |
34c202c7 WD |
1942 | ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8); |
1943 | ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16); | |
1944 | ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5); | |
c609719b | 1945 | |
34c202c7 WD |
1946 | dev_desc->lun = 0; |
1947 | dev_desc->lba = 0; | |
1948 | dev_desc->blksz = 0; | |
1949 | dev_desc->type = iobuf[0] & 0x1f; | |
c609719b | 1950 | |
34c202c7 | 1951 | if ((iobuf[1] & 0x80) == 0x80) |
c609719b WD |
1952 | dev_desc->removable = 1; |
1953 | else | |
1954 | dev_desc->removable = 0; | |
1955 | ||
34c202c7 WD |
1956 | memset(ccb, 0, sizeof(ccb)); |
1957 | memset(iobuf, 0, sizeof(iobuf)); | |
1958 | ccb[0] = ATAPI_CMD_START_STOP; | |
1959 | ccb[4] = 0x03; /* start */ | |
c609719b | 1960 | |
34c202c7 | 1961 | c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0); |
c609719b | 1962 | |
34c202c7 WD |
1963 | debug("ATAPI_CMD_START_STOP returned %x\n", c); |
1964 | if (c != 0) | |
c609719b WD |
1965 | return; |
1966 | ||
34c202c7 WD |
1967 | memset(ccb, 0, sizeof(ccb)); |
1968 | memset(iobuf, 0, sizeof(iobuf)); | |
1969 | c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0); | |
c609719b | 1970 | |
34c202c7 WD |
1971 | debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c); |
1972 | if (c != 0) | |
c609719b WD |
1973 | return; |
1974 | ||
34c202c7 WD |
1975 | memset(ccb, 0, sizeof(ccb)); |
1976 | memset(iobuf, 0, sizeof(iobuf)); | |
1977 | ccb[0] = ATAPI_CMD_READ_CAP; | |
1978 | c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8); | |
1979 | debug("ATAPI_CMD_READ_CAP returned %x\n", c); | |
1980 | if (c != 0) | |
c609719b WD |
1981 | return; |
1982 | ||
34c202c7 WD |
1983 | debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n", |
1984 | iobuf[0], iobuf[1], iobuf[2], iobuf[3], | |
1985 | iobuf[4], iobuf[5], iobuf[6], iobuf[7]); | |
1986 | ||
1987 | dev_desc->lba = ((unsigned long) iobuf[0] << 24) + | |
1988 | ((unsigned long) iobuf[1] << 16) + | |
1989 | ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]); | |
1990 | dev_desc->blksz = ((unsigned long) iobuf[4] << 24) + | |
1991 | ((unsigned long) iobuf[5] << 16) + | |
1992 | ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]); | |
42dfe7a1 | 1993 | #ifdef CONFIG_LBA48 |
34c202c7 WD |
1994 | /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */ |
1995 | dev_desc->lba48 = 0; | |
42dfe7a1 | 1996 | #endif |
c609719b WD |
1997 | return; |
1998 | } | |
1999 | ||
2000 | ||
2001 | /* | |
2002 | * atapi_read: | |
2003 | * we transfer only one block per command, since the multiple DRQ per | |
2004 | * command is not yet implemented | |
2005 | */ | |
2006 | #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */ | |
2007 | #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */ | |
34c202c7 | 2008 | #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE) |
c609719b | 2009 | |
34c202c7 | 2010 | ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer) |
c609719b WD |
2011 | { |
2012 | ulong n = 0; | |
34c202c7 | 2013 | unsigned char ccb[12]; /* Command descriptor block */ |
c609719b WD |
2014 | ulong cnt; |
2015 | ||
34c202c7 WD |
2016 | debug("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n", |
2017 | device, blknr, blkcnt, (ulong) buffer); | |
c609719b WD |
2018 | |
2019 | do { | |
34c202c7 WD |
2020 | if (blkcnt > ATAPI_READ_MAX_BLOCK) |
2021 | cnt = ATAPI_READ_MAX_BLOCK; | |
2022 | else | |
2023 | cnt = blkcnt; | |
2024 | ||
2025 | ccb[0] = ATAPI_CMD_READ_12; | |
2026 | ccb[1] = 0; /* reserved */ | |
2027 | ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */ | |
2028 | ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */ | |
2029 | ccb[4] = (unsigned char) (blknr >> 8) & 0xFF; | |
2030 | ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */ | |
2031 | ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */ | |
2032 | ccb[7] = (unsigned char) (cnt >> 16) & 0xFF; | |
2033 | ccb[8] = (unsigned char) (cnt >> 8) & 0xFF; | |
2034 | ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */ | |
2035 | ccb[10] = 0; /* reserved */ | |
2036 | ccb[11] = 0; /* reserved */ | |
2037 | ||
2038 | if (atapi_issue_autoreq(device, ccb, 12, | |
2039 | (unsigned char *) buffer, | |
2040 | cnt * ATAPI_READ_BLOCK_SIZE) | |
2041 | == 0xFF) { | |
c609719b WD |
2042 | return (n); |
2043 | } | |
34c202c7 WD |
2044 | n += cnt; |
2045 | blkcnt -= cnt; | |
2046 | blknr += cnt; | |
2047 | buffer += (cnt * ATAPI_READ_BLOCK_SIZE); | |
c609719b WD |
2048 | } while (blkcnt > 0); |
2049 | return (n); | |
2050 | } | |
2051 | ||
2052 | /* ------------------------------------------------------------------------- */ | |
2053 | ||
2054 | #endif /* CONFIG_ATAPI */ | |
2055 | ||
34c202c7 WD |
2056 | U_BOOT_CMD(ide, 5, 1, do_ide, |
2057 | "IDE sub-system", | |
2058 | "reset - reset IDE controller\n" | |
2059 | "ide info - show available IDE devices\n" | |
2060 | "ide device [dev] - show or set current device\n" | |
2061 | "ide part [dev] - print partition table of one or all IDE devices\n" | |
2062 | "ide read addr blk# cnt\n" | |
2063 | "ide write addr blk# cnt - read/write `cnt'" | |
2064 | " blocks starting at block `blk#'\n" | |
2065 | " to/from memory address `addr'"); | |
2066 | ||
2067 | U_BOOT_CMD(diskboot, 3, 1, do_diskboot, | |
2068 | "boot from IDE device", "loadAddr dev:part"); |