[people/ms/u-boot.git] / common / cmd_immap.c

/*
 * (C) Copyright 2000-2003
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * MPC8xx/MPC8260 Internal Memory Map Functions
 */

#include <common.h>
#include <command.h>

#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260)

#if defined(CONFIG_8xx)
#include <asm/8xx_immap.h>
#include <commproc.h>
#include <asm/iopin_8xx.h>
#elif defined(CONFIG_MPC8260)
#include <asm/immap_8260.h>
#include <asm/cpm_8260.h>
#include <asm/iopin_8260.h>
#endif

DECLARE_GLOBAL_DATA_PTR;

static void
unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	printf ("Sorry, but the '%s' command has not been implemented\n",
		cmdtp->name);
}

int
do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile sysconf8xx_t *sc = &immap->im_siu_conf;
#elif defined(CONFIG_MPC8260)
	volatile sysconf8260_t *sc = &immap->im_siu_conf;
#endif

	printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr);
#if defined(CONFIG_8xx)
	printf ("SWT   = %08x\n", sc->sc_swt);
	printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask);
	printf ("SIEL  = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec);
	printf ("TESR  = %08x SDCR  = %08x\n", sc->sc_tesr, sc->sc_sdcr);
#elif defined(CONFIG_MPC8260)
	printf ("BCR   = %08x\n", sc->sc_bcr);
	printf ("P_ACR =       %02x P_ALRH= %08x P_ALRL= %08x\n",
		sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl);
	printf ("L_ACR =       %02x L_ALRH= %08x L_ALRL= %08x\n",
		sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl);
	printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2);
	printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2);
	printf ("PDTEA = %08x PDTEM =       %02x\n", sc->sc_pdtea, sc->sc_pdtem);
	printf ("LDTEA = %08x LDTEM =       %02x\n", sc->sc_ldtea, sc->sc_ldtem);
#endif
	return 0;
}

int
do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile memctl8xx_t *memctl = &immap->im_memctl;
	int nbanks = 8;
#elif defined(CONFIG_MPC8260)
	volatile memctl8260_t *memctl = &immap->im_memctl;
	int nbanks = 12;
#endif
	volatile uint *p = &memctl->memc_br0;
	int i;

	for (i = 0; i < nbanks; i++, p += 2) {
		if (i < 10) {
			printf ("BR%d   = %08x OR%d   = %08x\n",
				i, p[0], i, p[1]);
		} else {
			printf ("BR%d  = %08x OR%d  = %08x\n",
				i, p[0], i, p[1]);
		}
	}

	printf ("MAR   = %08x", memctl->memc_mar);
#if defined(CONFIG_8xx)
	printf (" MCR   = %08x\n", memctl->memc_mcr);
#elif defined(CONFIG_MPC8260)
	putc ('\n');
#endif
	printf ("MAMR  = %08x MBMR  = %08x",
		memctl->memc_mamr, memctl->memc_mbmr);
#if defined(CONFIG_8xx)
	printf ("\nMSTAT =     %04x\n", memctl->memc_mstat);
#elif defined(CONFIG_MPC8260)
	printf (" MCMR  = %08x\n", memctl->memc_mcmr);
#endif
	printf ("MPTPR =     %04x MDR   = %08x\n",
		memctl->memc_mptpr, memctl->memc_mdr);
#if defined(CONFIG_MPC8260)
	printf ("PSDMR = %08x LSDMR = %08x\n",
		memctl->memc_psdmr, memctl->memc_lsdmr);
	printf ("PURT  =       %02x PSRT  =       %02x\n",
		memctl->memc_purt, memctl->memc_psrt);
	printf ("LURT  =       %02x LSRT  =       %02x\n",
		memctl->memc_lurt, memctl->memc_lsrt);
	printf ("IMMR  = %08x\n", memctl->memc_immr);
#endif
	return 0;
}

int
do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

#ifdef CONFIG_MPC8260
int
do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}
#endif

int
do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile car8xx_t *car = &immap->im_clkrst;
#elif defined(CONFIG_MPC8260)
	volatile car8260_t *car = &immap->im_clkrst;
#endif

#if defined(CONFIG_8xx)
	printf ("SCCR  = %08x\n", car->car_sccr);
	printf ("PLPRCR= %08x\n", car->car_plprcr);
	printf ("RSR   = %08x\n", car->car_rsr);
#elif defined(CONFIG_MPC8260)
	printf ("SCCR  = %08x\n", car->car_sccr);
	printf ("SCMR  = %08x\n", car->car_scmr);
	printf ("RSR   = %08x\n", car->car_rsr);
	printf ("RMR   = %08x\n", car->car_rmr);
#endif
	return 0;
}

static int counter;

static void
header(void)
{
	char *data = "\
       --------------------------------        --------------------------------\
       00000000001111111111222222222233        00000000001111111111222222222233\
       01234567890123456789012345678901        01234567890123456789012345678901\
       --------------------------------        --------------------------------\
    ";
	int i;

	if (counter % 2)
		putc('\n');
	counter = 0;

	for (i = 0; i < 4; i++, data += 79)
		printf("%.79s\n", data);
}

static void binary (char *label, uint value, int nbits)
{
	uint mask = 1 << (nbits - 1);
	int i, second = (counter++ % 2);

	if (second)
		putc (' ');
	puts (label);
	for (i = 32 + 1; i != nbits; i--)
		putc (' ');

	while (mask != 0) {
		if (value & mask)
			putc ('1');
		else
			putc ('0');
		mask >>= 1;
	}

	if (second)
		putc ('\n');
}

#if defined(CONFIG_8xx)
#define PA_NBITS	16
#define PA_NB_ODR	 8
#define PB_NBITS	18
#define PB_NB_ODR	16
#define PC_NBITS	12
#define PD_NBITS	13
#elif defined(CONFIG_MPC8260)
#define PA_NBITS	32
#define PA_NB_ODR	32
#define PB_NBITS	28
#define PB_NB_ODR	28
#define PC_NBITS	32
#define PD_NBITS	28
#endif

int
do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile iop8xx_t *iop = &immap->im_ioport;
	volatile ushort *l, *r;
#elif defined(CONFIG_MPC8260)
	volatile iop8260_t *iop = &immap->im_ioport;
	volatile uint *l, *r;
#endif
	volatile uint *R;

	counter = 0;
	header ();

	/*
	 * Ports A & B
	 */

#if defined(CONFIG_8xx)
	l = &iop->iop_padir;
	R = &immap->im_cpm.cp_pbdir;
#elif defined(CONFIG_MPC8260)
	l = &iop->iop_pdira;
	R = &iop->iop_pdirb;
#endif
	binary ("PA_DIR", *l++, PA_NBITS);
	binary ("PB_DIR", *R++, PB_NBITS);
	binary ("PA_PAR", *l++, PA_NBITS);
	binary ("PB_PAR", *R++, PB_NBITS);
#if defined(CONFIG_MPC8260)
	binary ("PA_SOR", *l++, PA_NBITS);
	binary ("PB_SOR", *R++, PB_NBITS);
#endif
	binary ("PA_ODR", *l++, PA_NB_ODR);
	binary ("PB_ODR", *R++, PB_NB_ODR);
	binary ("PA_DAT", *l++, PA_NBITS);
	binary ("PB_DAT", *R++, PB_NBITS);

	header ();

	/*
	 * Ports C & D
	 */

#if defined(CONFIG_8xx)
	l = &iop->iop_pcdir;
	r = &iop->iop_pddir;
#elif defined(CONFIG_MPC8260)
	l = &iop->iop_pdirc;
	r = &iop->iop_pdird;
#endif
	binary ("PC_DIR", *l++, PC_NBITS);
	binary ("PD_DIR", *r++, PD_NBITS);
	binary ("PC_PAR", *l++, PC_NBITS);
	binary ("PD_PAR", *r++, PD_NBITS);
#if defined(CONFIG_8xx)
	binary ("PC_SO ", *l++, PC_NBITS);
	binary ("      ", 0, 0);
	r++;
#elif defined(CONFIG_MPC8260)
	binary ("PC_SOR", *l++, PC_NBITS);
	binary ("PD_SOR", *r++, PD_NBITS);
	binary ("PC_ODR", *l++, PC_NBITS);
	binary ("PD_ODR", *r++, PD_NBITS);
#endif
	binary ("PC_DAT", *l++, PC_NBITS);
	binary ("PD_DAT", *r++, PD_NBITS);
#if defined(CONFIG_8xx)
	binary ("PC_INT", *l++, PC_NBITS);
#endif

	header ();
	return 0;
}

/*
 * set the io pins
 * this needs a clean up for smaller tighter code
 * use *uint and set the address based on cmd + port
 */
int
do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	uint rcode = 0;
	iopin_t iopin;
	static uint port = 0;
	static uint pin = 0;
	static uint value = 0;
	static enum {
		DIR,
		PAR,
		SOR,
		ODR,
		DAT,
#if defined(CONFIG_8xx)
		INT
#endif
	} cmd = DAT;

	if (argc != 5) {
		puts ("iopset PORT PIN CMD VALUE\n");
		return 1;
	}
	port = argv[1][0] - 'A';
	if (port > 3)
		port -= 0x20;
	if (port > 3)
		rcode = 1;
	pin = simple_strtol (argv[2], NULL, 10);
	if (pin > 31)
		rcode = 1;


	switch (argv[3][0]) {
	case 'd':
		if (argv[3][1] == 'a')
			cmd = DAT;
		else if (argv[3][1] == 'i')
			cmd = DIR;
		else
			rcode = 1;
		break;
	case 'p':
		cmd = PAR;
		break;
	case 'o':
		cmd = ODR;
		break;
	case 's':
		cmd = SOR;
		break;
#if defined(CONFIG_8xx)
	case 'i':
		cmd = INT;
		break;
#endif
	default:
		printf ("iopset: unknown command %s\n", argv[3]);
		rcode = 1;
	}
	if (argv[4][0] == '1')
		value = 1;
	else if (argv[4][0] == '0')
		value = 0;
	else
		rcode = 1;
	if (rcode == 0) {
		iopin.port = port;
		iopin.pin = pin;
		iopin.flag = 0;
		switch (cmd) {
		case DIR:
			if (value)
				iopin_set_out (&iopin);
			else
				iopin_set_in (&iopin);
			break;
		case PAR:
			if (value)
				iopin_set_ded (&iopin);
			else
				iopin_set_gen (&iopin);
			break;
		case SOR:
			if (value)
				iopin_set_opt2 (&iopin);
			else
				iopin_set_opt1 (&iopin);
			break;
		case ODR:
			if (value)
				iopin_set_odr (&iopin);
			else
				iopin_set_act (&iopin);
			break;
		case DAT:
			if (value)
				iopin_set_high (&iopin);
			else
				iopin_set_low (&iopin);
			break;
#if defined(CONFIG_8xx)
		case INT:
			if (value)
				iopin_set_falledge (&iopin);
			else
				iopin_set_anyedge (&iopin);
			break;
#endif
		}

	}
	return rcode;
}

int
do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

static void prbrg (int n, uint val)
{
	uint extc = (val >> 14) & 3;
	uint cd = (val & CPM_BRG_CD_MASK) >> 1;
	uint div16 = (val & CPM_BRG_DIV16) != 0;

#if defined(CONFIG_8xx)
	ulong clock = gd->cpu_clk;
#elif defined(CONFIG_MPC8260)
	ulong clock = gd->arch.brg_clk;
#endif

	printf ("BRG%d:", n);

	if (val & CPM_BRG_RST)
		puts (" RESET");
	else
		puts ("      ");

	if (val & CPM_BRG_EN)
		puts ("  ENABLED");
	else
		puts (" DISABLED");

	printf (" EXTC=%d", extc);

	if (val & CPM_BRG_ATB)
		puts (" ATB");
	else
		puts ("    ");

	printf (" DIVIDER=%4d", cd);
	if (extc == 0 && cd != 0) {
		uint baudrate;

		if (div16)
			baudrate = (clock / 16) / (cd + 1);
		else
			baudrate = clock / (cd + 1);

		printf ("=%6d bps", baudrate);
	} else {
		puts ("           ");
	}

	if (val & CPM_BRG_DIV16)
		puts (" DIV16");
	else
		puts ("      ");

	putc ('\n');
}

int
do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile cpm8xx_t *cp = &immap->im_cpm;
	volatile uint *p = &cp->cp_brgc1;
#elif defined(CONFIG_MPC8260)
	volatile uint *p = &immap->im_brgc1;
#endif
	int i = 1;

	while (i <= 4)
		prbrg (i++, *p++);

#if defined(CONFIG_MPC8260)
	p = &immap->im_brgc5;
	while (i <= 8)
		prbrg (i++, *p++);
#endif
	return 0;
}

int
do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile i2c8xx_t *i2c = &immap->im_i2c;
	volatile cpm8xx_t *cp = &immap->im_cpm;
	volatile iic_t *iip = (iic_t *) & cp->cp_dparam[PROFF_IIC];
#elif defined(CONFIG_MPC8260)
	volatile i2c8260_t *i2c = &immap->im_i2c;
	volatile iic_t *iip;
	uint dpaddr;

	dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)];
	if (dpaddr == 0)
		iip = NULL;
	else
		iip = (iic_t *) & immap->im_dprambase[dpaddr];
#endif

	printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add);
	printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com);
	printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);

	if (iip == NULL)
		puts ("i2c parameter ram not allocated\n");
	else {
		printf ("RBASE = %08x TBASE = %08x\n",
			iip->iic_rbase, iip->iic_tbase);
		printf ("RFCR  =       %02x TFCR  =       %02x\n",
			iip->iic_rfcr, iip->iic_tfcr);
		printf ("MRBLR =     %04x\n", iip->iic_mrblr);
		printf ("RSTATE= %08x RDP   = %08x\n",
			iip->iic_rstate, iip->iic_rdp);
		printf ("RBPTR =     %04x RBC   =     %04x\n",
			iip->iic_rbptr, iip->iic_rbc);
		printf ("RXTMP = %08x\n", iip->iic_rxtmp);
		printf ("TSTATE= %08x TDP   = %08x\n",
			iip->iic_tstate, iip->iic_tdp);
		printf ("TBPTR =     %04x TBC   =     %04x\n",
			iip->iic_tbptr, iip->iic_tbc);
		printf ("TXTMP = %08x\n", iip->iic_txtmp);
	}
	return 0;
}

int
do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

/***************************************************/

U_BOOT_CMD(
	siuinfo,	1,	1,	do_siuinfo,
	"print System Interface Unit (SIU) registers",
	""
);

U_BOOT_CMD(
	memcinfo,	1,	1,	do_memcinfo,
	"print Memory Controller registers",
	""
);

U_BOOT_CMD(
	sitinfo,	1,	1,	do_sitinfo,
	"print System Integration Timers (SIT) registers",
	""
);

#ifdef CONFIG_MPC8260
U_BOOT_CMD(
	icinfo,	1,	1,	do_icinfo,
	"print Interrupt Controller registers",
	""
);
#endif

U_BOOT_CMD(
	carinfo,	1,	1,	do_carinfo,
	"print Clocks and Reset registers",
	""
);

U_BOOT_CMD(
	iopinfo,	1,	1,	do_iopinfo,
	"print I/O Port registers",
	""
);

U_BOOT_CMD(
	iopset,	5,	0,	do_iopset,
	"set I/O Port registers",
	"PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
);

U_BOOT_CMD(
	dmainfo,	1,	1,	do_dmainfo,
	"print SDMA/IDMA registers",
	""
);

U_BOOT_CMD(
	fccinfo,	1,	1,	do_fccinfo,
	"print FCC registers",
	""
);

U_BOOT_CMD(
	brginfo,	1,	1,	do_brginfo,
	"print Baud Rate Generator (BRG) registers",
	""
);

U_BOOT_CMD(
	i2cinfo,	1,	1,	do_i2cinfo,
	"print I2C registers",
	""
);

U_BOOT_CMD(
	sccinfo,	1,	1,	do_sccinfo,
	"print SCC registers",
	""
);

U_BOOT_CMD(
	smcinfo,	1,	1,	do_smcinfo,
	"print SMC registers",
	""
);

U_BOOT_CMD(
	spiinfo,	1,	1,	do_spiinfo,
	"print Serial Peripheral Interface (SPI) registers",
	""
);

U_BOOT_CMD(
	muxinfo,	1,	1,	do_muxinfo,
	"print CPM Multiplexing registers",
	""
);

U_BOOT_CMD(
	siinfo,	1,	1,	do_siinfo,
	"print Serial Interface (SI) registers",
	""
);

U_BOOT_CMD(
	mccinfo,	1,	1,	do_mccinfo,
	"print MCC registers",
	""
);

#endif
Commit	Line	Data
c609719b	1	/*
2abbe075	2	* (C) Copyright 2000-2003
c609719b WD	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
c609719b WD	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
c609719b WD	6	*/
	7
	8	/*
	9	* MPC8xx/MPC8260 Internal Memory Map Functions
	10	*/
	11
	12	#include <common.h>
	13	#include <command.h>
c609719b	14
58dac327	15	#if defined(CONFIG_8xx) \|\| defined(CONFIG_MPC8260)
c609719b WD	16
	17	#if defined(CONFIG_8xx)
	18	#include <asm/8xx_immap.h>
	19	#include <commproc.h>
e6f22281	20	#include <asm/iopin_8xx.h>
58dac327	21	#elif defined(CONFIG_MPC8260)
c609719b WD	22	#include <asm/immap_8260.h>
	23	#include <asm/cpm_8260.h>
	24	#include <asm/iopin_8260.h>
	25	#endif
	26
d87080b7	27	DECLARE_GLOBAL_DATA_PTR;
d87080b7	28
c609719b	29	static void
54841ab5	30	unimplemented ( cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	31	{
	32	printf ("Sorry, but the '%s' command has not been implemented\n",
	33	cmdtp->name);
	34	}
	35
	36	int
54841ab5	37	do_siuinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b	38	{
6d0f6bcf	39	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	40
	41	#if defined(CONFIG_8xx)
	42	volatile sysconf8xx_t *sc = &immap->im_siu_conf;
58dac327	43	#elif defined(CONFIG_MPC8260)
c609719b WD	44	volatile sysconf8260_t *sc = &immap->im_siu_conf;
	45	#endif
	46
	47	printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr);
	48	#if defined(CONFIG_8xx)
	49	printf ("SWT = %08x\n", sc->sc_swt);
	50	printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask);
	51	printf ("SIEL = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec);
	52	printf ("TESR = %08x SDCR = %08x\n", sc->sc_tesr, sc->sc_sdcr);
58dac327	53	#elif defined(CONFIG_MPC8260)
c609719b WD	54	printf ("BCR = %08x\n", sc->sc_bcr);
	55	printf ("P_ACR = %02x P_ALRH= %08x P_ALRL= %08x\n",
	56	sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl);
	57	printf ("L_ACR = %02x L_ALRH= %08x L_ALRL= %08x\n",
	58	sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl);
	59	printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2);
	60	printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2);
	61	printf ("PDTEA = %08x PDTEM = %02x\n", sc->sc_pdtea, sc->sc_pdtem);
	62	printf ("LDTEA = %08x LDTEM = %02x\n", sc->sc_ldtea, sc->sc_ldtem);
	63	#endif
	64	return 0;
	65	}
	66
	67	int
54841ab5	68	do_memcinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b	69	{
6d0f6bcf	70	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	71
	72	#if defined(CONFIG_8xx)
	73	volatile memctl8xx_t *memctl = &immap->im_memctl;
	74	int nbanks = 8;
58dac327	75	#elif defined(CONFIG_MPC8260)
c609719b WD	76	volatile memctl8260_t *memctl = &immap->im_memctl;
	77	int nbanks = 12;
	78	#endif
	79	volatile uint *p = &memctl->memc_br0;
	80	int i;
	81
	82	for (i = 0; i < nbanks; i++, p += 2) {
	83	if (i < 10) {
	84	printf ("BR%d = %08x OR%d = %08x\n",
	85	i, p[0], i, p[1]);
	86	} else {
	87	printf ("BR%d = %08x OR%d = %08x\n",
	88	i, p[0], i, p[1]);
	89	}
	90	}
	91
	92	printf ("MAR = %08x", memctl->memc_mar);
	93	#if defined(CONFIG_8xx)
	94	printf (" MCR = %08x\n", memctl->memc_mcr);
58dac327	95	#elif defined(CONFIG_MPC8260)
4b9206ed	96	putc ('\n');
c609719b WD	97	#endif
	98	printf ("MAMR = %08x MBMR = %08x",
	99	memctl->memc_mamr, memctl->memc_mbmr);
	100	#if defined(CONFIG_8xx)
	101	printf ("\nMSTAT = %04x\n", memctl->memc_mstat);
58dac327	102	#elif defined(CONFIG_MPC8260)
c609719b WD	103	printf (" MCMR = %08x\n", memctl->memc_mcmr);
	104	#endif
	105	printf ("MPTPR = %04x MDR = %08x\n",
	106	memctl->memc_mptpr, memctl->memc_mdr);
58dac327	107	#if defined(CONFIG_MPC8260)
c609719b WD	108	printf ("PSDMR = %08x LSDMR = %08x\n",
	109	memctl->memc_psdmr, memctl->memc_lsdmr);
	110	printf ("PURT = %02x PSRT = %02x\n",
	111	memctl->memc_purt, memctl->memc_psrt);
	112	printf ("LURT = %02x LSRT = %02x\n",
	113	memctl->memc_lurt, memctl->memc_lsrt);
	114	printf ("IMMR = %08x\n", memctl->memc_immr);
	115	#endif
	116	return 0;
	117	}
	118
	119	int
54841ab5	120	do_sitinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	121	{
	122	unimplemented (cmdtp, flag, argc, argv);
	123	return 0;
	124	}
	125
58dac327	126	#ifdef CONFIG_MPC8260
c609719b	127	int
54841ab5	128	do_icinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	129	{
	130	unimplemented (cmdtp, flag, argc, argv);
	131	return 0;
	132	}
	133	#endif
	134
	135	int
54841ab5	136	do_carinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b	137	{
6d0f6bcf	138	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
2abbe075 WD	139
	140	#if defined(CONFIG_8xx)
	141	volatile car8xx_t *car = &immap->im_clkrst;
58dac327	142	#elif defined(CONFIG_MPC8260)
2abbe075 WD	143	volatile car8260_t *car = &immap->im_clkrst;
	144	#endif
	145
	146	#if defined(CONFIG_8xx)
	147	printf ("SCCR = %08x\n", car->car_sccr);
	148	printf ("PLPRCR= %08x\n", car->car_plprcr);
	149	printf ("RSR = %08x\n", car->car_rsr);
58dac327	150	#elif defined(CONFIG_MPC8260)
2abbe075 WD	151	printf ("SCCR = %08x\n", car->car_sccr);
	152	printf ("SCMR = %08x\n", car->car_scmr);
	153	printf ("RSR = %08x\n", car->car_rsr);
	154	printf ("RMR = %08x\n", car->car_rmr);
	155	#endif
c609719b WD	156	return 0;
	157	}
	158
	159	static int counter;
	160
	161	static void
	162	header(void)
	163	{
	164	char *data = "\
	165	-------------------------------- --------------------------------\
	166	00000000001111111111222222222233 00000000001111111111222222222233\
	167	01234567890123456789012345678901 01234567890123456789012345678901\
	168	-------------------------------- --------------------------------\
	169	";
	170	int i;
	171
	172	if (counter % 2)
2abbe075	173	putc('\n');
c609719b WD	174	counter = 0;
	175
	176	for (i = 0; i < 4; i++, data += 79)
	177	printf("%.79s\n", data);
	178	}
	179
	180	static void binary (char *label, uint value, int nbits)
	181	{
	182	uint mask = 1 << (nbits - 1);
	183	int i, second = (counter++ % 2);
	184
	185	if (second)
	186	putc (' ');
	187	puts (label);
	188	for (i = 32 + 1; i != nbits; i--)
	189	putc (' ');
	190
	191	while (mask != 0) {
	192	if (value & mask)
	193	putc ('1');
	194	else
	195	putc ('0');
	196	mask >>= 1;
	197	}
	198
	199	if (second)
	200	putc ('\n');
	201	}
	202
	203	#if defined(CONFIG_8xx)
	204	#define PA_NBITS 16
	205	#define PA_NB_ODR 8
	206	#define PB_NBITS 18
	207	#define PB_NB_ODR 16
	208	#define PC_NBITS 12
	209	#define PD_NBITS 13
58dac327	210	#elif defined(CONFIG_MPC8260)
c609719b WD	211	#define PA_NBITS 32
	212	#define PA_NB_ODR 32
	213	#define PB_NBITS 28
	214	#define PB_NB_ODR 28
	215	#define PC_NBITS 32
	216	#define PD_NBITS 28
	217	#endif
	218
	219	int
54841ab5	220	do_iopinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b	221	{
6d0f6bcf	222	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	223
	224	#if defined(CONFIG_8xx)
	225	volatile iop8xx_t *iop = &immap->im_ioport;
	226	volatile ushort l, r;
58dac327	227	#elif defined(CONFIG_MPC8260)
c609719b WD	228	volatile iop8260_t *iop = &immap->im_ioport;
	229	volatile uint l, r;
	230	#endif
	231	volatile uint *R;
	232
	233	counter = 0;
	234	header ();
	235
	236	/*
	237	* Ports A & B
	238	*/
	239
	240	#if defined(CONFIG_8xx)
	241	l = &iop->iop_padir;
	242	R = &immap->im_cpm.cp_pbdir;
58dac327	243	#elif defined(CONFIG_MPC8260)
c609719b WD	244	l = &iop->iop_pdira;
	245	R = &iop->iop_pdirb;
	246	#endif
	247	binary ("PA_DIR", *l++, PA_NBITS);
	248	binary ("PB_DIR", *R++, PB_NBITS);
	249	binary ("PA_PAR", *l++, PA_NBITS);
	250	binary ("PB_PAR", *R++, PB_NBITS);
58dac327	251	#if defined(CONFIG_MPC8260)
c609719b WD	252	binary ("PA_SOR", *l++, PA_NBITS);
	253	binary ("PB_SOR", *R++, PB_NBITS);
	254	#endif
	255	binary ("PA_ODR", *l++, PA_NB_ODR);
	256	binary ("PB_ODR", *R++, PB_NB_ODR);
	257	binary ("PA_DAT", *l++, PA_NBITS);
	258	binary ("PB_DAT", *R++, PB_NBITS);
	259
	260	header ();
	261
	262	/*
	263	* Ports C & D
	264	*/
	265
	266	#if defined(CONFIG_8xx)
	267	l = &iop->iop_pcdir;
	268	r = &iop->iop_pddir;
58dac327	269	#elif defined(CONFIG_MPC8260)
c609719b WD	270	l = &iop->iop_pdirc;
	271	r = &iop->iop_pdird;
	272	#endif
	273	binary ("PC_DIR", *l++, PC_NBITS);
	274	binary ("PD_DIR", *r++, PD_NBITS);
	275	binary ("PC_PAR", *l++, PC_NBITS);
	276	binary ("PD_PAR", *r++, PD_NBITS);
	277	#if defined(CONFIG_8xx)
	278	binary ("PC_SO ", *l++, PC_NBITS);
	279	binary (" ", 0, 0);
	280	r++;
58dac327	281	#elif defined(CONFIG_MPC8260)
c609719b WD	282	binary ("PC_SOR", *l++, PC_NBITS);
	283	binary ("PD_SOR", *r++, PD_NBITS);
	284	binary ("PC_ODR", *l++, PC_NBITS);
	285	binary ("PD_ODR", *r++, PD_NBITS);
	286	#endif
	287	binary ("PC_DAT", *l++, PC_NBITS);
	288	binary ("PD_DAT", *r++, PD_NBITS);
	289	#if defined(CONFIG_8xx)
	290	binary ("PC_INT", *l++, PC_NBITS);
	291	#endif
	292
	293	header ();
	294	return 0;
	295	}
	296
	297	/*
	298	* set the io pins
	299	* this needs a clean up for smaller tighter code
	300	* use *uint and set the address based on cmd + port
	301	*/
	302	int
54841ab5	303	do_iopset (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b	304	{
c609719b	305	uint rcode = 0;
f57f70aa	306	iopin_t iopin;
c609719b WD	307	static uint port = 0;
	308	static uint pin = 0;
	309	static uint value = 0;
f57f70aa WD	310	static enum {
	311	DIR,
	312	PAR,
	313	SOR,
	314	ODR,
	315	DAT,
	316	#if defined(CONFIG_8xx)
	317	INT
	318	#endif
	319	} cmd = DAT;
c609719b WD	320
c609719b WD	321	if (argc != 5) {
4b9206ed	322	puts ("iopset PORT PIN CMD VALUE\n");
c609719b WD	323	return 1;
	324	}
	325	port = argv[1][0] - 'A';
	326	if (port > 3)
	327	port -= 0x20;
	328	if (port > 3)
	329	rcode = 1;
	330	pin = simple_strtol (argv[2], NULL, 10);
	331	if (pin > 31)
	332	rcode = 1;
	333
	334
	335	switch (argv[3][0]) {
	336	case 'd':
	337	if (argv[3][1] == 'a')
	338	cmd = DAT;
	339	else if (argv[3][1] == 'i')
	340	cmd = DIR;
	341	else
	342	rcode = 1;
	343	break;
	344	case 'p':
	345	cmd = PAR;
	346	break;
	347	case 'o':
	348	cmd = ODR;
	349	break;
	350	case 's':
	351	cmd = SOR;
	352	break;
e6f22281 WD	353	#if defined(CONFIG_8xx)
	354	case 'i':
	355	cmd = INT;
	356	break;
	357	#endif
c609719b WD	358	default:
	359	printf ("iopset: unknown command %s\n", argv[3]);
	360	rcode = 1;
	361	}
	362	if (argv[4][0] == '1')
	363	value = 1;
	364	else if (argv[4][0] == '0')
	365	value = 0;
	366	else
	367	rcode = 1;
	368	if (rcode == 0) {
	369	iopin.port = port;
	370	iopin.pin = pin;
77ddac94	371	iopin.flag = 0;
c609719b WD	372	switch (cmd) {
	373	case DIR:
	374	if (value)
	375	iopin_set_out (&iopin);
	376	else
	377	iopin_set_in (&iopin);
	378	break;
	379	case PAR:
	380	if (value)
	381	iopin_set_ded (&iopin);
	382	else
	383	iopin_set_gen (&iopin);
	384	break;
	385	case SOR:
	386	if (value)
	387	iopin_set_opt2 (&iopin);
	388	else
	389	iopin_set_opt1 (&iopin);
	390	break;
	391	case ODR:
	392	if (value)
	393	iopin_set_odr (&iopin);
	394	else
	395	iopin_set_act (&iopin);
	396	break;
	397	case DAT:
	398	if (value)
	399	iopin_set_high (&iopin);
	400	else
	401	iopin_set_low (&iopin);
	402	break;
e6f22281 WD	403	#if defined(CONFIG_8xx)
	404	case INT:
	405	if (value)
	406	iopin_set_falledge (&iopin);
	407	else
	408	iopin_set_anyedge (&iopin);
	409	break;
	410	#endif
c609719b WD	411	}
	412
	413	}
	414	return rcode;
c609719b WD	415	}
	416
	417	int
54841ab5	418	do_dmainfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	419	{
	420	unimplemented (cmdtp, flag, argc, argv);
	421	return 0;
	422	}
	423
	424	int
54841ab5	425	do_fccinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	426	{
	427	unimplemented (cmdtp, flag, argc, argv);
	428	return 0;
	429	}
	430
	431	static void prbrg (int n, uint val)
	432	{
	433	uint extc = (val >> 14) & 3;
	434	uint cd = (val & CPM_BRG_CD_MASK) >> 1;
	435	uint div16 = (val & CPM_BRG_DIV16) != 0;
	436
	437	#if defined(CONFIG_8xx)
c609719b	438	ulong clock = gd->cpu_clk;
58dac327	439	#elif defined(CONFIG_MPC8260)
1206c184	440	ulong clock = gd->arch.brg_clk;
c609719b WD	441	#endif
	442
	443	printf ("BRG%d:", n);
	444
	445	if (val & CPM_BRG_RST)
	446	puts (" RESET");
	447	else
	448	puts (" ");
	449
	450	if (val & CPM_BRG_EN)
	451	puts (" ENABLED");
	452	else
	453	puts (" DISABLED");
	454
	455	printf (" EXTC=%d", extc);
	456
	457	if (val & CPM_BRG_ATB)
	458	puts (" ATB");
	459	else
	460	puts (" ");
	461
	462	printf (" DIVIDER=%4d", cd);
	463	if (extc == 0 && cd != 0) {
	464	uint baudrate;
	465
	466	if (div16)
	467	baudrate = (clock / 16) / (cd + 1);
	468	else
	469	baudrate = clock / (cd + 1);
	470
	471	printf ("=%6d bps", baudrate);
	472	} else {
	473	puts (" ");
	474	}
	475
	476	if (val & CPM_BRG_DIV16)
	477	puts (" DIV16");
	478	else
	479	puts (" ");
	480
	481	putc ('\n');
	482	}
	483
	484	int
54841ab5	485	do_brginfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b	486	{
6d0f6bcf	487	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	488
	489	#if defined(CONFIG_8xx)
	490	volatile cpm8xx_t *cp = &immap->im_cpm;
	491	volatile uint *p = &cp->cp_brgc1;
58dac327	492	#elif defined(CONFIG_MPC8260)
c609719b WD	493	volatile uint *p = &immap->im_brgc1;
	494	#endif
	495	int i = 1;
	496
	497	while (i <= 4)
	498	prbrg (i++, *p++);
	499
58dac327	500	#if defined(CONFIG_MPC8260)
c609719b WD	501	p = &immap->im_brgc5;
	502	while (i <= 8)
	503	prbrg (i++, *p++);
	504	#endif
	505	return 0;
	506	}
	507
	508	int
54841ab5	509	do_i2cinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b	510	{
6d0f6bcf	511	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	512
	513	#if defined(CONFIG_8xx)
	514	volatile i2c8xx_t *i2c = &immap->im_i2c;
	515	volatile cpm8xx_t *cp = &immap->im_cpm;
	516	volatile iic_t iip = (iic_t ) & cp->cp_dparam[PROFF_IIC];
58dac327	517	#elif defined(CONFIG_MPC8260)
c609719b WD	518	volatile i2c8260_t *i2c = &immap->im_i2c;
	519	volatile iic_t *iip;
	520	uint dpaddr;
	521
a166fbca	522	dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)];
c609719b WD	523	if (dpaddr == 0)
	524	iip = NULL;
	525	else
	526	iip = (iic_t *) & immap->im_dprambase[dpaddr];
	527	#endif
	528
	529	printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add);
	530	printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com);
	531	printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);
	532
	533	if (iip == NULL)
4b9206ed	534	puts ("i2c parameter ram not allocated\n");
c609719b WD	535	else {
	536	printf ("RBASE = %08x TBASE = %08x\n",
	537	iip->iic_rbase, iip->iic_tbase);
	538	printf ("RFCR = %02x TFCR = %02x\n",
	539	iip->iic_rfcr, iip->iic_tfcr);
	540	printf ("MRBLR = %04x\n", iip->iic_mrblr);
	541	printf ("RSTATE= %08x RDP = %08x\n",
	542	iip->iic_rstate, iip->iic_rdp);
	543	printf ("RBPTR = %04x RBC = %04x\n",
	544	iip->iic_rbptr, iip->iic_rbc);
	545	printf ("RXTMP = %08x\n", iip->iic_rxtmp);
	546	printf ("TSTATE= %08x TDP = %08x\n",
	547	iip->iic_tstate, iip->iic_tdp);
	548	printf ("TBPTR = %04x TBC = %04x\n",
	549	iip->iic_tbptr, iip->iic_tbc);
	550	printf ("TXTMP = %08x\n", iip->iic_txtmp);
	551	}
	552	return 0;
	553	}
	554
	555	int
54841ab5	556	do_sccinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	557	{
	558	unimplemented (cmdtp, flag, argc, argv);
	559	return 0;
	560	}
	561
	562	int
54841ab5	563	do_smcinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	564	{
	565	unimplemented (cmdtp, flag, argc, argv);
	566	return 0;
	567	}
	568
	569	int
54841ab5	570	do_spiinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	571	{
	572	unimplemented (cmdtp, flag, argc, argv);
	573	return 0;
	574	}
	575
	576	int
54841ab5	577	do_muxinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	578	{
	579	unimplemented (cmdtp, flag, argc, argv);
	580	return 0;
	581	}
	582
	583	int
54841ab5	584	do_siinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	585	{
	586	unimplemented (cmdtp, flag, argc, argv);
	587	return 0;
	588	}
	589
	590	int
54841ab5	591	do_mccinfo (cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
c609719b WD	592	{
	593	unimplemented (cmdtp, flag, argc, argv);
	594	return 0;
	595	}
8bde7f77 WD	596
	597	/***************************************************/
	598
0d498393 WD	599	U_BOOT_CMD(
0d498393 WD	600	siuinfo, 1, 1, do_siuinfo,
2fb2604d	601	"print System Interface Unit (SIU) registers",
a89c33db	602	""
8bde7f77 WD	603	);
8bde7f77 WD	604
0d498393 WD	605	U_BOOT_CMD(
0d498393 WD	606	memcinfo, 1, 1, do_memcinfo,
2fb2604d	607	"print Memory Controller registers",
a89c33db	608	""
8bde7f77 WD	609	);
8bde7f77 WD	610
0d498393 WD	611	U_BOOT_CMD(
0d498393 WD	612	sitinfo, 1, 1, do_sitinfo,
2fb2604d	613	"print System Integration Timers (SIT) registers",
a89c33db	614	""
8bde7f77 WD	615	);
8bde7f77 WD	616
58dac327	617	#ifdef CONFIG_MPC8260
0d498393 WD	618	U_BOOT_CMD(
0d498393 WD	619	icinfo, 1, 1, do_icinfo,
2fb2604d	620	"print Interrupt Controller registers",
a89c33db	621	""
8bde7f77 WD	622	);
	623	#endif
	624
0d498393 WD	625	U_BOOT_CMD(
0d498393 WD	626	carinfo, 1, 1, do_carinfo,
2fb2604d	627	"print Clocks and Reset registers",
a89c33db	628	""
8bde7f77 WD	629	);
8bde7f77 WD	630
0d498393 WD	631	U_BOOT_CMD(
0d498393 WD	632	iopinfo, 1, 1, do_iopinfo,
2fb2604d	633	"print I/O Port registers",
a89c33db	634	""
8bde7f77 WD	635	);
8bde7f77 WD	636
0d498393 WD	637	U_BOOT_CMD(
0d498393 WD	638	iopset, 5, 0, do_iopset,
2fb2604d	639	"set I/O Port registers",
8bde7f77 WD	640	"PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat\|dir\|odr\|sor], VALUE: 0\|1"
	641	);
	642
0d498393 WD	643	U_BOOT_CMD(
0d498393 WD	644	dmainfo, 1, 1, do_dmainfo,
2fb2604d	645	"print SDMA/IDMA registers",
a89c33db	646	""
8bde7f77 WD	647	);
8bde7f77 WD	648
0d498393 WD	649	U_BOOT_CMD(
0d498393 WD	650	fccinfo, 1, 1, do_fccinfo,
2fb2604d	651	"print FCC registers",
a89c33db	652	""
8bde7f77 WD	653	);
8bde7f77 WD	654
0d498393 WD	655	U_BOOT_CMD(
0d498393 WD	656	brginfo, 1, 1, do_brginfo,
2fb2604d	657	"print Baud Rate Generator (BRG) registers",
a89c33db	658	""
8bde7f77 WD	659	);
8bde7f77 WD	660
0d498393 WD	661	U_BOOT_CMD(
0d498393 WD	662	i2cinfo, 1, 1, do_i2cinfo,
2fb2604d	663	"print I2C registers",
a89c33db	664	""
8bde7f77 WD	665	);
8bde7f77 WD	666
0d498393 WD	667	U_BOOT_CMD(
0d498393 WD	668	sccinfo, 1, 1, do_sccinfo,
2fb2604d	669	"print SCC registers",
a89c33db	670	""
8bde7f77 WD	671	);
8bde7f77 WD	672
0d498393 WD	673	U_BOOT_CMD(
0d498393 WD	674	smcinfo, 1, 1, do_smcinfo,
2fb2604d	675	"print SMC registers",
a89c33db	676	""
8bde7f77 WD	677	);
8bde7f77 WD	678
0d498393 WD	679	U_BOOT_CMD(
0d498393 WD	680	spiinfo, 1, 1, do_spiinfo,
2fb2604d	681	"print Serial Peripheral Interface (SPI) registers",
a89c33db	682	""
8bde7f77 WD	683	);
8bde7f77 WD	684
0d498393 WD	685	U_BOOT_CMD(
0d498393 WD	686	muxinfo, 1, 1, do_muxinfo,
2fb2604d	687	"print CPM Multiplexing registers",
a89c33db	688	""
8bde7f77 WD	689	);
8bde7f77 WD	690
0d498393 WD	691	U_BOOT_CMD(
0d498393 WD	692	siinfo, 1, 1, do_siinfo,
2fb2604d	693	"print Serial Interface (SI) registers",
a89c33db	694	""
8bde7f77 WD	695	);
8bde7f77 WD	696
0d498393 WD	697	U_BOOT_CMD(
0d498393 WD	698	mccinfo, 1, 1, do_mccinfo,
2fb2604d	699	"print MCC registers",
a89c33db	700	""
8bde7f77 WD	701	);
8bde7f77 WD	702
90253178	703	#endif