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CommitLineData
3863585b
WD
1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Memory Functions
26 *
27 * Copied from FADS ROM, Dan Malek (dmalek@jlc.net)
28 */
29
30#include <common.h>
31#include <command.h>
2abbe075
WD
32#ifdef CONFIG_HAS_DATAFLASH
33#include <dataflash.h>
34#endif
d20a40de 35#include <hash.h>
a6e6fc61 36#include <watchdog.h>
0628ab8e 37#include <asm/io.h>
15a33e49
SG
38#include <linux/compiler.h>
39
40DECLARE_GLOBAL_DATA_PTR;
3863585b 41
8e169cc9
SG
42#ifndef CONFIG_SYS_MEMTEST_SCRATCH
43#define CONFIG_SYS_MEMTEST_SCRATCH 0
44#endif
45
54841ab5 46static int mod_mem(cmd_tbl_t *, int, int, int, char * const []);
3863585b
WD
47
48/* Display values from last command.
49 * Memory modify remembered values are different from display memory.
50 */
d6efe244
MF
51static uint dp_last_addr, dp_last_size;
52static uint dp_last_length = 0x40;
53static uint mm_last_addr, mm_last_size;
3863585b
WD
54
55static ulong base_address = 0;
56
57/* Memory Display
58 *
59 * Syntax:
60 * md{.b, .w, .l} {addr} {len}
61 */
62#define DISP_LINE_LEN 16
088f1b19 63static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 64{
27b207fd 65 ulong addr, length;
c95c4280
GL
66#if defined(CONFIG_HAS_DATAFLASH)
67 ulong nbytes, linebytes;
68#endif
27b207fd 69 int size;
3863585b
WD
70 int rc = 0;
71
72 /* We use the last specified parameters, unless new ones are
73 * entered.
74 */
75 addr = dp_last_addr;
76 size = dp_last_size;
77 length = dp_last_length;
78
47e26b1b 79 if (argc < 2)
4c12eeb8 80 return CMD_RET_USAGE;
3863585b
WD
81
82 if ((flag & CMD_FLAG_REPEAT) == 0) {
83 /* New command specified. Check for a size specification.
84 * Defaults to long if no or incorrect specification.
85 */
27b207fd
WD
86 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
87 return 1;
3863585b
WD
88
89 /* Address is specified since argc > 1
90 */
91 addr = simple_strtoul(argv[1], NULL, 16);
92 addr += base_address;
93
94 /* If another parameter, it is the length to display.
95 * Length is the number of objects, not number of bytes.
96 */
97 if (argc > 2)
98 length = simple_strtoul(argv[2], NULL, 16);
99 }
100
c95c4280 101#if defined(CONFIG_HAS_DATAFLASH)
3863585b
WD
102 /* Print the lines.
103 *
104 * We buffer all read data, so we can make sure data is read only
105 * once, and all accesses are with the specified bus width.
106 */
107 nbytes = length * size;
108 do {
109 char linebuf[DISP_LINE_LEN];
c95c4280 110 void* p;
3863585b 111 linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
2abbe075 112
c95c4280
GL
113 rc = read_dataflash(addr, (linebytes/size)*size, linebuf);
114 p = (rc == DATAFLASH_OK) ? linebuf : (void*)addr;
115 print_buffer(addr, p, size, linebytes/size, DISP_LINE_LEN/size);
116
3863585b 117 nbytes -= linebytes;
c95c4280 118 addr += linebytes;
3863585b
WD
119 if (ctrlc()) {
120 rc = 1;
121 break;
122 }
123 } while (nbytes > 0);
c95c4280 124#else
4c727c77
MF
125
126# if defined(CONFIG_BLACKFIN)
127 /* See if we're trying to display L1 inst */
128 if (addr_bfin_on_chip_mem(addr)) {
129 char linebuf[DISP_LINE_LEN];
130 ulong linebytes, nbytes = length * size;
131 do {
132 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
133 memcpy(linebuf, (void *)addr, linebytes);
134 print_buffer(addr, linebuf, size, linebytes/size, DISP_LINE_LEN/size);
135
136 nbytes -= linebytes;
137 addr += linebytes;
138 if (ctrlc()) {
139 rc = 1;
140 break;
141 }
142 } while (nbytes > 0);
143 } else
144# endif
145
146 {
0628ab8e
SG
147 ulong bytes = size * length;
148 const void *buf = map_sysmem(addr, bytes);
149
4c727c77 150 /* Print the lines. */
0628ab8e
SG
151 print_buffer(addr, buf, size, length, DISP_LINE_LEN / size);
152 addr += bytes;
153 unmap_sysmem(buf);
4c727c77 154 }
c95c4280 155#endif
3863585b
WD
156
157 dp_last_addr = addr;
158 dp_last_length = length;
159 dp_last_size = size;
160 return (rc);
161}
162
088f1b19 163static int do_mem_mm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b
WD
164{
165 return mod_mem (cmdtp, 1, flag, argc, argv);
166}
088f1b19 167static int do_mem_nm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b
WD
168{
169 return mod_mem (cmdtp, 0, flag, argc, argv);
170}
171
088f1b19 172static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 173{
27b207fd
WD
174 ulong addr, writeval, count;
175 int size;
0628ab8e
SG
176 void *buf;
177 ulong bytes;
3863585b 178
47e26b1b 179 if ((argc < 3) || (argc > 4))
4c12eeb8 180 return CMD_RET_USAGE;
3863585b
WD
181
182 /* Check for size specification.
183 */
27b207fd
WD
184 if ((size = cmd_get_data_size(argv[0], 4)) < 1)
185 return 1;
3863585b
WD
186
187 /* Address is specified since argc > 1
188 */
189 addr = simple_strtoul(argv[1], NULL, 16);
190 addr += base_address;
191
192 /* Get the value to write.
193 */
194 writeval = simple_strtoul(argv[2], NULL, 16);
195
196 /* Count ? */
197 if (argc == 4) {
198 count = simple_strtoul(argv[3], NULL, 16);
199 } else {
200 count = 1;
201 }
202
0628ab8e
SG
203 bytes = size * count;
204 buf = map_sysmem(addr, bytes);
3863585b
WD
205 while (count-- > 0) {
206 if (size == 4)
0628ab8e 207 *((ulong *)buf) = (ulong)writeval;
3863585b 208 else if (size == 2)
0628ab8e 209 *((ushort *)buf) = (ushort)writeval;
3863585b 210 else
0628ab8e
SG
211 *((u_char *)buf) = (u_char)writeval;
212 buf += size;
3863585b 213 }
0628ab8e 214 unmap_sysmem(buf);
3863585b
WD
215 return 0;
216}
217
4aaf29b2 218#ifdef CONFIG_MX_CYCLIC
54841ab5 219int do_mem_mdc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
4aaf29b2
SR
220{
221 int i;
222 ulong count;
223
47e26b1b 224 if (argc < 4)
4c12eeb8 225 return CMD_RET_USAGE;
4aaf29b2
SR
226
227 count = simple_strtoul(argv[3], NULL, 10);
228
229 for (;;) {
230 do_mem_md (NULL, 0, 3, argv);
231
232 /* delay for <count> ms... */
233 for (i=0; i<count; i++)
234 udelay (1000);
235
236 /* check for ctrl-c to abort... */
237 if (ctrlc()) {
238 puts("Abort\n");
239 return 0;
240 }
241 }
242
243 return 0;
244}
245
54841ab5 246int do_mem_mwc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
4aaf29b2
SR
247{
248 int i;
249 ulong count;
250
47e26b1b 251 if (argc < 4)
4c12eeb8 252 return CMD_RET_USAGE;
4aaf29b2
SR
253
254 count = simple_strtoul(argv[3], NULL, 10);
255
256 for (;;) {
257 do_mem_mw (NULL, 0, 3, argv);
258
259 /* delay for <count> ms... */
260 for (i=0; i<count; i++)
261 udelay (1000);
262
263 /* check for ctrl-c to abort... */
264 if (ctrlc()) {
265 puts("Abort\n");
266 return 0;
267 }
268 }
269
270 return 0;
271}
272#endif /* CONFIG_MX_CYCLIC */
273
088f1b19 274static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 275{
0628ab8e 276 ulong addr1, addr2, count, ngood, bytes;
27b207fd 277 int size;
3863585b 278 int rcode = 0;
054ea170 279 const char *type;
0628ab8e 280 const void *buf1, *buf2, *base;
3863585b 281
47e26b1b 282 if (argc != 4)
4c12eeb8 283 return CMD_RET_USAGE;
3863585b
WD
284
285 /* Check for size specification.
286 */
27b207fd
WD
287 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
288 return 1;
054ea170 289 type = size == 4 ? "word" : size == 2 ? "halfword" : "byte";
3863585b
WD
290
291 addr1 = simple_strtoul(argv[1], NULL, 16);
292 addr1 += base_address;
293
294 addr2 = simple_strtoul(argv[2], NULL, 16);
295 addr2 += base_address;
296
297 count = simple_strtoul(argv[3], NULL, 16);
298
2abbe075
WD
299#ifdef CONFIG_HAS_DATAFLASH
300 if (addr_dataflash(addr1) | addr_dataflash(addr2)){
4b9206ed 301 puts ("Comparison with DataFlash space not supported.\n\r");
2abbe075
WD
302 return 0;
303 }
304#endif
305
4c727c77
MF
306#ifdef CONFIG_BLACKFIN
307 if (addr_bfin_on_chip_mem(addr1) || addr_bfin_on_chip_mem(addr2)) {
308 puts ("Comparison with L1 instruction memory not supported.\n\r");
309 return 0;
310 }
311#endif
312
0628ab8e
SG
313 bytes = size * count;
314 base = buf1 = map_sysmem(addr1, bytes);
315 buf2 = map_sysmem(addr2, bytes);
feb12a1f 316 for (ngood = 0; ngood < count; ++ngood) {
054ea170 317 ulong word1, word2;
3863585b 318 if (size == 4) {
0628ab8e
SG
319 word1 = *(ulong *)buf1;
320 word2 = *(ulong *)buf2;
054ea170 321 } else if (size == 2) {
0628ab8e
SG
322 word1 = *(ushort *)buf1;
323 word2 = *(ushort *)buf2;
054ea170 324 } else {
0628ab8e
SG
325 word1 = *(u_char *)buf1;
326 word2 = *(u_char *)buf2;
3863585b 327 }
054ea170 328 if (word1 != word2) {
0628ab8e
SG
329 ulong offset = buf1 - base;
330
054ea170 331 printf("%s at 0x%08lx (%#0*lx) != %s at 0x%08lx (%#0*lx)\n",
0628ab8e
SG
332 type, (ulong)(addr1 + offset), size, word1,
333 type, (ulong)(addr2 + offset), size, word2);
054ea170
MF
334 rcode = 1;
335 break;
3863585b 336 }
054ea170 337
0628ab8e
SG
338 buf1 += size;
339 buf2 += size;
eaadb44e
SR
340
341 /* reset watchdog from time to time */
feb12a1f 342 if ((ngood % (64 << 10)) == 0)
eaadb44e 343 WATCHDOG_RESET();
3863585b 344 }
0628ab8e
SG
345 unmap_sysmem(buf1);
346 unmap_sysmem(buf2);
3863585b 347
054ea170 348 printf("Total of %ld %s(s) were the same\n", ngood, type);
3863585b
WD
349 return rcode;
350}
351
088f1b19 352static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 353{
0628ab8e 354 ulong addr, dest, count, bytes;
27b207fd 355 int size;
0628ab8e
SG
356 const void *src;
357 void *buf;
3863585b 358
47e26b1b 359 if (argc != 4)
4c12eeb8 360 return CMD_RET_USAGE;
3863585b
WD
361
362 /* Check for size specification.
363 */
27b207fd
WD
364 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
365 return 1;
3863585b
WD
366
367 addr = simple_strtoul(argv[1], NULL, 16);
368 addr += base_address;
369
370 dest = simple_strtoul(argv[2], NULL, 16);
371 dest += base_address;
372
373 count = simple_strtoul(argv[3], NULL, 16);
374
375 if (count == 0) {
376 puts ("Zero length ???\n");
377 return 1;
378 }
379
6d0f6bcf 380#ifndef CONFIG_SYS_NO_FLASH
3863585b 381 /* check if we are copying to Flash */
2abbe075
WD
382 if ( (addr2info(dest) != NULL)
383#ifdef CONFIG_HAS_DATAFLASH
84d0c2f1 384 && (!addr_dataflash(dest))
2abbe075
WD
385#endif
386 ) {
3863585b
WD
387 int rc;
388
4b9206ed 389 puts ("Copy to Flash... ");
3863585b 390
77ddac94 391 rc = flash_write ((char *)addr, dest, count*size);
3863585b
WD
392 if (rc != 0) {
393 flash_perror (rc);
394 return (1);
395 }
396 puts ("done\n");
397 return 0;
398 }
399#endif
400
2abbe075
WD
401#ifdef CONFIG_HAS_DATAFLASH
402 /* Check if we are copying from RAM or Flash to DataFlash */
403 if (addr_dataflash(dest) && !addr_dataflash(addr)){
404 int rc;
405
4b9206ed 406 puts ("Copy to DataFlash... ");
2abbe075
WD
407
408 rc = write_dataflash (dest, addr, count*size);
409
410 if (rc != 1) {
411 dataflash_perror (rc);
412 return (1);
413 }
414 puts ("done\n");
415 return 0;
416 }
8bde7f77 417
2abbe075 418 /* Check if we are copying from DataFlash to RAM */
880cc438 419 if (addr_dataflash(addr) && !addr_dataflash(dest)
6d0f6bcf 420#ifndef CONFIG_SYS_NO_FLASH
880cc438
SP
421 && (addr2info(dest) == NULL)
422#endif
423 ){
5779d8d9
WD
424 int rc;
425 rc = read_dataflash(addr, count * size, (char *) dest);
426 if (rc != 1) {
d4ca31c4
WD
427 dataflash_perror (rc);
428 return (1);
429 }
2abbe075
WD
430 return 0;
431 }
432
433 if (addr_dataflash(addr) && addr_dataflash(dest)){
4b9206ed 434 puts ("Unsupported combination of source/destination.\n\r");
2abbe075
WD
435 return 1;
436 }
437#endif
438
4c727c77
MF
439#ifdef CONFIG_BLACKFIN
440 /* See if we're copying to/from L1 inst */
441 if (addr_bfin_on_chip_mem(dest) || addr_bfin_on_chip_mem(addr)) {
442 memcpy((void *)dest, (void *)addr, count * size);
443 return 0;
444 }
445#endif
446
0628ab8e 447 bytes = size * count;
53237afe 448 buf = map_sysmem(dest, bytes);
0628ab8e 449 src = map_sysmem(addr, bytes);
3863585b
WD
450 while (count-- > 0) {
451 if (size == 4)
0628ab8e 452 *((ulong *)buf) = *((ulong *)src);
3863585b 453 else if (size == 2)
0628ab8e 454 *((ushort *)buf) = *((ushort *)src);
3863585b 455 else
0628ab8e
SG
456 *((u_char *)buf) = *((u_char *)src);
457 src += size;
458 buf += size;
eaadb44e
SR
459
460 /* reset watchdog from time to time */
461 if ((count % (64 << 10)) == 0)
462 WATCHDOG_RESET();
3863585b
WD
463 }
464 return 0;
465}
466
088f1b19
KP
467static int do_mem_base(cmd_tbl_t *cmdtp, int flag, int argc,
468 char * const argv[])
3863585b
WD
469{
470 if (argc > 1) {
471 /* Set new base address.
472 */
473 base_address = simple_strtoul(argv[1], NULL, 16);
474 }
475 /* Print the current base address.
476 */
477 printf("Base Address: 0x%08lx\n", base_address);
478 return 0;
479}
480
088f1b19
KP
481static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc,
482 char * const argv[])
3863585b 483{
0628ab8e 484 ulong addr, length, i, bytes;
27b207fd 485 int size;
3863585b
WD
486 volatile uint *longp;
487 volatile ushort *shortp;
488 volatile u_char *cp;
0628ab8e 489 const void *buf;
3863585b 490
47e26b1b 491 if (argc < 3)
4c12eeb8 492 return CMD_RET_USAGE;
3863585b 493
85de63e2
RD
494 /*
495 * Check for a size specification.
3863585b
WD
496 * Defaults to long if no or incorrect specification.
497 */
27b207fd
WD
498 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
499 return 1;
3863585b
WD
500
501 /* Address is always specified.
502 */
503 addr = simple_strtoul(argv[1], NULL, 16);
504
505 /* Length is the number of objects, not number of bytes.
506 */
507 length = simple_strtoul(argv[2], NULL, 16);
508
0628ab8e
SG
509 bytes = size * length;
510 buf = map_sysmem(addr, bytes);
511
3863585b
WD
512 /* We want to optimize the loops to run as fast as possible.
513 * If we have only one object, just run infinite loops.
514 */
515 if (length == 1) {
516 if (size == 4) {
0628ab8e 517 longp = (uint *)buf;
3863585b
WD
518 for (;;)
519 i = *longp;
520 }
521 if (size == 2) {
0628ab8e 522 shortp = (ushort *)buf;
3863585b
WD
523 for (;;)
524 i = *shortp;
525 }
0628ab8e 526 cp = (u_char *)buf;
3863585b
WD
527 for (;;)
528 i = *cp;
529 }
530
531 if (size == 4) {
532 for (;;) {
0628ab8e 533 longp = (uint *)buf;
3863585b
WD
534 i = length;
535 while (i-- > 0)
f3b3c3df 536 *longp++;
3863585b
WD
537 }
538 }
539 if (size == 2) {
540 for (;;) {
0628ab8e 541 shortp = (ushort *)buf;
3863585b
WD
542 i = length;
543 while (i-- > 0)
f3b3c3df 544 *shortp++;
3863585b
WD
545 }
546 }
547 for (;;) {
0628ab8e 548 cp = (u_char *)buf;
3863585b
WD
549 i = length;
550 while (i-- > 0)
f3b3c3df 551 *cp++;
3863585b 552 }
0628ab8e 553 unmap_sysmem(buf);
3863585b
WD
554}
555
56523f12 556#ifdef CONFIG_LOOPW
54841ab5 557int do_mem_loopw (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
56523f12 558{
0628ab8e 559 ulong addr, length, i, data, bytes;
56523f12
WD
560 int size;
561 volatile uint *longp;
562 volatile ushort *shortp;
563 volatile u_char *cp;
0628ab8e 564 void *buf;
81050926 565
47e26b1b 566 if (argc < 4)
4c12eeb8 567 return CMD_RET_USAGE;
56523f12 568
85de63e2
RD
569 /*
570 * Check for a size specification.
56523f12
WD
571 * Defaults to long if no or incorrect specification.
572 */
573 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
574 return 1;
575
576 /* Address is always specified.
577 */
578 addr = simple_strtoul(argv[1], NULL, 16);
579
580 /* Length is the number of objects, not number of bytes.
581 */
582 length = simple_strtoul(argv[2], NULL, 16);
583
584 /* data to write */
585 data = simple_strtoul(argv[3], NULL, 16);
81050926 586
0628ab8e
SG
587 bytes = size * length;
588 buf = map_sysmem(addr, bytes);
589
56523f12
WD
590 /* We want to optimize the loops to run as fast as possible.
591 * If we have only one object, just run infinite loops.
592 */
593 if (length == 1) {
594 if (size == 4) {
0628ab8e 595 longp = (uint *)buf;
56523f12
WD
596 for (;;)
597 *longp = data;
598 }
599 if (size == 2) {
0628ab8e 600 shortp = (ushort *)buf;
56523f12
WD
601 for (;;)
602 *shortp = data;
603 }
0628ab8e 604 cp = (u_char *)buf;
56523f12
WD
605 for (;;)
606 *cp = data;
607 }
608
609 if (size == 4) {
610 for (;;) {
0628ab8e 611 longp = (uint *)buf;
56523f12
WD
612 i = length;
613 while (i-- > 0)
614 *longp++ = data;
615 }
616 }
617 if (size == 2) {
618 for (;;) {
0628ab8e 619 shortp = (ushort *)buf;
56523f12
WD
620 i = length;
621 while (i-- > 0)
622 *shortp++ = data;
623 }
624 }
625 for (;;) {
0628ab8e 626 cp = (u_char *)buf;
56523f12
WD
627 i = length;
628 while (i-- > 0)
629 *cp++ = data;
630 }
631}
632#endif /* CONFIG_LOOPW */
633
68149e94 634#ifdef CONFIG_CMD_MEMTEST
5512d5b0
SG
635static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr,
636 vu_long *dummy)
3863585b 637{
c9638f50 638 vu_long *addr;
c9638f50
SG
639 ulong errs = 0;
640 ulong val, readback;
641 int j;
c9638f50
SG
642 vu_long offset;
643 vu_long test_offset;
644 vu_long pattern;
645 vu_long temp;
646 vu_long anti_pattern;
647 vu_long num_words;
3863585b
WD
648 static const ulong bitpattern[] = {
649 0x00000001, /* single bit */
650 0x00000003, /* two adjacent bits */
651 0x00000007, /* three adjacent bits */
652 0x0000000F, /* four adjacent bits */
653 0x00000005, /* two non-adjacent bits */
654 0x00000015, /* three non-adjacent bits */
655 0x00000055, /* four non-adjacent bits */
656 0xaaaaaaaa, /* alternating 1/0 */
657 };
3863585b 658
5512d5b0 659 num_words = (end_addr - start_addr) / sizeof(vu_long);
8c86bbe0 660
7ecbd4d7
SG
661 /*
662 * Data line test: write a pattern to the first
663 * location, write the 1's complement to a 'parking'
664 * address (changes the state of the data bus so a
665 * floating bus doesn't give a false OK), and then
666 * read the value back. Note that we read it back
667 * into a variable because the next time we read it,
668 * it might be right (been there, tough to explain to
669 * the quality guys why it prints a failure when the
670 * "is" and "should be" are obviously the same in the
671 * error message).
672 *
673 * Rather than exhaustively testing, we test some
674 * patterns by shifting '1' bits through a field of
675 * '0's and '0' bits through a field of '1's (i.e.
676 * pattern and ~pattern).
677 */
5512d5b0 678 addr = buf;
7ecbd4d7
SG
679 for (j = 0; j < sizeof(bitpattern) / sizeof(bitpattern[0]); j++) {
680 val = bitpattern[j];
681 for (; val != 0; val <<= 1) {
5512d5b0 682 *addr = val;
c9638f50 683 *dummy = ~val; /* clear the test data off the bus */
3863585b 684 readback = *addr;
7ecbd4d7 685 if (readback != val) {
c9638f50
SG
686 printf("FAILURE (data line): "
687 "expected %08lx, actual %08lx\n",
688 val, readback);
689 errs++;
c44d4386 690 if (ctrlc())
51209b1f 691 return -1;
3863585b
WD
692 }
693 *addr = ~val;
694 *dummy = val;
695 readback = *addr;
c9638f50
SG
696 if (readback != ~val) {
697 printf("FAILURE (data line): "
698 "Is %08lx, should be %08lx\n",
699 readback, ~val);
700 errs++;
c44d4386 701 if (ctrlc())
51209b1f 702 return -1;
3863585b 703 }
3863585b 704 }
7ecbd4d7 705 }
3863585b 706
7ecbd4d7
SG
707 /*
708 * Based on code whose Original Author and Copyright
709 * information follows: Copyright (c) 1998 by Michael
710 * Barr. This software is placed into the public
711 * domain and may be used for any purpose. However,
712 * this notice must not be changed or removed and no
713 * warranty is either expressed or implied by its
714 * publication or distribution.
715 */
3863585b 716
7ecbd4d7
SG
717 /*
718 * Address line test
719
720 * Description: Test the address bus wiring in a
721 * memory region by performing a walking
722 * 1's test on the relevant bits of the
723 * address and checking for aliasing.
724 * This test will find single-bit
725 * address failures such as stuck-high,
726 * stuck-low, and shorted pins. The base
727 * address and size of the region are
728 * selected by the caller.
729
730 * Notes: For best results, the selected base
731 * address should have enough LSB 0's to
732 * guarantee single address bit changes.
733 * For example, to test a 64-Kbyte
734 * region, select a base address on a
735 * 64-Kbyte boundary. Also, select the
736 * region size as a power-of-two if at
737 * all possible.
738 *
739 * Returns: 0 if the test succeeds, 1 if the test fails.
740 */
7ecbd4d7
SG
741 pattern = (vu_long) 0xaaaaaaaa;
742 anti_pattern = (vu_long) 0x55555555;
3863585b 743
5512d5b0 744 debug("%s:%d: length = 0x%.8lx\n", __func__, __LINE__, num_words);
7ecbd4d7
SG
745 /*
746 * Write the default pattern at each of the
747 * power-of-two offsets.
748 */
5512d5b0
SG
749 for (offset = 1; offset < num_words; offset <<= 1)
750 addr[offset] = pattern;
3863585b 751
7ecbd4d7
SG
752 /*
753 * Check for address bits stuck high.
754 */
755 test_offset = 0;
5512d5b0 756 addr[test_offset] = anti_pattern;
3863585b 757
5512d5b0
SG
758 for (offset = 1; offset < num_words; offset <<= 1) {
759 temp = addr[offset];
7ecbd4d7 760 if (temp != pattern) {
c9638f50 761 printf("\nFAILURE: Address bit stuck high @ 0x%.8lx:"
3863585b 762 " expected 0x%.8lx, actual 0x%.8lx\n",
5512d5b0 763 start_addr + offset, pattern, temp);
87b22b77 764 errs++;
c44d4386 765 if (ctrlc())
7ecbd4d7 766 return -1;
3863585b 767 }
7ecbd4d7 768 }
5512d5b0 769 addr[test_offset] = pattern;
7ecbd4d7 770 WATCHDOG_RESET();
3863585b 771
7ecbd4d7
SG
772 /*
773 * Check for addr bits stuck low or shorted.
774 */
5512d5b0
SG
775 for (test_offset = 1; test_offset < num_words; test_offset <<= 1) {
776 addr[test_offset] = anti_pattern;
3863585b 777
5512d5b0
SG
778 for (offset = 1; offset < num_words; offset <<= 1) {
779 temp = addr[offset];
3863585b 780 if ((temp != pattern) && (offset != test_offset)) {
7ecbd4d7
SG
781 printf("\nFAILURE: Address bit stuck low or"
782 " shorted @ 0x%.8lx: expected 0x%.8lx,"
783 " actual 0x%.8lx\n",
5512d5b0 784 start_addr + offset, pattern, temp);
7ecbd4d7 785 errs++;
c44d4386 786 if (ctrlc())
7ecbd4d7 787 return -1;
3863585b 788 }
3863585b 789 }
5512d5b0 790 addr[test_offset] = pattern;
7ecbd4d7 791 }
3863585b 792
7ecbd4d7
SG
793 /*
794 * Description: Test the integrity of a physical
795 * memory device by performing an
796 * increment/decrement test over the
797 * entire region. In the process every
798 * storage bit in the device is tested
799 * as a zero and a one. The base address
800 * and the size of the region are
801 * selected by the caller.
802 *
803 * Returns: 0 if the test succeeds, 1 if the test fails.
804 */
5512d5b0 805 num_words++;
3863585b 806
7ecbd4d7
SG
807 /*
808 * Fill memory with a known pattern.
809 */
810 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
811 WATCHDOG_RESET();
5512d5b0 812 addr[offset] = pattern;
7ecbd4d7 813 }
3863585b 814
7ecbd4d7
SG
815 /*
816 * Check each location and invert it for the second pass.
817 */
818 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
819 WATCHDOG_RESET();
5512d5b0 820 temp = addr[offset];
7ecbd4d7 821 if (temp != pattern) {
c9638f50 822 printf("\nFAILURE (read/write) @ 0x%.8lx:"
3863585b 823 " expected 0x%.8lx, actual 0x%.8lx)\n",
5512d5b0 824 start_addr + offset, pattern, temp);
87b22b77 825 errs++;
c44d4386 826 if (ctrlc())
51209b1f 827 return -1;
3863585b
WD
828 }
829
7ecbd4d7 830 anti_pattern = ~pattern;
5512d5b0 831 addr[offset] = anti_pattern;
7ecbd4d7
SG
832 }
833
834 /*
835 * Check each location for the inverted pattern and zero it.
836 */
837 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
838 WATCHDOG_RESET();
839 anti_pattern = ~pattern;
5512d5b0 840 temp = addr[offset];
7ecbd4d7 841 if (temp != anti_pattern) {
c9638f50 842 printf("\nFAILURE (read/write): @ 0x%.8lx:"
3863585b 843 " expected 0x%.8lx, actual 0x%.8lx)\n",
5512d5b0 844 start_addr + offset, anti_pattern, temp);
87b22b77 845 errs++;
c44d4386 846 if (ctrlc())
51209b1f 847 return -1;
3863585b 848 }
5512d5b0 849 addr[offset] = 0;
7ecbd4d7 850 }
51209b1f
SG
851
852 return 0;
c9638f50
SG
853}
854
5512d5b0
SG
855static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
856 vu_long pattern, int iteration)
c9638f50 857{
5512d5b0 858 vu_long *end;
c9638f50 859 vu_long *addr;
c9638f50 860 ulong errs = 0;
5512d5b0 861 ulong incr, length;
c9638f50 862 ulong val, readback;
3863585b 863
51209b1f 864 /* Alternate the pattern */
3863585b 865 incr = 1;
51209b1f
SG
866 if (iteration & 1) {
867 incr = -incr;
868 /*
869 * Flip the pattern each time to make lots of zeros and
870 * then, the next time, lots of ones. We decrement
871 * the "negative" patterns and increment the "positive"
872 * patterns to preserve this feature.
873 */
874 if (pattern & 0x80000000)
875 pattern = -pattern; /* complement & increment */
876 else
877 pattern = ~pattern;
878 }
5512d5b0
SG
879 length = (end_addr - start_addr) / sizeof(ulong);
880 end = buf + length;
7ecbd4d7
SG
881 printf("\rPattern %08lX Writing..."
882 "%12s"
883 "\b\b\b\b\b\b\b\b\b\b",
884 pattern, "");
3863585b 885
5512d5b0 886 for (addr = buf, val = pattern; addr < end; addr++) {
7ecbd4d7
SG
887 WATCHDOG_RESET();
888 *addr = val;
889 val += incr;
890 }
3863585b 891
7ecbd4d7 892 puts("Reading...");
3863585b 893
5512d5b0 894 for (addr = buf, val = pattern; addr < end; addr++) {
7ecbd4d7
SG
895 WATCHDOG_RESET();
896 readback = *addr;
897 if (readback != val) {
5512d5b0
SG
898 ulong offset = addr - buf;
899
7ecbd4d7
SG
900 printf("\nMem error @ 0x%08X: "
901 "found %08lX, expected %08lX\n",
5512d5b0
SG
902 (uint)(uintptr_t)(start_addr + offset),
903 readback, val);
7ecbd4d7 904 errs++;
c44d4386 905 if (ctrlc())
7ecbd4d7 906 return -1;
3863585b 907 }
7ecbd4d7
SG
908 val += incr;
909 }
3863585b 910
51209b1f 911 return 0;
c9638f50
SG
912}
913
914/*
915 * Perform a memory test. A more complete alternative test can be
916 * configured using CONFIG_SYS_ALT_MEMTEST. The complete test loops until
917 * interrupted by ctrl-c or by a failure of one of the sub-tests.
918 */
919static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,
920 char * const argv[])
921{
8c86bbe0 922 ulong start, end;
5512d5b0 923 vu_long *buf, *dummy;
c9638f50
SG
924 int iteration_limit;
925 int ret;
51209b1f 926 ulong errs = 0; /* number of errors, or -1 if interrupted */
c9638f50 927 ulong pattern;
51209b1f 928 int iteration;
c9638f50
SG
929#if defined(CONFIG_SYS_ALT_MEMTEST)
930 const int alt_test = 1;
931#else
932 const int alt_test = 0;
3863585b 933#endif
c9638f50
SG
934
935 if (argc > 1)
8c86bbe0 936 start = simple_strtoul(argv[1], NULL, 16);
c9638f50 937 else
8c86bbe0 938 start = CONFIG_SYS_MEMTEST_START;
c9638f50
SG
939
940 if (argc > 2)
8c86bbe0 941 end = simple_strtoul(argv[2], NULL, 16);
c9638f50 942 else
8c86bbe0 943 end = CONFIG_SYS_MEMTEST_END;
c9638f50
SG
944
945 if (argc > 3)
946 pattern = (ulong)simple_strtoul(argv[3], NULL, 16);
947 else
948 pattern = 0;
949
950 if (argc > 4)
951 iteration_limit = (ulong)simple_strtoul(argv[4], NULL, 16);
952 else
953 iteration_limit = 0;
954
8c86bbe0
SG
955 printf("Testing %08x ... %08x:\n", (uint)start, (uint)end);
956 debug("%s:%d: start %#08lx end %#08lx\n", __func__, __LINE__,
957 start, end);
51209b1f 958
5512d5b0
SG
959 buf = map_sysmem(start, end - start);
960 dummy = map_sysmem(CONFIG_SYS_MEMTEST_SCRATCH, sizeof(vu_long));
51209b1f
SG
961 for (iteration = 0;
962 !iteration_limit || iteration < iteration_limit;
963 iteration++) {
964 if (ctrlc()) {
51209b1f
SG
965 errs = -1UL;
966 break;
967 }
968
969 printf("Iteration: %6d\r", iteration + 1);
970 debug("\n");
5512d5b0
SG
971 if (alt_test) {
972 errs = mem_test_alt(buf, start, end, dummy);
973 } else {
974 errs = mem_test_quick(buf, start, end, pattern,
975 iteration);
976 }
977 if (errs == -1UL)
978 break;
979 }
980
981 /*
982 * Work-around for eldk-4.2 which gives this warning if we try to
983 * case in the unmap_sysmem() call:
984 * warning: initialization discards qualifiers from pointer target type
985 */
986 {
987 void *vbuf = (void *)buf;
988 void *vdummy = (void *)dummy;
989
990 unmap_sysmem(vbuf);
991 unmap_sysmem(vdummy);
51209b1f
SG
992 }
993
994 if (errs == -1UL) {
c44d4386
SG
995 /* Memory test was aborted - write a newline to finish off */
996 putc('\n');
51209b1f
SG
997 ret = 1;
998 } else {
999 printf("Tested %d iteration(s) with %lu errors.\n",
1000 iteration, errs);
1001 ret = errs != 0;
1002 }
c9638f50
SG
1003
1004 return ret; /* not reached */
3863585b 1005}
a2681707 1006#endif /* CONFIG_CMD_MEMTEST */
3863585b
WD
1007
1008/* Modify memory.
1009 *
1010 * Syntax:
1011 * mm{.b, .w, .l} {addr}
1012 * nm{.b, .w, .l} {addr}
1013 */
1014static int
54841ab5 1015mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
3863585b 1016{
27b207fd
WD
1017 ulong addr, i;
1018 int nbytes, size;
0628ab8e 1019 void *ptr = NULL;
3863585b 1020
47e26b1b 1021 if (argc != 2)
4c12eeb8 1022 return CMD_RET_USAGE;
3863585b
WD
1023
1024#ifdef CONFIG_BOOT_RETRY_TIME
1025 reset_cmd_timeout(); /* got a good command to get here */
1026#endif
1027 /* We use the last specified parameters, unless new ones are
1028 * entered.
1029 */
1030 addr = mm_last_addr;
1031 size = mm_last_size;
1032
1033 if ((flag & CMD_FLAG_REPEAT) == 0) {
1034 /* New command specified. Check for a size specification.
1035 * Defaults to long if no or incorrect specification.
1036 */
27b207fd
WD
1037 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
1038 return 1;
3863585b
WD
1039
1040 /* Address is specified since argc > 1
1041 */
1042 addr = simple_strtoul(argv[1], NULL, 16);
1043 addr += base_address;
1044 }
1045
2abbe075
WD
1046#ifdef CONFIG_HAS_DATAFLASH
1047 if (addr_dataflash(addr)){
4b9206ed 1048 puts ("Can't modify DataFlash in place. Use cp instead.\n\r");
2abbe075
WD
1049 return 0;
1050 }
1051#endif
1052
4c727c77
MF
1053#ifdef CONFIG_BLACKFIN
1054 if (addr_bfin_on_chip_mem(addr)) {
1055 puts ("Can't modify L1 instruction in place. Use cp instead.\n\r");
1056 return 0;
1057 }
1058#endif
1059
3863585b
WD
1060 /* Print the address, followed by value. Then accept input for
1061 * the next value. A non-converted value exits.
1062 */
1063 do {
0628ab8e 1064 ptr = map_sysmem(addr, size);
3863585b
WD
1065 printf("%08lx:", addr);
1066 if (size == 4)
0628ab8e 1067 printf(" %08x", *((uint *)ptr));
3863585b 1068 else if (size == 2)
0628ab8e 1069 printf(" %04x", *((ushort *)ptr));
3863585b 1070 else
0628ab8e 1071 printf(" %02x", *((u_char *)ptr));
3863585b
WD
1072
1073 nbytes = readline (" ? ");
1074 if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) {
1075 /* <CR> pressed as only input, don't modify current
1076 * location and move to next. "-" pressed will go back.
1077 */
1078 if (incrflag)
1079 addr += nbytes ? -size : size;
1080 nbytes = 1;
1081#ifdef CONFIG_BOOT_RETRY_TIME
1082 reset_cmd_timeout(); /* good enough to not time out */
1083#endif
1084 }
1085#ifdef CONFIG_BOOT_RETRY_TIME
1086 else if (nbytes == -2) {
1087 break; /* timed out, exit the command */
1088 }
1089#endif
1090 else {
1091 char *endp;
1092 i = simple_strtoul(console_buffer, &endp, 16);
1093 nbytes = endp - console_buffer;
1094 if (nbytes) {
1095#ifdef CONFIG_BOOT_RETRY_TIME
1096 /* good enough to not time out
1097 */
1098 reset_cmd_timeout();
1099#endif
1100 if (size == 4)
0628ab8e 1101 *((uint *)ptr) = i;
3863585b 1102 else if (size == 2)
0628ab8e 1103 *((ushort *)ptr) = i;
3863585b 1104 else
0628ab8e 1105 *((u_char *)ptr) = i;
3863585b
WD
1106 if (incrflag)
1107 addr += size;
1108 }
1109 }
1110 } while (nbytes);
0628ab8e
SG
1111 if (ptr)
1112 unmap_sysmem(ptr);
3863585b
WD
1113
1114 mm_last_addr = addr;
1115 mm_last_size = size;
1116 return 0;
1117}
1118
710b9938
MF
1119#ifdef CONFIG_CMD_CRC32
1120
088f1b19 1121static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 1122{
d20a40de 1123 int flags = 0;
c26e454d 1124 int ac;
54841ab5 1125 char * const *av;
c26e454d 1126
d20a40de 1127 if (argc < 3)
4c12eeb8 1128 return CMD_RET_USAGE;
c26e454d
WD
1129
1130 av = argv + 1;
1131 ac = argc - 1;
d20a40de 1132#ifdef CONFIG_HASH_VERIFY
c26e454d 1133 if (strcmp(*av, "-v") == 0) {
d20a40de 1134 flags |= HASH_FLAG_VERIFY;
c26e454d
WD
1135 av++;
1136 ac--;
c26e454d 1137 }
d20a40de 1138#endif
c26e454d 1139
d20a40de 1140 return hash_command("crc32", flags, cmdtp, flag, ac, av);
c26e454d 1141}
c26e454d 1142
710b9938
MF
1143#endif
1144
8bde7f77 1145/**************************************************/
0d498393 1146U_BOOT_CMD(
53677ef1 1147 md, 3, 1, do_mem_md,
2fb2604d 1148 "memory display",
a89c33db 1149 "[.b, .w, .l] address [# of objects]"
8bde7f77
WD
1150);
1151
1152
0d498393 1153U_BOOT_CMD(
53677ef1 1154 mm, 2, 1, do_mem_mm,
a89c33db
WD
1155 "memory modify (auto-incrementing address)",
1156 "[.b, .w, .l] address"
8bde7f77
WD
1157);
1158
1159
0d498393 1160U_BOOT_CMD(
53677ef1 1161 nm, 2, 1, do_mem_nm,
2fb2604d 1162 "memory modify (constant address)",
a89c33db 1163 "[.b, .w, .l] address"
8bde7f77
WD
1164);
1165
0d498393 1166U_BOOT_CMD(
53677ef1 1167 mw, 4, 1, do_mem_mw,
2fb2604d 1168 "memory write (fill)",
a89c33db 1169 "[.b, .w, .l] address value [count]"
8bde7f77
WD
1170);
1171
0d498393 1172U_BOOT_CMD(
53677ef1 1173 cp, 4, 1, do_mem_cp,
2fb2604d 1174 "memory copy",
a89c33db 1175 "[.b, .w, .l] source target count"
8bde7f77
WD
1176);
1177
0d498393 1178U_BOOT_CMD(
53677ef1 1179 cmp, 4, 1, do_mem_cmp,
2fb2604d 1180 "memory compare",
a89c33db 1181 "[.b, .w, .l] addr1 addr2 count"
8bde7f77
WD
1182);
1183
710b9938
MF
1184#ifdef CONFIG_CMD_CRC32
1185
c26e454d
WD
1186#ifndef CONFIG_CRC32_VERIFY
1187
0d498393 1188U_BOOT_CMD(
53677ef1 1189 crc32, 4, 1, do_mem_crc,
2fb2604d 1190 "checksum calculation",
a89c33db 1191 "address count [addr]\n - compute CRC32 checksum [save at addr]"
8bde7f77
WD
1192);
1193
c26e454d
WD
1194#else /* CONFIG_CRC32_VERIFY */
1195
1196U_BOOT_CMD(
53677ef1 1197 crc32, 5, 1, do_mem_crc,
2fb2604d 1198 "checksum calculation",
c26e454d 1199 "address count [addr]\n - compute CRC32 checksum [save at addr]\n"
a89c33db 1200 "-v address count crc\n - verify crc of memory area"
c26e454d
WD
1201);
1202
1203#endif /* CONFIG_CRC32_VERIFY */
1204
710b9938
MF
1205#endif
1206
15a33e49
SG
1207#ifdef CONFIG_CMD_MEMINFO
1208__weak void board_show_dram(ulong size)
1209{
1210 puts("DRAM: ");
1211 print_size(size, "\n");
1212}
1213
1214static int do_mem_info(cmd_tbl_t *cmdtp, int flag, int argc,
1215 char * const argv[])
1216{
1217 board_show_dram(gd->ram_size);
1218
1219 return 0;
1220}
1221#endif
1222
0d498393 1223U_BOOT_CMD(
53677ef1 1224 base, 2, 1, do_mem_base,
2fb2604d 1225 "print or set address offset",
8bde7f77 1226 "\n - print address offset for memory commands\n"
a89c33db 1227 "base off\n - set address offset for memory commands to 'off'"
8bde7f77
WD
1228);
1229
0d498393 1230U_BOOT_CMD(
53677ef1 1231 loop, 3, 1, do_mem_loop,
2fb2604d 1232 "infinite loop on address range",
a89c33db 1233 "[.b, .w, .l] address number_of_objects"
8bde7f77
WD
1234);
1235
56523f12
WD
1236#ifdef CONFIG_LOOPW
1237U_BOOT_CMD(
53677ef1 1238 loopw, 4, 1, do_mem_loopw,
2fb2604d 1239 "infinite write loop on address range",
a89c33db 1240 "[.b, .w, .l] address number_of_objects data_to_write"
56523f12
WD
1241);
1242#endif /* CONFIG_LOOPW */
1243
a2681707 1244#ifdef CONFIG_CMD_MEMTEST
0d498393 1245U_BOOT_CMD(
b6fc6fd4 1246 mtest, 5, 1, do_mem_mtest,
a89c33db
WD
1247 "simple RAM read/write test",
1248 "[start [end [pattern [iterations]]]]"
8bde7f77 1249);
a2681707 1250#endif /* CONFIG_CMD_MEMTEST */
8bde7f77 1251
4aaf29b2
SR
1252#ifdef CONFIG_MX_CYCLIC
1253U_BOOT_CMD(
53677ef1 1254 mdc, 4, 1, do_mem_mdc,
2fb2604d 1255 "memory display cyclic",
a89c33db 1256 "[.b, .w, .l] address count delay(ms)"
4aaf29b2
SR
1257);
1258
1259U_BOOT_CMD(
53677ef1 1260 mwc, 4, 1, do_mem_mwc,
2fb2604d 1261 "memory write cyclic",
a89c33db 1262 "[.b, .w, .l] address value delay(ms)"
4aaf29b2
SR
1263);
1264#endif /* CONFIG_MX_CYCLIC */
15a33e49
SG
1265
1266#ifdef CONFIG_CMD_MEMINFO
1267U_BOOT_CMD(
1268 meminfo, 3, 1, do_mem_info,
1269 "display memory information",
1270 ""
1271);
1272#endif